Jiang Jian [Tue, 21 Jun 2022 12:24:01 +0000 (20:24 +0800)]
phy: phy-brcm-usb: drop unexpected word "the" in the comments
there is an unexpected word "the" in the comments that need to be dropped
file: ./drivers/phy/broadcom/phy-brcm-usb-init.c
line: 864
* Make sure the the second and third memory controller
changed to
* Make sure the second and third memory controller
Peter Geis [Wed, 22 Jun 2022 00:31:40 +0000 (20:31 -0400)]
phy: rockchip-inno-usb2: Sync initial otg state
The initial otg state for the phy defaults to device mode. The actual
state isn't detected until an ID IRQ fires. Fix this by syncing the ID
state during initialization.
Fixes: 51a9b2c03dd3 ("phy: rockchip-inno-usb2: Handle ID IRQ") Signed-off-by: Peter Geis <pgwipeout@gmail.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20220622003140.30365-1-pgwipeout@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Alexandre Torgue [Mon, 13 Jun 2022 09:34:19 +0000 (11:34 +0200)]
dt-bindings: rcc: stm32: select the "secure" path for stm32mp13
Like for stm32mp15, when stm32 RCC node is used to interact with a secure
context (using clock SCMI protocol), a different path has to be used for
yaml verification.
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Acked-by: Rob Herring <robh@kernel.org>
Leonard Göhrs [Fri, 3 Jun 2022 09:44:21 +0000 (11:44 +0200)]
ARM: dts: stm32: correct vcc-supply for eeprom on stm32mp15xx-osd32
According to the OSD32MP1 Power System overview[1] the EEPROM is connected to
the VDD line and not to some single-purpose fixed regulator.
Set the EEPROM supply according to the diagram to eliminate this parent-less
regulator.
ARM: dts: stm32: adjust whitespace around '=' on MCU boards
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
The Buck3 on DHCOR is used to supply IO voltage. It can output either 3V3
in the default DHCOR configuration, or 2V9 in case of AV96 DHCOR variant
which has extra Empirion DCDC converter in front of the 1V8 IO supply, or
outright 1V8 in case of 1V8 IO DHCOR without the Empirion DCDC converter.
The 2V9 mode in case of AV96 DHCOR variant is used to reduce unnecessarily
high input voltage to the Empirion DCDC converter, so move it into matching
DTSI to stop confusing users.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Fabien Dessenne [Tue, 3 May 2022 14:56:06 +0000 (16:56 +0200)]
ARM: dts: stm32: remove the IPCC "wakeup" IRQ on stm32mp151
The stm32 ipcc mailbox driver supports only two interrupts (rx and tx), so
remove the unsupported "wakeup" one.
Note that the EXTI interrupt 61 has two roles : it is hierarchically linked
to the GIC IPCC "rx" interrupt, and it acts as a wakeup source.
Robert Marko [Tue, 21 Jun 2022 19:55:12 +0000 (21:55 +0200)]
phy: qcom-qmp-pcie: add IPQ8074 PCIe Gen3 QMP PHY support
IPQ8074 has 2 different single lane PCIe PHY-s, one Gen2 and one Gen3.
Gen2 one is already supported, so add the support for the Gen3 one.
It uses the same register layout as IPQ6018.
Robert Marko [Tue, 21 Jun 2022 19:55:10 +0000 (21:55 +0200)]
phy: qcom-qmp-pcie: make pipe clock rate configurable
IPQ8074 Gen3 PCIe PHY uses 250MHz as the pipe clock rate instead of 125MHz
like every other PCIe QMP PHY does, so make it configurable as part of the
qmp_phy_cfg.
Andi Kleen [Thu, 23 Jun 2022 08:32:17 +0000 (10:32 +0200)]
clk: renesas: rcar-gen4: Fix initconst confusion for cpg_pll_config
A variable pointing to const isn't const itself. It'd have to contain
"const" keyword after "*" too. Therefore, cpg_pll_config cannot be put
to "rodata". Hence use __initdata instead of __initconst to fix this.
Lad Prabhakar [Wed, 22 Jun 2022 18:17:23 +0000 (19:17 +0100)]
clk: renesas: r9a07g043: Add support for RZ/Five SoC
Renesas RZ/Five SoC has almost the same clock structure compared to the
Renesas RZ/G2UL SoC, re-use the r9a07g043-cpg.c file to add support for
RZ/Five SoC.
This patch splits up the clocks and reset arrays for RZ/G2UL and RZ/Five
SoC using #ifdef CONFIG_ARM64 and #ifdef CONFIG_RISCV checks.
Renesas RZ/Five SoC has almost the same clock structure compared to the
Renesas RZ/G2UL SoC, re-use the r9a07g043-cpg.h header file and just
amend the RZ/Five CPG clock and reset definitions.
According to Rev.0.51 datasheet 004_R-CarV4H_pin_function.xlsx,
GP1_23 - GP1_28 are 1.8/3.3V. But they are not on Table 7.28.
According to the HW team, there are no bits assigned.
This patch follows HW team's comment.
MODSEL8 controls I2C vs. GPIO modes, and the Datasheet (Rev.0.51) is
indicating that I2C needs 1. But we should use 0 for all cases in
reality. New Datasheet should be updated.
Phil Edworthy [Fri, 24 Jun 2022 08:48:33 +0000 (09:48 +0100)]
pinctrl: renesas: Add RZ/V2M pin and gpio controller driver
Add support for pin and gpio controller driver for RZ/V2M SoC.
Based on the RZ/G2L driver.
Note that the DETDO and DETMS dedicated pins are currently not
documented in the HW manual as to which pin group they are in.
HW team has since said that the output level of 1.8V I/O group 4
(for MD0-7, and debugger) is the same as the 1.8V I/O group 3.
Liang He [Fri, 1 Jul 2022 12:18:04 +0000 (20:18 +0800)]
ARM: shmobile: rcar-gen2: Increase refcount for new reference
In rcar_gen2_regulator_quirk(), for_each_matching_node_and_match() will
automatically increase and decrease the refcount. However, we should
call of_node_get() for the new reference created in 'quirk->np'.
Besides, we also should call of_node_put() before the 'quirk' being
freed.
Johan Hovold [Thu, 23 Jun 2022 11:33:14 +0000 (13:33 +0200)]
phy: qcom-qmp-usb: clean up pipe clock handling
Clean up the pipe clock handling by using dev_err_probe() to handle
probe deferral and dropping the obsolete comment that claimed that the
pipe clock was optional for some other PHY types.
Johan Hovold [Thu, 23 Jun 2022 11:33:13 +0000 (13:33 +0200)]
phy: qcom-qmp-pcie-msm8996: drop obsolete pipe clock type check
Drop the obsolete pipe clock handling which was used to treat the pipe
clock as optional for types other than PCIe and USB and which is no
longer needed since splitting the PHY driver.
Johan Hovold [Thu, 23 Jun 2022 11:33:12 +0000 (13:33 +0200)]
phy: qcom-qmp-pcie: drop obsolete pipe clock type check
Drop the obsolete pipe clock handling which was used to treat the pipe
clock as optional for types other than PCIe and USB and which is no
longer needed since splitting the PHY driver.
This is a new driver that supports the integrated DisplayPort phy for
mediatek SoCs, especially the mt8195. The phy is integrated into the
DisplayPort controller and will be created by the mtk-dp driver. This
driver expects a struct regmap to be able to work on the same registers
as the DisplayPort controller. It sets the device data to be the struct
phy so that the DisplayPort controller can easily work with it.
The driver does not have any devicetree bindings because the datasheet
does not list the controller and the phy as distinct units.
The interaction with the controller can be covered by the configure
callback of the phy framework and its displayport parameters.
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
[Bo-Chen: Modify reviewers' comments.] Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220624062725.4095-1-rex-bc.chen@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Peter Geis [Sat, 25 Jun 2022 21:27:11 +0000 (17:27 -0400)]
phy: rockchip-inno-usb2: Prevent incorrect error on probe
If a phy supply is designated but isn't available at probe time, an
EPROBE_DEFER is returned. Use dev_err_probe to prevent this from
incorrectly printing during boot.
Jiang Jian [Tue, 21 Jun 2022 12:00:15 +0000 (20:00 +0800)]
phy: dphy: drop unexpected word "the" in the comments
there is an unexpected word "the" in the comments that need to be dropped
file: ./drivers/phy/amlogic/phy-meson-axg-mipi-dphy.c
line: 139
* when in RxULPS check state, after the the logic enable the analog,
changed to
* when in RxULPS check state, after the logic enable the analog,
Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220621120015.113682-1-jiangjian@cdjrlc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Vidya Sagar [Wed, 29 Jun 2022 06:04:32 +0000 (11:34 +0530)]
phy: tegra: Add PCIe PIPE2UPHY support for Tegra234
Synopsys DesignWare core based PCIe controllers in Tegra234 SoC
interface with Universal PHY (UPHY) module through a PIPE2UPHY (P2U)
module. For each PCIe lane of a controller, there is a P2U unit
instantiated at hardware level. This driver provides support for the
programming required for each P2U that is going to be used for a PCIe
controller.
Vidya Sagar [Wed, 29 Jun 2022 06:04:25 +0000 (11:34 +0530)]
dt-bindings: PHY: P2U: Add support for Tegra234 P2U block
Add support for Tegra234 P2U (PIPE to UPHY) module block which is a glue
module instantiated once for each PCIe lane between Synopsys DesignWare
core based PCIe IP and Universal PHY block.
Jianjun Wang [Fri, 17 Jun 2022 07:02:45 +0000 (15:02 +0800)]
dt-bindings: phy: mediatek: Add YAML schema for PCIe PHY
Add YAML schema documentation for PCIe PHY on MediaTek chipsets.
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220617070246.20142-2-jianjun.wang@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
Jakub Kicinski [Tue, 5 Jul 2022 03:21:01 +0000 (20:21 -0700)]
Merge tag 'linux-can-fixes-for-5.19-20220704' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can
Marc Kleine-Budde says:
====================
can 2022-07-04
The 1st patch is by Oliver Hartkopp, targets the BCM CAN protocol and
converts a costly synchronize_rcu() to call_rcu() to fix a performance
regression.
Srinivas Neeli's patch for the xilinx_can driver drops the brp limit
down to 1, as only the pre-production silicon have an issue with a brp
of 1.
The next patch is by Duy Nguyen and fixes the data transmission on
R-Car V3U SoCs in the rcar_canfd driver.
Rhett Aultman's patch fixes a DMA memory leak in the gs_usb driver.
Liang He's patch removes an extra of_node_get() in the grcan driver.
The next 2 patches are by me, target the m_can driver and fix the
timestamp handling used for peripheral devices like the tcan4x5x.
Jimmy Assarsson contributes 3 patches for the kvaser_usb driver and
fixes CAN clock and bit timing related issues.
The remaining 5 patches target the mcp251xfd driver. Thomas Kopp
contributes 2 patches to improve the workaround for broken CRC when
reading the TBC register. 3 patches by me add a missing
hrtimer_cancel() during the ndo_stop() callback, and fix the reading
of the Device ID register.
* tag 'linux-can-fixes-for-5.19-20220704' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can:
can: mcp251xfd: mcp251xfd_register_get_dev_id(): fix endianness conversion
can: mcp251xfd: mcp251xfd_register_get_dev_id(): use correct length to read dev_id
can: mcp251xfd: mcp251xfd_stop(): add missing hrtimer_cancel()
can: mcp251xfd: mcp251xfd_regmap_crc_read(): update workaround broken CRC on TBC register
can: mcp251xfd: mcp251xfd_regmap_crc_read(): improve workaround handling for mcp2517fd
can: kvaser_usb: kvaser_usb_leaf: fix bittiming limits
can: kvaser_usb: kvaser_usb_leaf: fix CAN clock frequency regression
can: kvaser_usb: replace run-time checks with struct kvaser_usb_driver_info
can: m_can: m_can_{read_fifo,echo_tx_event}(): shift timestamp to full 32 bits
can: m_can: m_can_chip_config(): actually enable internal timestamping
can: grcan: grcan_probe(): remove extra of_node_get()
can: gs_usb: gs_usb_open/close(): fix memory leak
can: rcar_canfd: Fix data transmission failed on R-Car V3U
Revert "can: xilinx_can: Limit CANFD brp to 2"
can: bcm: use call_rcu() instead of costly synchronize_rcu()
====================
Merge branches 'msm-next-lumag-core', 'msm-next-lumag-dpu', 'msm-next-lumag-dp', 'msm-next-lumag-dsi', 'msm-next-lumag-hdmi', 'msm-next-lumag-mdp5' and 'msm-next-lumag-mdp4' into msm-next-lumag
Changes in this merge:
Core:
- client utilization via fdinfo support
- fix fence rollover issue
DPU:
- constification of HW catalog
- support for using encoder as CRC source
- WB support on sc7180
- WB resolution fixes
- enable DSPP support for sc7280
DP:
- dropped custom bulk clock implementation
- made dp_bridge_mode_valid() return MODE_CLOCK_HIGH where applicable
- fix link retraining on resolution change
MDP5:
- MSM8953 perf data
HDMI:
- YAML'ification of schema
- dropped obsolete GPIO support
- misc cleanups
Wan Jiabing [Tue, 26 Apr 2022 13:21:26 +0000 (21:21 +0800)]
drm/msm: Use div64_ul instead of do_div
Fix following coccicheck warning:
drivers/gpu/drm/msm/msm_gpu_devfreq.c:72:1-7: WARNING: do_div() does a 64-by-32 division, please consider using div64_ul instead.
Use div64_ul instead of do_div to avoid a possible truncation.
Rob Clark [Thu, 9 Jun 2022 17:42:12 +0000 (10:42 -0700)]
drm/msm: Expose client engine utilization via fdinfo
Similar to AMD commit 874442541133 ("drm/amdgpu: Add show_fdinfo() interface"), using the
infrastructure added in previous patches, we add basic client info
and GPU engine utilisation for msm.
Dmitry Baryshkov [Sat, 21 May 2022 15:14:36 +0000 (18:14 +0300)]
clk: qcom: gcc-msm8960: create tsens device if there are no child nodes
Currently gcc-msm8960 driver manually creates tsens platform device
manually. It would be better to follow IPQ8064 approach, where tsens
device is defined as gcc's child device in the device tree. If nothing
else, it removes gcc's dependency on QFPROM, thus allowing clock
controller to be probed earlier.
Don't create it in case there are available child nodes (tsens) inside
the gcc's device tree node.
Dmitry Baryshkov [Sat, 21 May 2022 15:14:35 +0000 (18:14 +0300)]
dt-bindings: clock: qcom,gcc-apq8064: split tsens to the child node
Split tsens properties to the child node of the gcc. This follows the
lead of ipq8064 (which also uses a separate node for tsens) and makes
device tree closer to other platforms, where tsens is a completely
separate device.
Dmitry Baryshkov [Sat, 21 May 2022 15:14:34 +0000 (18:14 +0300)]
dt-bindings: clock: qcom,gcc-apq8064: move msm8960 compat from gcc-other.yaml
MSM8960 shares the design (and the driver) of the global clock
controller with APQ8064. Move it from clock/qcom,gcc-other.yaml to
clock/qcom,gcc-apq8064.yaml.
As the example in gcc-other.yaml was using qcom,gcc-msm8960 compat string,
change it to qcom,gcc-msm8974.
Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521151437.1489111-2-dmitry.baryshkov@linaro.org
Yang Yingliang [Tue, 28 Jun 2022 14:02:48 +0000 (22:02 +0800)]
soc: fsl: guts: fix return value check in fsl_guts_init()
In case of error, of_iomap() returns NULL pointer not ERR_PTR().
The IS_ERR() test in the return value check should be replaced
with NULL test and return -ENOMEM as error value.
Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Reviewed-by: Michael Walle <michael@walle.cc> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
When adding the bindings for the D1 display engine, I missed the
condition for the number of pipelines. D1 has two mixers, so it
will have two pipeline references.
Mark Brown [Fri, 1 Jul 2022 11:22:13 +0000 (12:22 +0100)]
arm64: defconfig: Enable Allwinner built in CODECs
Allwinner provide an audio CODEC as part of their SoCs which is used on a
number of designs, enable the driver as part of defconfig in order to
improve coverage of this in the various automated testing systems.
Samuel Holland [Sat, 2 Jul 2022 19:01:35 +0000 (14:01 -0500)]
clk: sunxi: Do not select the PRCM MFD
The PRCM MFD driver is already selected by the two platforms where it is
actually used (MACH_SUN6I and MACH_SUN8I). Selecting it here builds it
unnecessarily on the rest of the Allwinner platforms.
Samuel Holland [Sat, 2 Jul 2022 19:01:34 +0000 (14:01 -0500)]
clk: sunxi: Limit legacy clocks to 32-bit ARM
The sunxi legacy clocks were never compatible with any 64-bit SoC,
so there is no point in building them as part of a 64-bit ARM kernel.
They make even less sense being built in to a 64-bit RISC-V kernel.
Hangyu Hua [Wed, 18 May 2022 06:58:56 +0000 (14:58 +0800)]
drm: bridge: sii8620: fix possible off-by-one
The next call to sii8620_burst_get_tx_buf will result in off-by-one
When ctx->burst.tx_count + size == ARRAY_SIZE(ctx->burst.tx_buf). The same
thing happens in sii8620_burst_get_rx_buf.
This patch also change tx_count and tx_buf to rx_count and rx_buf in
sii8620_burst_get_rx_buf. It is unreasonable to check tx_buf's size and
use rx_buf.
drm/msm/mdp4: get rid of struct mdp4_platform_config
Struct mdp4_platform_config is a relict from the DT-conversion time.
Move the max_clk field to the mdp4_kms_init(), the place where it is
used and drop the struct mdp4_platform_config and the mdp4_get_config()
function.
drm/msm/mdp4: move iommu_domain_alloc() call close to its usage
Move iommu_domain_alloc() in front of adress space/IOMMU initialization.
This allows us to drop it from struct mdp4_cfg_platform which
remained from the pre-DT days.
Dmitry Baryshkov [Thu, 16 Jun 2022 08:50:57 +0000 (11:50 +0300)]
drm/msm/hdmi: support attaching the "next" bridge
There might be a chain of bridges attached to the HDMI node
(including but not limited to the display-connector bridge). Add support
for attaching them right to the HDMI bridge chain.
The MSM HDMI driver has support for hpd_regs on 8x74/8084: supply
regulators that are to be enabled for HPD to work. Currently these
regulators contain the hpd_gdsc, which was replaced by the power-domains
support and hpd-5v/hpd-5v-en, which are not used by the chip itself.
They power up the ESD bridge.
However it is a separate device which should be represented separately
in the device tree.
None of upstreamed devices support these properties. Thus drop support
for them from the HDMI driver.
Several platform configs use empty 'none' regulator arrays. They are not
necessary, as the code will use corresponding _cnt field and skip the
array completely. Drop them now.
drm/msm/hdmi: enable core-vcc/core-vdda-supply for 8996 platform
DB820c makes use of core-vcc-supply and core-vdda-supply, however the
driver code doesn't support these regulators. Enable them for HDMI on
8996 platform.
Fixes: 0afbe59edd3f ("drm/msm/hdmi: Add basic HDMI support for msm8996") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Patchwork: https://patchwork.freedesktop.org/patch/488857/ Link: https://lore.kernel.org/r/20220609122350.3157529-8-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
projects / people / ms / linux.git / log
