Charles Keepax [Thu, 23 Jun 2022 12:51:59 +0000 (13:51 +0100)]
ASoC: uniphier: Remove now redundant non_legacy_dai_naming flag
The ASoC core has now been changed to default to the non-legacy DAI
naming, as such drivers using the new scheme no longer need to specify
the non_legacy_dai_naming flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:58 +0000 (13:51 +0100)]
ASoC: topology: KUnit: Remove now redundant non_legacy_dai_naming flag
The ASoC core has now been changed to default to the non-legacy DAI
naming, as such drivers using the new scheme no longer need to specify
the non_legacy_dai_naming flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:57 +0000 (13:51 +0100)]
ASoC: test-component: Remove now redundant non_legacy_dai_naming flag
The ASoC core has now been changed to default to the non-legacy DAI
naming, as such drivers using the new scheme no longer need to specify
the non_legacy_dai_naming flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:56 +0000 (13:51 +0100)]
ASoC: tegra: Remove now redundant non_legacy_dai_naming flag
The ASoC core has now been changed to default to the non-legacy DAI
naming, as such drivers using the new scheme no longer need to specify
the non_legacy_dai_naming flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:55 +0000 (13:51 +0100)]
ASoC: sunxi: Remove now redundant non_legacy_dai_naming flag
The ASoC core has now been changed to default to the non-legacy DAI
naming, as such drivers using the new scheme no longer need to specify
the non_legacy_dai_naming flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:54 +0000 (13:51 +0100)]
ASoC: soc-utils: Remove now redundant non_legacy_dai_naming flag
The ASoC core has now been changed to default to the non-legacy DAI
naming, as such drivers using the new scheme no longer need to specify
the non_legacy_dai_naming flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:53 +0000 (13:51 +0100)]
ASoC: samsung: Remove now redundant non_legacy_dai_naming flag
The ASoC core has now been changed to default to the non-legacy DAI
naming, as such drivers using the new scheme no longer need to specify
the non_legacy_dai_naming flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:52 +0000 (13:51 +0100)]
ASoC: pistachio: Remove now redundant non_legacy_dai_naming flag
The ASoC core has now been changed to default to the non-legacy DAI
naming, as such drivers using the new scheme no longer need to specify
the non_legacy_dai_naming flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:51 +0000 (13:51 +0100)]
ASoC: meson: Remove now redundant non_legacy_dai_naming flag
The ASoC core has now been changed to default to the non-legacy DAI
naming, as such drivers using the new scheme no longer need to specify
the non_legacy_dai_naming flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:50 +0000 (13:51 +0100)]
ASoC: fsl: Remove now redundant non_legacy_dai_naming flag
The ASoC core has now been changed to default to the non-legacy DAI
naming, as such drivers using the new scheme no longer need to specify
the non_legacy_dai_naming flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:49 +0000 (13:51 +0100)]
media: TDA1997x: Remove now redundant non_legacy_dai_naming flag
The ASoC core has now been changed to default to the non-legacy DAI
naming, as such drivers using the new scheme no longer need to specify
the non_legacy_dai_naming flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:48 +0000 (13:51 +0100)]
ASoC: core: Switch core to new DAI naming flag
Now all the drivers are updated to have the new legacy_dai_naming
flag, update the core code so it also uses the new flag. Paving
the way for the old non_legacy_dai_naming flag to be removed.
It should be noted this patch will affect the CODEC drivers that don't
specify the non_legacy_dai_naming flag. These drivers will update from
using legacy DAI naming to the new scheme after this patch, this is
being considered a fix as the intention was for all CODEC drivers to use
the new scheme and all existing CODEC drivers were updated to do so
before componentisation. This just corrects those devices that have
snuck in since componentisation. The corrected devices are as
follows:
Some of these devices are used in some in kernel machine drivers,
however it appears all the usages use the actual DAI driver name
(since snd_soc_find_dai checks both the DAI name and the DAI driver
name). So it is not believed this change will break any in tree
machine drivers.
Charles Keepax [Thu, 23 Jun 2022 12:51:47 +0000 (13:51 +0100)]
ASoC: samsung: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:46 +0000 (13:51 +0100)]
ASoC: mxs-saif: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
This driver appears to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:45 +0000 (13:51 +0100)]
ASoC: ti: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:44 +0000 (13:51 +0100)]
ASoC: ux500: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
This driver appears to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:43 +0000 (13:51 +0100)]
ASoC: sof: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:42 +0000 (13:51 +0100)]
ASoC: pxa: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:41 +0000 (13:51 +0100)]
ASoC: au1x: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:40 +0000 (13:51 +0100)]
ASoC: rockchip: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:39 +0000 (13:51 +0100)]
ASoC: test-component: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
This driver appears to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:38 +0000 (13:51 +0100)]
ASoC: qcom: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:37 +0000 (13:51 +0100)]
ASoC: dwc: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
This driver appears to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:36 +0000 (13:51 +0100)]
ASoC: adi: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:35 +0000 (13:51 +0100)]
ASoC: xtensa: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
This driver appears to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:34 +0000 (13:51 +0100)]
ASoC: fsl: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:33 +0000 (13:51 +0100)]
ASoC: atmel: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:32 +0000 (13:51 +0100)]
ASoC: amd: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:31 +0000 (13:51 +0100)]
ASoC: sti-uniperf: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
This driver appears to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:30 +0000 (13:51 +0100)]
ASoC: meson: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:29 +0000 (13:51 +0100)]
ASoC: Intel: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:28 +0000 (13:51 +0100)]
ASoC: sunxi: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:27 +0000 (13:51 +0100)]
ASoC: xilinx: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:26 +0000 (13:51 +0100)]
ASoC: hisilicon: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
This driver appears to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:25 +0000 (13:51 +0100)]
ASoC: tegra: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:24 +0000 (13:51 +0100)]
ASoC: sh: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:23 +0000 (13:51 +0100)]
ASoC: bcm: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:22 +0000 (13:51 +0100)]
ASoC: stm32: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:21 +0000 (13:51 +0100)]
ASoC: ep93xx: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:20 +0000 (13:51 +0100)]
ASoC: jz4740-i2c: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
This driver appears to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:19 +0000 (13:51 +0100)]
ASoC: spear: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:18 +0000 (13:51 +0100)]
ASoC: img: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
These drivers appear to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:17 +0000 (13:51 +0100)]
drm/vc4: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
This driver appears to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:16 +0000 (13:51 +0100)]
soundwire: intel: Migrate to new style legacy DAI naming flag
Change the legacy DAI naming flag from opting in to the new scheme
(non_legacy_dai_naming), to opting out of it (legacy_dai_naming).
This driver appears to be on the CPU side of the DAI link and
currently uses the legacy naming, so add the new flag.
Charles Keepax [Thu, 23 Jun 2022 12:51:15 +0000 (13:51 +0100)]
ASoC: soc-component: Add legacy_dai_naming flag
Historically, the legacy DAI naming scheme was applied to platform
drivers and the newer scheme to CODEC drivers. During componentisation
the core lost the knowledge of if a driver was a CODEC or platform, they
were all now components. To continue to support the legacy naming on
older platform drivers a flag was added to the snd_soc_component_driver
structure, non_legacy_dai_naming, to indicate to use the new scheme and
this was applied to all CODECs as part of the migration.
However, a slight issue appears to be developing with respect to this
flag being opt in for the non-legacy scheme, which presumably we want to
be the primary scheme used. Many codec drivers appear to forget to
include this flag:
It would seem more sensible to change the flag to legacy_dai_naming
making the new scheme opt out. As a first step this patch adds a new
flag for this so that the users can be updated.
Daniel Mack [Fri, 24 Jun 2022 10:47:11 +0000 (12:47 +0200)]
ASoC: max98396: Implement DSP speaker monitor
Allow the selection of the TDM slot that is used to send back speaker
monitor data. The DT property adi,spkfb-slot-no can be used to configure
this setting which defaults to 2.
Daniel Mack [Fri, 24 Jun 2022 10:47:08 +0000 (12:47 +0200)]
ASoC: max98396: add voltage regulators
The device has up to 5 potentially independent power supplies:
AVDD, DVDD, DVVDIO, VBAT and PVDD. The former 3 are mandatory for the
device to function. One of VBAT and PVDD should also be made available.
Regulators are enabled during probe time and will stay active except when in
suspend mode.
Futher, the chip needs to be informed about the presence of VBAT through a
bit in register 0x20a0.
Deming Wang [Wed, 22 Jun 2022 19:23:06 +0000 (15:23 -0400)]
virtio_ring: make vring_create_virtqueue_split prettier
Add some spaces to vring_alloc_queue(make it look prettier).
Signed-off-by: Deming Wang <wangdeming@inspur.com>
Message-Id: <20220622192306.4371-1-wangdeming@inspur.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
vhost-vdpa: call vhost_vdpa_cleanup during the release
Before commit 3d5698793897 ("vhost-vdpa: introduce asid based IOTLB")
we call vhost_vdpa_iotlb_free() during the release to clean all regions
mapped in the iotlb.
That commit removed vhost_vdpa_iotlb_free() and added vhost_vdpa_cleanup()
to do some cleanup, including deleting all mappings, but we forgot to call
it in vhost_vdpa_release().
This causes that if an application does not remove all mappings explicitly
(or it crashes), the mappings remain in the iotlb and subsequent
applications may fail if they map the same addresses.
Calling vhost_vdpa_cleanup() also fixes a memory leak since we are not
freeing `v->vdev.vqs` during the release from the same commit.
Since vhost_vdpa_cleanup() calls vhost_dev_cleanup() we can remove its
call from vhost_vdpa_release().
Fixes: 3d5698793897 ("vhost-vdpa: introduce asid based IOTLB") Cc: gautam.dawar@xilinx.com Signed-off-by: Stefano Garzarella <sgarzare@redhat.com>
Message-Id: <20220622151407.51232-1-sgarzare@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Eugenio Pérez <eperezma@redhat.com> Acked-by: Jason Wang <jasowang@redhat.com>
Stephan Gerhold [Tue, 21 Jun 2022 11:06:21 +0000 (13:06 +0200)]
virtio_mmio: Restore guest page size on resume
Virtio devices might lose their state when the VMM is restarted
after a suspend to disk (hibernation) cycle. This means that the
guest page size register must be restored for the virtio_mmio legacy
interface, since otherwise the virtio queues are not functional.
This is particularly problematic for QEMU that currently still defaults
to using the legacy interface for virtio_mmio. Write the guest page
size register again in virtio_mmio_restore() to make legacy virtio_mmio
devices work correctly after hibernation.
Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Message-Id: <20220621110621.3638025-3-stephan.gerhold@kernkonzept.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Stephan Gerhold [Tue, 21 Jun 2022 11:06:20 +0000 (13:06 +0200)]
virtio_mmio: Add missing PM calls to freeze/restore
Most virtio drivers provide freeze/restore callbacks to finish up
device usage before suspend and to reinitialize the virtio device after
resume. However, these callbacks are currently only called when using
virtio_pci. virtio_mmio does not have any PM ops defined.
This causes problems for example after suspend to disk (hibernation),
since the virtio devices might lose their state after the VMM is
restarted. Calling virtio_device_freeze()/restore() ensures that
the virtio devices are re-initialized correctly.
Fix this by implementing the dev_pm_ops for virtio_mmio,
similar to virtio_pci_common.
Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Message-Id: <20220621110621.3638025-2-stephan.gerhold@kernkonzept.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Jason Wang [Mon, 20 Jun 2022 05:11:14 +0000 (13:11 +0800)]
caif_virtio: fix race between virtio_device_ready() and ndo_open()
We currently depend on probe() calling virtio_device_ready() -
which happens after netdev
registration. Since ndo_open() can be called immediately
after register_netdev, this means there exists a race between
ndo_open() and virtio_device_ready(): the driver may start to use the
device (e.g. TX) before DRIVER_OK which violates the spec.
Fix this by switching to use register_netdevice() and protect the
virtio_device_ready() with rtnl_lock() to make sure ndo_open() can
only be called after virtio_device_ready().
Fixes: 0d2e1a2926b18 ("caif_virtio: Introduce caif over virtio") Signed-off-by: Jason Wang <jasowang@redhat.com>
Message-Id: <20220620051115.3142-3-jasowang@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Jason Wang [Fri, 17 Jun 2022 07:29:49 +0000 (15:29 +0800)]
virtio-net: fix race between ndo_open() and virtio_device_ready()
We currently call virtio_device_ready() after netdev
registration. Since ndo_open() can be called immediately
after register_netdev, this means there exists a race between
ndo_open() and virtio_device_ready(): the driver may start to use the
device before DRIVER_OK which violates the spec.
Fix this by switching to use register_netdevice() and protect the
virtio_device_ready() with rtnl_lock() to make sure ndo_open() can
only be called after virtio_device_ready().
Fixes: 4baf1e33d0842 ("virtio_net: enable VQs early") Signed-off-by: Jason Wang <jasowang@redhat.com>
Message-Id: <20220617072949.30734-1-jasowang@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Matthew Auld [Wed, 22 Jun 2022 15:59:19 +0000 (16:59 +0100)]
drm/i915: tweak the ordering in cpu_write_needs_clflush
For imported dma-buf objects we leave the object as cache_coherent = 0
across all platforms, which is reasonable given that have no clue what
the memory underneath is, and its not like the driver can ever manually
clflush the pages anyway (like with i915_gem_clflush_object) for such
objects. However on discrete we choose to treat cache_dirty = true as a
programmer error, leading to a warning. The simplest fix looks to be to
just change the ordering in cpu_write_needs_clflush to prevent ever
setting cache_dirty for dma-buf objects on discrete.
Fixes: d028a7690d87 ("drm/i915/dmabuf: Fix prime_mmap to work when using LMEM") Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5266 Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220622155919.355081-1-matthew.auld@intel.com
Martin Kaiser [Mon, 27 Jun 2022 08:53:54 +0000 (10:53 +0200)]
staging: r8188eu: make power sequences static
Simplify the handling of "power sequences". At the moment, this is rather
complicated:
The hal layer calls HalPwrSeqCmdParsing. This function takes a pointer to
a power sequence. The sequences themselves are defined as global variables
in a separate file. There's an alias for each sequence, the callers of
HalPwrSeqCmdParsing use these aliases instead of the sequences themselves.
There's no point in passing the sequences around. We can move the
sequences into the same file as the HalPwrSeqCmdParsing function where
they are used. Callers of HalPwrSeqCmdParsing can refer to a sequence by
using a numeric define rather than a pointer to the sequence.
Felix Schlepper [Fri, 24 Jun 2022 13:54:55 +0000 (15:54 +0200)]
Staging: rtl8192e: Cleaning up error handling
Moved error handling to one common block.
This removes double checking if all txb->fragments[]
were initialized.
The original code worked fine, but this is cleaner.
Felix Schlepper [Fri, 24 Jun 2022 13:54:54 +0000 (15:54 +0200)]
Staging: rtl8192e: Using kzalloc and delete memset
By using kzalloc, we can delete a memset. The practical difference
is that using kzalloc() will zero out the txb->fragments[] array.
The original code worked fine, but zeroing everything seems nicer.
José Expósito [Mon, 20 Jun 2022 16:06:40 +0000 (18:06 +0200)]
drm/doc: Add KUnit documentation
Explain how to run the KUnit tests present in the DRM subsystem and
clarify why the UML-only options were not added to the configuration
file present in drivers/gpu/drm/.kunitconfig [1] [2].
José Expósito [Mon, 20 Jun 2022 16:06:39 +0000 (18:06 +0200)]
drm/format-helper: Add KUnit tests for drm_fb_xrgb8888_to_rgb332()
Test the conversion from XRGB8888 to RGB332.
What is tested?
- Different values for the X in XRGB8888 to make sure it is ignored
- Different clip values: Single pixel and full and partial buffer
- Well known colors: White, black, red, green, blue, magenta, yellow
and cyan
- Other colors: Randomly picked
- Destination pitch
How to run the tests?
$ ./tools/testing/kunit/kunit.py run --kunitconfig=drivers/gpu/drm/tests \
--kconfig_add CONFIG_VIRTIO_UML=y \
--kconfig_add CONFIG_UML_PCI_OVER_VIRTIO=y
Anshuman Gupta [Thu, 16 Jun 2022 12:22:49 +0000 (17:52 +0530)]
drm/i915/dgfx: Disable d3cold at gfx root port
Currently i915 disables d3cold for i915 pci dev.
This blocks D3 for i915 gfx pci upstream bridge (VSP).
Let's disable d3cold at gfx root port to make sure that
i915 gfx VSP can transition to D3 to save some power.
We don't need to disable/enable d3cold in rpm, s2idle
suspend/resume handlers. Disabling/Enabling d3cold at
gfx root port in probe/remove phase is sufficient.
Kefeng Wang [Tue, 7 Jun 2022 12:50:27 +0000 (20:50 +0800)]
arm64: Add HAVE_IOREMAP_PROT support
With ioremap_prot() definition from generic ioremap, also move
pte_pgprot() from hugetlbpage.c into pgtable.h, then arm64 could
have HAVE_IOREMAP_PROT, which will enable generic_access_phys()
code, it is useful for debug, eg, gdb.
Kefeng Wang [Tue, 7 Jun 2022 12:50:26 +0000 (20:50 +0800)]
arm64: mm: Convert to GENERIC_IOREMAP
Add hook for arm64's special operation when ioremap(), then
ioremap_wc/np/cache is converted to use ioremap_prot() from
GENERIC_IOREMAP, update the Copyright and kill the unused
inclusions.
Kefeng Wang [Tue, 7 Jun 2022 12:50:25 +0000 (20:50 +0800)]
mm: ioremap: Add ioremap/iounmap_allowed()
Add special hook for architecture to verify addr, size or prot
when ioremap() or iounmap(), which will make the generic ioremap
more useful.
ioremap_allowed() return a bool,
- true means continue to remap
- false means skip remap and return directly
iounmap_allowed() return a bool,
- true means continue to vunmap
- false code means skip vunmap and return directly
Meanwhile, only vunmap the address when it is in vmalloc area
as the generic ioremap only returns vmalloc addresses.
Acked-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Baoquan He <bhe@redhat.com> Link: https://lore.kernel.org/r/20220607125027.44946-5-wangkefeng.wang@huawei.com Signed-off-by: Will Deacon <will@kernel.org>
Instead of walking the list of children of an ACPI device directly,
use acpi_dev_for_each_child() to carry out an action for all of
the given ACPI device's children.
This will help to eliminate the children list head from struct
acpi_device as it is redundant and it is used in questionable ways
in some places (in particular, locking is needed for walking the
list pointed to it safely, but it is often missing).
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/2726954.BEx9A2HvPv@kreacher
The runtime hook arch_iounmap() on ARM is useless, kill arch_iounmap()
and __iounmap().
Cc: Russell King <linux@armlinux.org.uk> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20220607125027.44946-2-wangkefeng.wang@huawei.com Signed-off-by: Will Deacon <will@kernel.org>
Fixes: ebc3197963fc ("ipmr: add rcu protection over (struct vif_device)->dev") Reported-by: syzbot <syzkaller@googlegroups.com> Signed-off-by: Eric Dumazet <edumazet@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Vincent Guittot [Fri, 24 Jun 2022 07:45:49 +0000 (09:45 +0200)]
firmware: arm_scmi: Fix response size warning for OPTEE transport
Some protocols check the response size with the expected value but optee
shared memory doesn't return such size whereas it is available in the
optee output buffer.
As an example, the base protocol compares the response size with the
expected result when requesting the list of protocol which triggers a
warning with optee shared memory:
net: Print hashed skb addresses for all net and qdisc events
The following commits added support for printing the real address- 65875073eddd ("net: use %px to print skb address in trace_netif_receive_skb") 70713dddf3d2 ("net_sched: introduce tracepoint trace_qdisc_enqueue()") 851f36e40962 ("net_sched: use %px to print skb address in trace_qdisc_dequeue()")
However, tracing the packet traversal shows a mix of hashes and real
addresses. Pasting a sample trace for reference-
Switch the trace print formats to %p for all the events to have a
consistent format of printing the hashed addresses in all cases.
Signed-off-by: Sean Tranchetti <quic_stranche@quicinc.com> Signed-off-by: Subash Abhinov Kasiviswanathan <quic_subashab@quicinc.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Mark Brown [Mon, 20 Jun 2022 15:21:50 +0000 (16:21 +0100)]
ARM: dts: am33xx: Map baseboard EEPROM on BeagleBone Black
The identification EEPROM on the BeagleBone Black baseboard is supplied
by VDD_3V3A which is supplied by LDO4 on the PMIC. Map this as per the DT
binding for the EEPROM. Since this supply is always-on this has no
practical impact but it does silence a warning at boot due to using a dummy
regulator.
Signed-off-by: Mark Brown <broonie@kernel.org>
Message-Id: <20220620152150.708664-1-broonie@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
It was caused by the 'l' passed into tipc_bcast_rcv() is NULL. When it
creates a node in tipc_node_check_dest(), after inserting the new node
into hashtable in tipc_node_create(), it creates the bc link. However,
there is a gap between this insert and bc link creation, a bc packet
may come in and get the node from the hashtable then try to dereference
its bc link, which is NULL.
This patch is to fix it by moving the bc link creation before inserting
into the hashtable.
Note that for a preliminary node becoming "real", the bc link creation
should also be called before it's rehashed, as we don't create it for
preliminary nodes.
Fixes: 4cbf8ac2fe5a ("tipc: enable creating a "preliminary" node") Reported-by: Shuang Li <shuali@redhat.com> Signed-off-by: Xin Long <lucien.xin@gmail.com> Acked-by: Jon Maloy <jmaloy@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Eric Dumazet [Fri, 24 Jun 2022 15:30:20 +0000 (15:30 +0000)]
tunnels: do not assume mac header is set in skb_tunnel_check_pmtu()
Recently added debug in commit f9aefd6b2aa3 ("net: warn if mac header
was not set") caught a bug in skb_tunnel_check_pmtu(), as shown
in this syzbot report [1].
In ndo_start_xmit() paths, there is really no need to use skb->mac_header,
because skb->data is supposed to point at it.
Fixes: 4cb47a8644cc ("tunnels: PMTU discovery support for directly bridged IP packets") Reported-by: syzbot <syzkaller@googlegroups.com> Signed-off-by: Eric Dumazet <edumazet@google.com> Cc: Stefano Brivio <sbrivio@redhat.com> Reviewed-by: Stefano Brivio <sbrivio@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
this is a pull request of 22 patches for net-next/master.
The first 2 patches target the xilinx driver. Srinivas Neeli's patch
adds Transmitter Delay Compensation (TDC) support, a patch by me fixes
a typo.
The next patch is by me and fixes a typo in the m_can driver.
Another patch by me allows the configuration of fixed bit rates
without need for do_set_bittiming callback.
The following 7 patches are by Vincent Mailhol and refactor the
can-dev module and Kbuild, de-inline the can_dropped_invalid_skb()
function, which has grown over the time, and drop outgoing skbs if the
controller is in listen only mode.
Max Staudt's patch fixes a reference in the networking/can.rst
documentation.
Vincent Mailhol provides 2 patches with cleanups for the etas_es58x
driver.
Conor Dooley adds bindings for the mpfs-can to the PolarFire SoC dtsi.
Another patch by me allows the configuration of fixed data bit rates
without need for do_set_data_bittiming callback.
The last 5 patches are by Frank Jungclaus. They prepare the esd_usb
driver to add support for the the CAN-USB/3 device in a later series.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
David S. Miller [Mon, 27 Jun 2022 10:37:56 +0000 (11:37 +0100)]
Merge branch 'Renesas-rz-n1'
Clément Léger says:
====================
net: add support for Renesas RZ/N1 ethernet su
The Renesas RZ/N1 SoCs features an ethernet subsystem which contains
(most notably) a switch, two GMACs, and a MII converter [1]. This
series adds support for the switch and the MII converter.
The MII converter present on this SoC has been represented as a PCS
which sit between the MACs and the PHY. This PCS driver is probed from
the device-tree since it requires to be configured. Indeed the MII
converter also contains the registers that are handling the muxing of
ports (Switch, MAC, HSR, RTOS, etc) internally to the SoC.
The switch driver is based on DSA and exposes 4 ports + 1 CPU
management port. It include basic bridging support as well as FDB and
statistics support.
-----
Changes in V9:
- Cover letter:
- Remove comment about RZN1 patches that are now in the master branch.
- Commits:
- Add Vladimir Oltean Reviewed-by
- PCS:
- Add "Depends on OF" for PCS_RZN1_MIIC due to error found by intel
kernel test robot <lkp@intel.com>.
- Check return value of of_property_read_u32() for
"renesas,miic-switch-portin" property before setting conf.
- Return miic_parse_dt() return value in miic_probe() on error
- Switch:
- Add "Depends on OF" for NET_DSA_RZN1_A5PSW due to errors found by
intel kernel test robot <lkp@intel.com>.
- DT:
- Add spaces between switch port and '{'
====================
Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Clément Léger [Fri, 24 Jun 2022 14:40:01 +0000 (16:40 +0200)]
MAINTAINERS: add Renesas RZ/N1 switch related driver entry
After contributing the drivers, volunteer for maintenance and add
myself as the maintainer for Renesas RZ/N1 switch related drivers.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Add description for the switch, GMAC2 and MII converter. With these
definitions, the switch port 0 and 1 (MII port 5 and 4) are working on
RZ/N1D-DB board.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Clément Léger [Fri, 24 Jun 2022 14:39:59 +0000 (16:39 +0200)]
ARM: dts: r9a06g032: describe switch
Add description of the switch that is present on the RZ/N1 SoC. This
description includes ethernet-ports description for all the ports that
are present on the switch along with their connection to the MII
converter ports and to the GMAC for the CPU port.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Clément Léger [Fri, 24 Jun 2022 14:39:58 +0000 (16:39 +0200)]
ARM: dts: r9a06g032: describe GMAC2
RZ/N1 SoC includes two MAC named GMACx that are compatible with the
"snps,dwmac" driver. GMAC1 is connected directly to the MII converter
port 1. GMAC2 however can be used as the MAC for the switch CPU
management port or can be muxed to be connected directly to the MII
converter port 2. This commit add description for the GMAC2 which will
be used by the switch description.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Clément Léger [Fri, 24 Jun 2022 14:39:57 +0000 (16:39 +0200)]
ARM: dts: r9a06g032: describe MII converter
Add the MII converter node which describes the MII converter that is
present on the RZ/N1 SoC.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Add "renesas,rzn1-gmac" and "renesas,r9a06g032-gmac" compatible strings.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Clément Léger [Fri, 24 Jun 2022 14:39:54 +0000 (16:39 +0200)]
net: dsa: rzn1-a5psw: add FDB support
This commits add forwarding database support to the driver. It
implements fdb_add(), fdb_del() and fdb_dump().
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Clément Léger [Fri, 24 Jun 2022 14:39:53 +0000 (16:39 +0200)]
net: dsa: rzn1-a5psw: add statistics support
Add statistics support to the rzn1-a5psw driver by implementing the
following dsa_switch_ops callbacks:
- get_sset_count()
- get_strings()
- get_ethtool_stats()
- get_eth_mac_stats()
- get_eth_ctrl_stats()
- get_rmon_stats()
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Add Renesas RZ/N1 advanced 5 port switch driver. This switch handles 5
ports including 1 CPU management port. A MDIO bus is also exposed by
this switch and allows to communicate with PHYs connected to the ports.
Each switch port (except for the CPU management ports) is connected to
the MII converter.
This driver includes basic bridging support, more support will be added
later (vlan, etc).
Suggested-by: Jean-Pierre Geslin <jean-pierre.geslin@non.se.com> Suggested-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Clément Léger [Fri, 24 Jun 2022 14:39:51 +0000 (16:39 +0200)]
dt-bindings: net: dsa: add bindings for Renesas RZ/N1 Advanced 5 port switch
Add bindings for Renesas RZ/N1 Advanced 5 port switch. This switch is
present on Renesas RZ/N1 SoC and was probably provided by MoreThanIP.
This company does not exists anymore and has been bought by Synopsys.
Since this IP can't be find anymore in the Synospsy portfolio, lets use
Renesas as the vendor compatible for this IP.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Clément Léger [Fri, 24 Jun 2022 14:39:50 +0000 (16:39 +0200)]
net: pcs: add Renesas MII converter driver
Add a PCS driver for the MII converter that is present on the Renesas
RZ/N1 SoC. This MII converter is reponsible for converting MII to
RMII/RGMII or act as a MII pass-trough. Exposing it as a PCS allows to
reuse it in both the switch driver and the stmmac driver. Currently,
this driver only allows the PCS to be used by the dual Cortex-A7
subsystem since the register locking system is not used.
Signed-off-by: Clément Léger <clement.leger@bootlin.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
projects / people / ms / linux.git / log
