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7 days agoAlign IRA and LRA when it comes to rejecting equivalences
Stefan Schulze Frielinghaus [Fri, 12 Jun 2026 07:53:48 +0000 (09:53 +0200)] 
Align IRA and LRA when it comes to rejecting equivalences

During costing of IRA, pseudos with an equivalence are taken out of the
equation by assigning MEM to those.  However, during LRA, some
equivalences are rejected which means those previously spilled pseudos
are then definitely spilled.  In some cases, like for PIC, we already
know during IRA that an equivalence will be rejected during LRA.
Therefore, do not assign MEM to those pseudos during IRA which means
there is a fair chance that they get a register assigned in the end.

The attached tests are all derived from glibc.  Without this patch some
pseudos are spilled resulting in stack frames just due to those spills.
With this patch, no pseudos are spilled and no unnecessary stack frames
are set up.

Note, the added conjunct in find_costs_and_classes() is basically the
negated form of the disjunct from lra_constraints()

  || (pic_offset_table_rtx
      && ((const_pool_ok_p (PSEUDO_REGNO_MODE (i), x)
           && (targetm.preferred_reload_class
               (x, lra_get_allocno_class (i)) == NO_REGS))
          || contains_symbol_ref_p (x))))

except that IRAs reg_allocno_class() is used instead of LRAs
lra_get_allocno_class().

gcc/ChangeLog:

* ira-costs.cc (find_costs_and_classes): Do not honour equivs if
they get rejected by LRA anyway.
* ira-int.h (CONST_POOL_OK_P): Move CONST_POOL_OK_P here ...
* lra-constraints.cc (CONST_POOL_OK_P): from there.

gcc/testsuite/ChangeLog:

* gcc.target/s390/ira-pic-spill-1.c: New test.
* gcc.target/s390/ira-pic-spill-2.c: New test.
* gcc.target/s390/ira-pic-spill-3.c: New test.

7 days agoDaily bump.
GCC Administrator [Fri, 12 Jun 2026 00:16:30 +0000 (00:16 +0000)] 
Daily bump.

7 days agoAVR: Tweak __floatdidf, __floatundidf.
Georg-Johann Lay [Thu, 11 Jun 2026 19:31:05 +0000 (21:31 +0200)] 
AVR: Tweak __floatdidf, __floatundidf.

libgcc/config/avr/libf7/
* libf7.c (__floatdidf, __floatundidf): Minor tweak.

8 days agoImplement warnings based on variable definition and use.
Thomas Koenig [Tue, 9 Jun 2026 05:09:23 +0000 (07:09 +0200)] 
Implement warnings based on variable definition and use.

This patch grew from trying to implement PR 30438 into something bigger.
This now warns about variables which were never defined, but are used
via a new option -Wundefined-vars and implements
-Wunused-but-set-variable for Fortran.

It works by keeping tabls of several things in the attributes of a
variable: If and how it has been set (via value_set), used (via
value_used), if it has been allocated (via allocated) and if a
warning has already been emitted for the symbol.  This looks at
statements in a namespace only; control flow is *not* considered.

In every corner of the compiler that I could find where values are
set or used, flags are set accodingly. Updates are done if the new
use is considered to be more "important" than the old one. The
location of use or definition is also recorded, as is the place
where a variable may be allocated.

After all the flags have been correctly set (one at least hopes)
gfc_resolve then calls warn_unused_vs_set, which then iterates
over the symbols, calling find_unused_vs_set where all warnings
are emitted. I tried to be conservative here to avoid false
positives, so a whole lot of conditions are excluded (see the top
of the function).

I thought a bit on where to put -Wunused-read and -Wunused-intent-out.
While reading in a value and then not using it, or getting it from an
INTENT(OUT) argument may be dubious, people could use it for skipping
over unneeded data or because an API requires it. Hence, I feld that -Wall
would be too harsh, but I am open to discussion here.

The warn_undefined_vars_* tests are split because the testsuite would
not find warnings in certain lines even though they were issued and
I tried out ! { dg-warning ".+" } . I suspect some strangeness/bug
in gfortran.dg, but did not investigate further.

gcc/fortran/ChangeLog:

PR fortran/30438
PR fortran/28004
* dump-parse-tree.cc (gfc_debug_code_node): New function.
(show_attr): Add select_rank_temporary. Fix typo. Add referenced,
value_set, allocated and value_used.
* gfortran.h (enum value_set): New enum.
(enum value_used): New enum.
(gfc_symbol): Add value_set, value_used, allocated and
warning_emitted attributes.  Rename formal_at to other_loc.
Add extra_loc.
(gfc_value_set_at): Add prototype.
(gfc_lvalue_allocated_at): Likewise.
(gfc_mark_lhs_as_used): Likewise.
(gfc_value_used_expr): Likewise.
(gfc_value_set_and_used): Likewise.
(gfc_used_in_allocate_expr): Likewise.
* interface.cc (gfc_compare_actual_formal): Mark actual arguments
according to INTENT and VALUE on formal arguments.
(gfc_procedure_use): Add VALUE_ARG/VALUE_MAYBE_USED for
implicit arguments.
* intrinsic.cc (mark_args_as_used): New function.
(init_arglist): Adjust comment.
(gfc_intrinsic_sub_interface): Use mark_args_as_used.
* invoke.texi: Document -Wundefined-vars, -Wunused-intent-out and
-Wunused-read.
* io.cc (resolve_tag_format): Mark expressions as used.
(resolve_tag): Mark as used or set, depending on tag.
(gfc_resolve_dt): Mark internal unit as set.
(gfc_resolve_inquire): Mark value as set for INQUIRE_RESOLVE_TAG macro.
* lang.opt: Add -Wundefined-vars, -Wunused-intent-out and -Wunused-read.
* lang.opt.urls: Regenerated.
* resolve.cc (resolve_function): Replace formal_at by other_loc.
(resolve_call): Likewise.
(gfc_resolve_iterator): Mark iterator variable as set and used and
other expressions as used.
(resolve_forall_iterators): Likewise.
(resolve_allocate_expr): On success, call gfc_used_in_allocate_expr
and mark value as set if source is present.
(resolve_transfer): Mark set/read according to context.
(gfc_resolve_blocks): Mark expr1 and expr2 as used.
(mark_lhs_assignments_set): Prototype / new function.
(gfc_resolve_code): Mark expr2, expr3 and expr4 as used.
(var_value_is_used): New function.
(var_value_is_set): New function.
(find_unused_vs_set): New function.
(warn_unused_vs_set): New function.
(gfc_resolve): Call warn_unused_vs_set.
* symbol.cc (gfc_value_set_at): New function.
(mark_vars_as_used): New function.
(gfc_value_used_expr): New function.
(gfc_value_set_and_used): New function.
(gfc_used_in_allocate_expr): new function.
(gfc_lvalue_allocated_at): New function.
* trans-decl.cc (gfc_finish_var_decl): If we already emitted a warning,
suppress further middle-end warning o that variable.

libgfortran/ChangeLog:

PR fortran/30438
PR fortran/28004
* mk-kinds-h.sh: Add print statement so test will compile with -Wall -Werror.
* mk-sik-inc.sh: Likewise.
* mk-srk-inc.sh: Likewise.

libgomp/ChangeLog:

PR fortran/30438
PR fortran/28004
* testsuite/libgomp.fortran/alloc-1.F90: Shut up -Wunused-but-set-variable.
* testsuite/libgomp.fortran/alloc-12.f90: Likewise.

gcc/testsuite/ChangeLog:

PR fortran/30438
PR fortran/28004
* gfortran.dg/allocatable_length.f90: Add -Wno-undefined-vars.
* gfortran.dg/allocatable_scalar_6.f90: Likewise.
* gfortran.dg/allocatable_uninitialized_1.f90: Add -Wno-unused-but-set-variable
-Wno-undefined-vars.
* gfortran.dg/assignment_4.f90: Add -Wno-undefined-vars.
* gfortran.dg/attr_deprecated-2.f90: Likewise.
* gfortran.dg/c_by_val_5.f90: Add -Wno-unused-but-set-variable.
* gfortran.dg/char_component_initializer_2.f90: Shut up warning.
* gfortran.dg/char_length_1.f90: Add statement to shut up warning.
* gfortran.dg/constructor_9.f90: Add -Wno-unused-but-set-variable.
* gfortran.dg/gamma_2.f90: Add statement to shut up warning.
* gfortran.dg/gomp/allocate-10.f90: Add -Wno-unused-but-set-variable.
* gfortran.dg/io_constraints_8.f90: Likewise.
* gfortran.dg/label_5.f90: Likewise.
* gfortran.dg/len_trim.f90: Likewise.
* gfortran.dg/linefile.f90: Likewise.
* gfortran.dg/pointer_check_13.f90: Add dg-warning.
* gfortran.dg/pr102366.f90: Add -Wno-unused-but-set-variable.
* gfortran.dg/pr103475.f90: Likewise.
* gfortran.dg/pr91497.f90: Likewise.
* gfortran.dg/pr91497_2.f90: Likewise.
* gfortran.dg/pr96312.f90: Likewise.
* gfortran.dg/pr98411.f90: Likewise.
* gfortran.dg/transfer_check_4.f90: Likewise.
* gfortran.dg/warnings_are_errors_1.f90: Add print statement.
* gfortran.dg/warn_undefined_vars_1.f90: New test.
* gfortran.dg/warn_undefined_vars_2.f90: New test.
* gfortran.dg/warn_undefined_vars_3.f90: New test.
* gfortran.dg/warn_undefined_vars_4.f90: New test.
* gfortran.dg/warn_unused_intent_out_1.f90: New test.
* gfortran.dg/warn_unused_read_1.f90: New test.

8 days agotestsuite, c++: Account for emulated TLS in attr tests.
Iain Sandoe [Thu, 11 Jun 2026 18:30:41 +0000 (19:30 +0100)] 
testsuite, c++: Account for emulated TLS in attr tests.

The output for emulated TLS does not match that of native.

gcc/testsuite/ChangeLog:

* c-c++-common/tls-attr-common.c: Add emulated TLS
matches.
* c-c++-common/tls-attr-le-pic.c: Likewise.
* c-c++-common/tls-attr-le-pie.c: Likewise.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
8 days agoRevert "testsuite, i386: add win64 AVX indirect alignment tests [PR54412]"
Jonathan Yong [Thu, 11 Jun 2026 18:47:48 +0000 (18:47 +0000)] 
Revert "testsuite, i386: add win64 AVX indirect alignment tests [PR54412]"

This reverts commit fc811192bb897b3244da0d99894a3909281e3b63.
Remove mingw specific test cases in preparation for reworks.

gcc/testsuite:

* gcc.target/i386/pr54412-avx512-aligned64.c: Remove.
* gcc.target/i386/pr54412-callee-byref-param.c: Remove.
* gcc.target/i386/pr54412-o2-by-value-cases.c: Remove.
* gcc.target/i386/pr54412-sret-no-args.c: Remove.
* gcc.target/i386/pr54412-v4d-o0-aligned-locals.c: Remove.

Signed-off-by: Jonathan Yong <10walls@gmail.com>
8 days agoaarch64: Make assembler bug workaround configurable.
Iain Sandoe [Fri, 20 Oct 2023 08:57:28 +0000 (09:57 +0100)] 
aarch64: Make assembler bug workaround configurable.

Some assmblers have a bug that requires +crc to be emitted even
though the base architecture supports it.  However, that also
triggers a different bug in another assembler.  So make the fix
configurable.

gcc/ChangeLog:

* common/config/aarch64/aarch64-common.cc: Make the asm
crc bug workaround configurable.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
8 days agotestsuite, c++, Darwin: Use scan-weak and scan-not-weak for portability.
Iain Sandoe [Thu, 11 Jun 2026 15:31:06 +0000 (16:31 +0100)] 
testsuite, c++, Darwin: Use scan-weak and scan-not-weak for portability.

In order to get this test to work on Darwin, I would need to edit pretty much
every line.  We have portability helpers for weak symbol scans, let's use them.

gcc/testsuite/ChangeLog:

* g++.dg/reflect/visibility1.C: Use scan-weak/scan-not-weak to
improve portability.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
8 days agoAVR: target/125751 -- Fix too short insns lengths in avr_out_fract.
Georg-Johann Lay [Thu, 11 Jun 2026 17:51:12 +0000 (19:51 +0200)] 
AVR: target/125751 -- Fix too short insns lengths in avr_out_fract.

PR target/125751
gcc/
* config/avr/avr.cc (avr_out_fract): Fix too small sequence
lengths in avr_asm_len calls.

8 days agoAVR: target/125752 - Add 64-bit fixed point <-> 64-bit double conversions.
Georg-Johann Lay [Thu, 11 Jun 2026 17:35:09 +0000 (19:35 +0200)] 
AVR: target/125752 - Add 64-bit fixed point <-> 64-bit double conversions.

PR target/125752
libgcc/config/avr/libf7/
* libf7-asm.sx (ufx64_to_d, d_to_fx64): New DEFUNs.
(__fractdadf, __fractudadf, __fracttadf, __fractutadf)
(__fractdqdf, __fractudqdf): New _DEFUNs.
* libf7-common.mk (F7_ASM_PARTS) Add: fx2D, D2fx,
dq2D, udq2D, da2D, uda2D, ta2D uta2D.
(F7F): Add d_to_fx64, ufx64_to_d, sfx64_to_d.
* libf7.c (d_to_ufx, d_to_sfx): New protos.
(__fractdfda, __fractdfuda, __fractdfta, __fractdfuta)
(__fractdfdq, __fractdfudq): New modules.
* t-libf7 (LIBF7_DF_CONV): Add fractdfda,
fractdfta, fractdfdq, fractdfuda, fractdfuta, fractdfudq.
* f7-renames.h: Rebuild.

gcc/testsuite/
* gcc.target/avr/torture/fx-to-double.c: New test.

8 days ago[PATCH] gcov: Fix correctness check for control flow graph solving
Roman Beliaev [Thu, 11 Jun 2026 15:41:25 +0000 (09:41 -0600)] 
[PATCH] gcov: Fix correctness check for control flow graph solving

The check did not actually work due to the wrong condition in a for loop, which
was always false.

gcc/ChangeLog:

* gcov.cc (solve_flow_graph): Fix condition.

8 days agodoc: Replace "fixed-point" with "integral"
Karl Meakin [Thu, 29 May 2025 11:55:34 +0000 (11:55 +0000)] 
doc: Replace "fixed-point" with "integral"

In some places the documentation refers to "fixed-point" types or values
when talking about plain integer types (eg `int` or `uint32_t`).

Although this is meant to mean "the opposite of floating-point", it is
misleading and can be confused with the fractional types that are also known as
"fixed-point".

For the avoidance of doubt, refer to plain integer types and values as "integral"
throughout.

Testing done:
`make info` and `make dvi`

gcc/ChangeLog:
* doc/rtl.texi: Replace "fixed-point" with "integral" where
appropriate.

8 days agoRefine modulo range operations with fixed quotient.
Andrew MacLeod [Wed, 10 Jun 2026 13:41:27 +0000 (09:41 -0400)] 
Refine modulo range operations with fixed quotient.

When all combines of x / y produce the same quotient Q, further refine
modulo operations by treating x % y ==  x - Q * y

PR tree-optimization/125706
gcc/
* range-op.cc (operator_trunc_mod::wi_fold): Apply fixed
quotient refinement.
gcc/testsuite/
* gcc.dg/pr125706.c: New.

8 days agoamdgcn: Fix missing comma from REG_CLASS_NAMES
Andrew Stubbs [Thu, 11 Jun 2026 13:24:20 +0000 (13:24 +0000)] 
amdgcn: Fix missing comma from REG_CLASS_NAMES

There was a comma missing from Arsen's patch, but the only affect was in dump
files so it wasn't immediately obvious.

gcc/ChangeLog:

* config/gcn/gcn.h (REG_CLASS_NAMES): Add missing comma.

8 days ago[AArch64]: Use MOVI for low‑64‑bit integer SIMD constant vectors [PR113926]
Naveen [Thu, 11 Jun 2026 13:26:23 +0000 (06:26 -0700)] 
[AArch64]: Use MOVI for low‑64‑bit integer SIMD constant vectors [PR113926]

Extend AdvSIMD constant materialization to recognize 128‑bit integer vector
constants where the low 64 bits contain a duplicated scalar value and the high
64 bits are zero.
Bootstrapped and tested on aarch64-linux-gnu.

gcc/ChangeLog:
PR target/113926
* config/aarch64/aarch64.cc (struct simd_immediate_info): Add width
field to record AdvSIMD output vector width.
(simd_immediate_info::simd_immediate_info): Initialize width to zero
in all constructors.
(aarch64_simd_valid_imm): Allow 128-bit AdvSIMD MOV immediates with
zero high 64 bits to be materialized using 64-bit MOVI.
(aarch64_output_simd_imm): Use recorded immediate width when outputting
AdvSIMD immediates.

gcc/testsuite/ChangeLog:
PR target/113926
* gcc.target/aarch64/pr113926.c: New test.
* gcc.target/aarch64/pr113926_1.c: New test.

Signed-off-by: Naveen <naveen.siddegowda@oss.qualcomm.com>
8 days agotree-optimization - Require size > 1 for SLP reduction subgroups
Zhongyao Chen [Wed, 14 Jan 2026 11:38:02 +0000 (11:38 +0000)] 
tree-optimization - Require size > 1 for SLP reduction subgroups

The SLP reduction subgroup analysis can succeed for size-1 groups,
but this leads to poor code generation.  Size-1 cases should fall
back to single-lane reduction instead.

Handle size-1 groups by returning false from the analysis function,
and add a loop exit check to avoid unnecessary processing.

PR tree-optimization/123343

gcc/ChangeLog:

* tree-vect-slp.cc (vect_analyze_slp_reduction_group): Return
false for group_size <= 1 at entry.
(vect_analyze_slp_reductions): Add loop exit check for
group_size <= 1.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/slp-reduc-var.c: New testcase.

Signed-off-by: Zhongyao Chen <chen.zhongyao@zte.com.cn>
8 days agodoc: testsuite: Simplify implementation and document arm_mixed_fp [PR113276]
Torbjörn SVENSSON [Fri, 10 Apr 2026 09:47:56 +0000 (11:47 +0200)] 
doc: testsuite: Simplify implementation and document arm_mixed_fp [PR113276]

The documentation should have been part of r16-8549-g3d30fc2f73ccc1.

gcc/ChangeLog:

PR testsuite/113276
* doc/sourcebuild.texi (arm_mixed_fp): Document.

gcc/testsuite/ChangeLog:

* lib/target-supports.exp (arm_mixed_fp): Simplify
implementation.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
8 days agocobol: Improve execution speed of MOVE NumericDisplay TO COMP-3
Robert Dubner [Thu, 11 Jun 2026 03:42:20 +0000 (23:42 -0400)] 
cobol: Improve execution speed of MOVE NumericDisplay TO COMP-3

gcc/cobol/ChangeLog:

* move.cc (mh_packed_to_packed): Moved.
(mh_numdisp_to_packed): New function.
(move_helper): Use mh_numdisp_to_packed().
(hex_msg): New debugging function.
* parse.y: Enable __gg__char_national().

libgcobol/ChangeLog:

* intrinsic.cc (__gg__char_national): New function.

gcc/testsuite/ChangeLog:

* cobol.dg/group2/MOVE_NumericDisplay_to_COMP-3.cob: New test.
* cobol.dg/group2/MOVE_NumericDisplay_to_COMP-3.out: New test.

8 days agoFortran: [PR93727] Add EX format READ (read_ex)
Jerry DeLisle [Tue, 26 May 2026 04:13:19 +0000 (21:13 -0700)] 
Fortran: [PR93727] Add EX format READ (read_ex)

Implement read_ex in libgfortran to handle EX edit-descriptor input
per Fortran 2023 13.7.2.3.6.  The input field may contain:

  * a hexadecimal-significand form (0X<sig>P<exp>) passed directly
    to the C strtod/strtold family for exact bit-for-bit conversion;
  * any form acceptable for Fw.d input (decimal fallback), including
    INF and NAN representations.

For decimal input without a decimal point the d field of the EX.w.d
descriptor adjusts the exponent exactly as for Fw.d.  BN/BZ blank
handling and the kP scale factor are also supported via the shared
decimal path.

Assisted by: Claude Sonnet 4.6

PR fortran/93727

libgfortran/ChangeLog:

* io/read.c (read_ex): New function implementing EX format read.
* io/io.h (read_ex): Declare.
* io/transfer.c (formatted_transfer_scalar_read): Add FMT_EX case
dispatching to read_ex.

gcc/testsuite/ChangeLog:

* gfortran.dg/EXformat_4.F90: New test covering EX format read
for kind=4 and 8 (always) and kind=10, 16 (when available):
hex-significand literals, lowercase prefix, negative binary
exponent, decimal fallback, d-field adjustment, INF/NAN, zero
field, and round-trips through write_ex.

8 days agoi386: Add FMV support for avx10.2 and apxf
Hongyu Wang [Wed, 3 Jun 2026 02:21:11 +0000 (07:51 +0530)] 
i386: Add FMV support for avx10.2 and apxf

Add function multiversioning priority for avx10.2 and apxf features,
and add P_PROC_AVX10_2 for processors that support these, like
diamondrapids and novalake.

The priority order is:
  P_AVX10_1 < P_PROC_AVX10_1 < P_AVX10_2 < P_APX_F < P_PROC_AVX10_2

gcc/ChangeLog:

* common/config/i386/i386-cpuinfo.h (enum feature_priority):
Add P_AVX10_2, P_APX_F, P_PROC_AVX10_2.
* common/config/i386/i386-isas.h: Set P_AVX10_2 for avx10.2
and P_APX_F for apxf.
* common/config/i386/i386-common.cc (processor_alias_table):
Use P_PROC_AVX10_2 for diamondrapids and novalake.

gcc/testsuite/ChangeLog:

* gcc.target/i386/mvc18.c: New test for target_clones with
avx10.2, apxf, and arch=diamondrapids/novalake.

8 days agovect: Avoid external fallback while operand swap retry is possible
Zhongyao Chen [Wed, 3 Jun 2026 12:44:59 +0000 (20:44 +0800)] 
vect: Avoid external fallback while operand swap retry is possible

When building operand zero of a commutative BB SLP node, a failed child
discovery may build operands from scalars right away.  That hides the failure
from the existing retry path, even when retrying with swapped operands could
still fix the current node.

Track the distance from operand-zero subtree discovery to the nearest upthread
swap opportunity.  Skip scalar fallback only when that distance is exactly one,
so discovery reaches the retry path first.

My local tests show no regression for vect.exp, only a few for rvv.exp,
but those are reasonable, just need update test expectations.

PR tree-optimization/125567

gcc/
* tree-vect-slp.cc (least_upthread_swappable_op_distance): New.
(vect_build_slp_tree_2): Compute swap checks before building operand
zero.  Skip external fallback while swap retry is possible.  Reuse the
swap checks in the retry path.

gcc/testsuite/
* gcc.dg/vect/pr125567.c: New test.

Signed-off-by: Zhongyao Chen <chen.zhongyao@zte.com.cn>
8 days agoDaily bump.
GCC Administrator [Thu, 11 Jun 2026 00:16:32 +0000 (00:16 +0000)] 
Daily bump.

8 days agotestsuite, Darwin: Handle undefined symbols in pr97172-2 testcase.
Iain Sandoe [Wed, 10 Jun 2026 20:22:21 +0000 (21:22 +0100)] 
testsuite, Darwin: Handle undefined symbols in pr97172-2 testcase.

Darwin's linker defaults to complaining about missing symbols, leading
to a spurious fail of this testcase.  We can work around this by
allowing undefined symbols to be considered as dynamically looked-up.

gcc/testsuite/ChangeLog:

* gcc.dg/pr97172-2.c: Allow undefined symbols at link-time.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
8 days agotestsuite, darwin: XFAIL tests with -g3 on systems using dyly-ld.
Iain Sandoe [Sun, 5 May 2024 13:16:36 +0000 (14:16 +0100)] 
testsuite, darwin: XFAIL tests with -g3 on systems using dyly-ld.

Currently, Darwin's static linker does not handle the output of -g3.
We have no way to remedy this, so xfail the tests for current OS versions.

gcc/testsuite/ChangeLog:

* gcc.dg/debug/dwarf2/dwarf2-macro.c: XFAIL for Darwin23+.
* gcc.dg/debug/dwarf2/dwarf2-macro2.c: Likewise.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
8 days agotestsuite, Darwin: Fix outputs.exp for ld64.
Iain Sandoe [Wed, 10 Jun 2026 19:05:33 +0000 (20:05 +0100)] 
testsuite, Darwin: Fix outputs.exp for ld64.

ld64 warns on missing paths provided to -L flags, leading to spurious
fails.  Fix this by passing -w to those invocations.

gcc/testsuite/ChangeLog:

* gcc.misc-tests/outputs.exp: Pass -w to linker invocations
when ld64 is in use.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
8 days agoc, c++: Fix __builtin_{bswap,bitreverse}g error recovery [PR125694]
Jakub Jelinek [Wed, 10 Jun 2026 20:44:22 +0000 (22:44 +0200)] 
c, c++: Fix __builtin_{bswap,bitreverse}g error recovery [PR125694]

The following invalid testcases ICE in both the C and C++ FEs.
If arg is error_mark_node, TREE_TYPE works on it (and gives error_mark_node)
but TYPE_MAIN_VARIANT on it is already invalid.

The following patch fixes it in both spot by checking for error_operand_p
before that.

2026-06-10  Jakub Jelinek  <jakub@redhat.com>

PR c/125694
* c-parser.cc (c_parser_postfix_expression): If arg is
error_operand_p, set error and break.

* typeck.cc (build_x_bswapg_bitreverseg ): If arg is error_operand_p,
return error_mark_node.

* c-c++-common/builtin-bswapg-5.c: New test.
* c-c++-common/builtin-bitreverseg-4.c: New test.

Reviewed-by: Joseph Myers <josmyers@redhat.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
8 days agoc++: Fix up __PRETTY_FUNCTION__ initializer translation [PR91155]
Jakub Jelinek [Wed, 10 Jun 2026 20:41:48 +0000 (22:41 +0200)] 
c++: Fix up __PRETTY_FUNCTION__ initializer translation [PR91155]

In r16-4399 I've added reencoding of __PRETTY_FUNCTION__ initializer
from the source character set to execution character set.
I've used cpp_translate_string for that, which unfortunately interprets
some escape sequences in the string, and as this testcase shows, those
can appear in __PRETTY_FUNCTION__ and in this case made an old bug reappear.
What didn't help is that the PR91155 testcase had a test for the exact
values but with abort calls commented out and was dg-do compile only by
default, so it actually didn't test anything.
Since then for -freflection purposes cpp_translate_string has been added,
and that doesn't interpret anything, only changes encoding (if needed).

So, the following patch just uses that new function.

2026-06-10  Jakub Jelinek  <jakub@redhat.com>

PR c++/91155
* decl.cc (cp_make_fname_decl): Use cpp_translate_string instead of
cpp_interpret_string, don't prefix name strname.text with " and suffix
with " and NUL.

* g++.dg/torture/pr91155.C: Change into dg-do run test, actually test
the strings are the same.

Reviewed-by: Jason Merrill <jason@redhat.com>
8 days agoAdd GTY to range_storage.
Andrew MacLeod [Fri, 29 May 2026 18:24:04 +0000 (14:24 -0400)] 
Add GTY to range_storage.

In preparation for a points to tree in prange, this patch adds GTY
markers to the vrange_storage classes.

* value-range-storage.cc (irange_storage::irange_storage):
Explicitly initialize vrange_storage.
(prange_storage::prange_storage): Likewise.
* value-range-storage.h (vrange_storage): Add GTY marker and
discriminator field.
(irange_storage): Add GTY marker.
(prange_storage): Add GTY marker and friend GTY functions.
(frange_storage): Add GTY marker and explcitly initialize
vrange_storage.

8 days agoMake prange_storage::equal_p more efficient.
Andrew MacLeod [Thu, 28 May 2026 14:07:02 +0000 (10:07 -0400)] 
Make prange_storage::equal_p more efficient.

equal_p created a full prange from storage in order to do a comparison.
This is quite inefficient.  It is better to compare just the required
fields directly from storage.

* value-range-storage.cc (prange_storage::equal_p): Compare just
the required fields.

8 days agoReplace class format_prange with a function.
Andrew MacLeod [Mon, 25 May 2026 20:52:31 +0000 (16:52 -0400)] 
Replace class format_prange with a function.

The format_prange class is overkill for what it does. It can be replaced
with a simple function call which returns a prange_kind and the number
of words of storage required.

* value-range-storage.cc (prange_storage::alloc): Use new
prange_format function.
(prange_storage::prange_storage): Likewise.
(prange_storage::prange_format): Rename from prange_format
constructor and rework.
(prange_storage::set_prange): Use prange_format function.
(prange_storage::fits_p): Likewise.
* value-range-storage.h (enum prange_kind): Move out of
prange_storage class.
(PRANGE_STORAGE_NINTS): Likewise.
(class prange_format): remove.
(m_trailing_ints): Use PRANGE_STORAGE_NINTS.

8 days agofortran: ICE for ASSOCIATE selector that is an overloaded intrinsic operator
Jerry DeLisle [Tue, 9 Jun 2026 16:46:30 +0000 (09:46 -0700)] 
fortran: ICE for ASSOCIATE selector that is an overloaded intrinsic operator

Add a fallback branch in match_association_list that, for any remaining
unresolved EXPR_OP selector with BT_UNKNOWN type, calls gfc_extend_expr
to resolve the overloaded operator to its function call early, so the
associate name receives a usable type before the body is parsed.  The
INTRINSIC_USER path is unchanged.

Assisted by: Claude Sonnet 4.6

PR fortran/125650

gcc/fortran/ChangeLog:

* match.cc (match_association_list): Handle ASSOCIATE selectors
that are overloaded intrinsic operator expressions by extending
them with gfc_extend_expr at parse time, so the associate name is
typed before the construct body is parsed.

gcc/testsuite/ChangeLog:

* gfortran.dg/associate_81.f90: New test.

(cherry picked from commit 0ae0849b54aac359e0f67b3fe2767c3739bd6495)

9 days agotestsuite, c++, x86, Darwin: Adjust func body scan tests for Darwin ABI/asm.
Iain Sandoe [Mon, 1 Jun 2026 06:14:17 +0000 (07:14 +0100)] 
testsuite, c++, x86, Darwin: Adjust func body scan tests for Darwin ABI/asm.

In these cases, we need to add USER_LABEL_PREFIX or a second regex to cater for
the Darwin ABI and Mach-O syntax.

gcc/testsuite/ChangeLog:

* g++.target/i386/cf_check-4.C: Support Darwin ABI/Mach-O syntax.
* g++.target/i386/memset-pr108585-1a.C: Likewise.
* g++.target/i386/memset-pr108585-1b.C: Likewise.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
9 days agotestsuite, c, x86, Darwin: Adjust func body scan tests for Darwin ABI/asm.
Iain Sandoe [Sun, 31 May 2026 18:47:26 +0000 (19:47 +0100)] 
testsuite, c, x86, Darwin: Adjust func body scan tests for Darwin ABI/asm.

In these cases, we need to add a second regex to match Darwin/Mach-O or
to amend the use of symbols to include USER_LABEL_PREFIX.

gcc/testsuite/ChangeLog:

* gcc.target/i386/builtin-memmove-13.c: Add support for Mach-O.
* gcc.target/i386/cf_check-11.c: Likewise.
* gcc.target/i386/memcpy-pr120683-1.c: Likewise.
* gcc.target/i386/memcpy-strategy-13.c: Likewise.
* gcc.target/i386/memset-pr120683-10.c: Likewise.
* gcc.target/i386/memset-pr120683-20.c: Likewise.
* gcc.target/i386/memset-pr120683-21.c: Likewise.
* gcc.target/i386/memset-strategy-27.c: Likewise.
* gcc.target/i386/opt-comi-1.c: Likewise.
* gcc.target/i386/pr111657-1.c: Likewise.
* gcc.target/i386/pr122343-1a.c: Likewise.
* gcc.target/i386/pr122343-1b.c: Likewise.
* gcc.target/i386/pr122343-2a.c: Likewise.
* gcc.target/i386/pr122343-2b.c: Likewise.
* gcc.target/i386/pr122343-3.c: Likewise.
* gcc.target/i386/pr122343-4a.c: Likewise.
* gcc.target/i386/pr122343-4b.c: Likewise.
* gcc.target/i386/pr122343-5a.c: Likewise.
* gcc.target/i386/pr122343-5b.c: Likewise.
* gcc.target/i386/pr122343-6a.c: Likewise.
* gcc.target/i386/pr122343-6b.c: Likewise.
* gcc.target/i386/pr122343-7.c: Likewise.
* gcc.target/i386/pr122675-1.c: Likewise.
* gcc.target/i386/pr125351.c: Likewise.
* gcc.target/i386/pr125355-2.c: Likewise.
* gcc.target/i386/pr125355.c: Likewise.
* gcc.target/i386/pr92080-17.c: Likewise.
* gcc.target/i386/prefetchi-1.c: Likewise.
* gcc.target/i386/prefetchi-1b.c: Likewise.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
9 days agotestsuite: Make function body scans more flexible to ABI and asm syntax.
Iain Sandoe [Mon, 4 May 2026 22:24:45 +0000 (23:24 +0100)] 
testsuite: Make function body scans more flexible to ABI and asm syntax.

This introduces threee customisation points into the function body scans
code.  This allows targets to consume regexes that are written for ABIs and
asm syntax that is reasonably compatibile with that used by the target.

The initial use-case here is to map from regexes specified in terms of
ELF syntax and Linux ABIs, but to be consumed by Darwin ABI and mach-o
binary format.

gcc/testsuite/ChangeLog:

* lib/scanasm.exp (target_regex_skip_line,
target_regex_verbatim_line, target_substitute_func_regex): New.
(check-function-bodies): use the customisation points.
(configure_check-function-bodies): Populate the new customisation
points for Darwin/Mach-O.
* lib/target-supports.exp
(add_options_for_check_function_bodies): Add Darwin criteria.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
9 days agolibiberty, Darwin: Read dylibs too
Pietro Monteiro [Tue, 9 Jun 2026 15:20:09 +0000 (11:20 -0400)] 
libiberty, Darwin: Read dylibs too

The Algol 68 frontend adds a section with information on exported
modes and procedures to libraries and object files.  Instead of
erroring out when encountering a Mach-O library keep reading it so the
frontend can find the exports section.

libiberty/ChangeLog:

* simple-object-mach-o.c (MACH_O_MH_DYLIB): New definition.
(simple_object_mach_o_match): Accept dylibs as well as object files.

Signed-off-by: Pietro Monteiro <pietro@sociotechnical.xyz>
9 days agofortran: ASSOCIATE with contained-function selector rejecting type-bound calls
Jerry DeLisle [Fri, 5 Jun 2026 17:20:36 +0000 (10:20 -0700)] 
fortran: ASSOCIATE with contained-function selector rejecting type-bound calls

Two issues prevented ASSOCIATE constructs whose selector is a call to a
contained function from subsequently calling type-bound procedures on the
associate name.

When the selector is a contained function, resolving it
at parse time (before CONTAINS is fully processed) prematurely set the
function's attribute to FL_PROCEDURE/EXTERNAL, conflicting with its later
declaration as an internal procedure and giving a spurious "attribute
conflict" error.

When the first access is a generic type-bound procedure name, no candidate
type was found, and the associate name got no type, giving "no IMPLICIT type".
Now also search type-bound procedure names via gfc_find_typebound_proc; exclude vtable
types to avoid false positives.

Assisted by: Claude Sonnet 4.6

PR fortran/125530

gcc/fortran/ChangeLog:

* match.cc (gfc_match_call): Route ASSOCIATE names followed by '%'
to match_typebound_call without first resolving the selector, to
avoid prematurely marking a contained-function selector as EXTERNAL.
* symbol.cc (find_derived_types): Also search type-bound procedure
names via gfc_find_typebound_proc when inferring the type of an
inferred-type ASSOCIATE name; exclude vtable types.

gcc/testsuite/ChangeLog:

* gfortran.dg/associate_contained_func_typebound.f90: New test.
* gfortran.dg/associate_contained_func_typebound_2.f90: New
run-time test exercising generic resolution and a module-scope
selector.

(cherry picked from commit 64fee7f4475c756fc17fa9e15aee7683e716ba8a)

9 days agocobol: Eliminate "unused function" warning/error.
Robert Dubner [Wed, 10 Jun 2026 14:50:02 +0000 (10:50 -0400)] 
cobol: Eliminate "unused function" warning/error.

gcc/cobol/ChangeLog:

* move.cc (parser_move): Don't compile hex_of function.
(hex_of): Likewise.
(mh_packed_to_packed): Eliminated commented-out calls to hex_of.

9 days agoarm: cortex-m52 is not affected by CVE-2021-35465
tobby.li [Mon, 25 May 2026 03:55:33 +0000 (11:55 +0800)] 
arm: cortex-m52 is not affected by CVE-2021-35465

The Cortex-M52 processor does not have the VLLDM erratum described
in CVE-2021-35465.  Remove the quirk_vlldm feature bit from the
cortex-m52 CPU definition, so that -mfix-cmse-cve-2021-35465 is no
longer enabled by default when compiling for this CPU.

Also correct a typo in the documentation where the CVE number was
incorrectly written as CVE-2021-365465.

gcc/ChangeLog:
* config/arm/arm-cpus.in (cortex-m52): Remove quirk_vlldm.
* doc/invoke.texi: Remove cortex-m52 from the list of CPUs that
enable -mfix-cmse-cve-2021-35465 by default.  Fix typo in CVE
number (CVE-2021-365465 -> CVE-2021-35465).

Signed-off-by: Tobby Li <tobby.li@armchina.com>
9 days agoFortran/OpenMP: Fix POINTER array mis-privatization [PR122910]
Chung-Lin Tang [Wed, 10 Jun 2026 14:29:06 +0000 (14:29 +0000)] 
Fortran/OpenMP: Fix POINTER array mis-privatization [PR122910]

This patch fixes a case where POINTER attribute arrays are deep copied
when not supposed to. Namely, OpenMP states for the "firstprivate Clause":

 "If an original list item has the POINTER attribute, the new list
  items receive the same association status as the original list
  item, as if by pointer assignment."

This creates a new langhook 'omp_array_data_privatize' to differentiate
cases in certain places during omp-low.

PR fortran/122910

gcc/fortran/ChangeLog:

* f95-lang.cc (LANG_HOOKS_OMP_ARRAY_DATA_PRIVATIZE): Define as
gfc_omp_array_data_privatize.
* trans-openmp.cc (gfc_omp_array_data_privatize): New function.
* trans.h (gfc_omp_array_data_privatize): New declaration.

gcc/ChangeLog:

* langhooks-def.h (LANG_HOOKS_OMP_ARRAY_DATA_PRIVATIZE): Define.
* langhooks.h (struct lang_hooks_for_decls): Define
omp_array_data_privatize hook.
* omp-low.cc (scan_sharing_clauses): Add new calls to
lang_hooks.decls.omp_array_data_privatize,
(lower_omp_target): Likewise.

libgomp/ChangeLog:
* testsuite/libgomp.fortran/pr122910.f90: New test.

Reviewed-by: Tobias Burnus <tburnus@baylibre.com>
9 days agoarm: support star-mc3 CPU
tobby.li [Wed, 20 May 2026 09:21:44 +0000 (17:21 +0800)] 
arm: support star-mc3 CPU

This patch adds the -mcpu support for the ArmChina star-mc3 CPU which is
an ARMv8.1-M Mainline CPU supporting MVE and PACBTI by default.

-mcpu=star-mc3 switch by default matches to
 -march=armv8.1-m.main+pacbti+mve.fp+fp.dp.

The cde feature is supported by specifying +cdecpN
(e.g. -mcpu=star-mc3+cdecp<N>), where N is the coprocessor number in the
range 0 to 7.

Also following options are provided to disable default features.
+nomve.fp (disables MVE Floating point)
+nomve (disables MVE Integer and MVE Floating point)
+nodsp (disables dsp, MVE Integer and MVE Floating point)
+nopacbti (disables pacbti)
+nofp (disables floating point and MVE floating point)

Signed-off-by: LangXing Li <tobby.li@armchina.com>
gcc/ChangeLog:

* config/arm/arm-cpus.in (star-mc3): New CPU.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
* doc/invoke.texi: Update docs.

9 days agoMAINTAINERS: Add myself to write after approval.
Pierre-Emmanuel Patry [Tue, 9 Jun 2026 14:01:21 +0000 (16:01 +0200)] 
MAINTAINERS: Add myself to write after approval.

ChangeLog:

* MAINTAINERS (Write After Approval): Add myself.
(Contributing under the DCO): Add myself.

Signed-off-by: Pierre-Emmanuel Patry <pierre-emmanuel.patry@embecosm.com>
9 days agoc++/reflection: ICE with -g on reflection of ctor param [PR125498]
Marek Polacek [Tue, 9 Jun 2026 20:50:14 +0000 (16:50 -0400)] 
c++/reflection: ICE with -g on reflection of ctor param [PR125498]

Here we ICE because S::S(int) lost its DECL_ARGUMENTS, and so the
skip_artificial_parms_for in FUNCTION_FIRST_USER_PARM in write_reflection
crashes on a null tree.   We've thrown away the body of S::S(int) in
cgraph_node::release_body along with its DECL_ARGUMENTS:

      if (!keep_arguments)
        DECL_ARGUMENTS (decl) = NULL;

This happens in finalize_compilation_unit -> analyze_functions because
there are no cgraph_node::callers (so referred_to_p() is false I think),
and .force_output is false.

We then call mangle_decl from finalize_compilation_unit ->
dwarf2out_early_finish.

Instead of FUNCTION_FIRST_USER_PARM we can use DECL_PARM_INDEX, thus
avoiding the need to either keep the body around or at least set
keep_arguments.

PR c++/125498

gcc/cp/ChangeLog:

* mangle.cc (write_reflection): Use DECL_PARM_INDEX for
computing the parameter index.

gcc/testsuite/ChangeLog:

* g++.dg/reflect/mangle7.C: New test.
* g++.dg/reflect/parameters_of9.C: New test.

Reviewed-by: Patrick Palka <ppalka@redhat.com>
9 days agoipa: Fix lifetime issue with hash_map::put in prepare_debug_expressions [PR125699]
Andrew Pinski [Wed, 10 Jun 2026 01:12:52 +0000 (18:12 -0700)] 
ipa: Fix lifetime issue with hash_map::put in prepare_debug_expressions [PR125699]

Here the code was originally:
tree *d = m_dead_ssa_debug_equiv.get (value);
m_dead_ssa_debug_equiv.put (dead_ssa, *d);

but hash_map::put's 2nd argument is a reference.
So if the hashmap decides it needs to resize, the argument
is freed. So the fix is simple change the type of d to tree
and dereference the get. Since tree is a pointer there is not
enough data to care about the extra copy.

r12-5630-gb3f60112edcb85 was a similar fix in the same function in fact.

Pushed as obvious after a bootstrapped and tested on x86_64-linux-gnu.

PR ipa/125699
gcc/ChangeLog:

* ipa-param-manipulation.cc (ipa_param_body_adjustments::prepare_debug_expressions): Fix
lifetime issue with m_dead_ssa_debug_equiv usage.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
9 days ago[RISC-V] Don't modify existing RTL in combined sCC splitters, generate new nodes...
Jeff Law [Wed, 10 Jun 2026 13:35:14 +0000 (07:35 -0600)] 
[RISC-V] Don't modify existing RTL in combined sCC splitters, generate new nodes instead

I was testing spec2017 late last week on the K3 design and stumbled across a
couple of functional fails.

In this particular case we mis-compiled omnet, thankfully in such a way that it
didn't really run at all, so time to failure was exceedingly short.

A couple months ago I extended our ability to recognize more czero sequences,
particularly in cases where we're combining the output of 2 or more sCC style
insns.  I took a bit of a short-cut and adjusted the code on a node I knew
would not be shared in the IL when doing a split.  I should have known better.
PUT_MODE and PUT_CODE are generally bad to use and I've called out others for
similar changes.

Consider if we're doing a 3->2 split, but when one of the two split insns do
not match.  In that scenario the PUT_CODE trick is going to cause problems
because we change the IL, but the transformation as a whole isn't applied.  In
this case we're inverting the mode (EQ->NE and NE->EQ), the net is we flip the
tense of a branch/sCC.

I never narrowed down a testcase.  This was found by inspecting codegen and
dump differences after bisecting to a change and bisecting down to a single .o
file.

This fixes the omnet failure.  There's a second cluster of failures (502.gcc)
which are unrelated and I'm still debugging those failures.

Bootstrapped and regression tested on riscv64.  Of course the original patch
survived that test as well, so perhaps take it with a mountain of salt rather
than the usual grain...  Waiting on pre-commit before moving forward.

* config/riscv/zicond.md (combined sCC splitters): Avoid using
PUT_MODE to change existing RTL.  Instead just generate a new node.

9 days agotree-optimization/125686 - missing bits in PR125646 fix
Richard Biener [Wed, 10 Jun 2026 11:50:16 +0000 (13:50 +0200)] 
tree-optimization/125686 - missing bits in PR125646 fix

The following patches up synth_lshift_by_additions and
apply_binop_and_append_stmt to set the correct vector type on
the pattern stmt generated.

PR tree-optimization/125686
* tree-vect-patterns.cc (synth_lshift_by_additions): Specify
pattern vector type.
(apply_binop_and_append_stmt): Likewise.
(vect_synth_mult_by_constant): Adjust.

9 days agoAArch64: Fix vcond_18.c test
Wilco Dijkstra [Wed, 10 Jun 2026 11:47:27 +0000 (11:47 +0000)] 
AArch64: Fix vcond_18.c test

Fix vcond_18.c test.

gcc/testsuite:

* gcc.target/aarch64/sve/vcond_18.c: Update.

9 days agoDaily bump.
GCC Administrator [Wed, 10 Jun 2026 00:16:30 +0000 (00:16 +0000)] 
Daily bump.

9 days agocobol: Increase the speed of COMP-3 to COMP-3 moves.
Robert Dubner [Tue, 9 Jun 2026 20:10:00 +0000 (16:10 -0400)] 
cobol: Increase the speed of COMP-3 to COMP-3 moves.

The prior method converted packed-decimal to binary, and then from
binary back to packed-decimal.  These changes speed that up by moving
the unconverted bytes of the packed-decimal representations.  The moves
are done directly when possible, and do a half-byte shift when
necessary.

The expansion of MOVE algorithms has led me to break out MOVE
functionality from gcc/cobol/genapi.cc to the new gcc/cobol/move.cc
file.

gcc/cobol/ChangeLog:

* Make-lang.in: Incorporate new move.cc file.
* genapi.cc (gg_attribute_bit_get): Removed.
(treeplet_fill_source): Moved.
(file_static_variable): Likewise.
(move_helper): Likewise.
(parser_initialize_programs): Use pointer without converting to
size_t.
(get_binary_value_from_float): Moved.
(gg_attribute_bit_clear): Removed.
(gg_attribute_bit_set): Removed.
(digits_to_bytes): Moved.
(get_bytes_needed): Moved.
(data_decl_type_for): Moved.
(parser_display_internal): Forward reference to move_helper.
(get_literalN_value): Moved.
(is_figconst_t): Moved.
(parser_initialize_table): Moved.
(is_figconst): Moved.
(parser_move): Moved.
(parser_move_multi): Moved.
(parser_division): Use function_address as pointer in call to
__gg__is_canceled.
(conditional_abs): Moved.
(get_reference_to_data): Moved.
(mh_identical): Moved.
(mh_source_is_literalN): Moved.
(float_type_of): Moved.
(mh_dest_is_float): Moved.
(picky_memset): Moved.
(picky_memcpy): Moved.
(mh_numeric_display): Moved.
(mh_little_endian): Moved.
(mh_source_is_group): Moved.
(mh_source_is_literalA): Moved.
(have_common_parent): Moved.
(mh_alpha_to_alpha): Moved.
* genapi.h (move_helper): New declaration.
* gengen.cc (gg_cast): Changes to someday detect aliasing
conditions.
(gg_show_type): Expand types.
(gg_indirect_i): Take a size_t parameter.
(gg_array_value): Use gg_cast() wrapper instead of fold_convert().
(gg_memchr): Likewise.
(gg_strcmp): Likewise.
(gg_strncmp): Likewise.
(gg_strlen): Likewise.
(gg_strdup): Likewise.
(gg_malloc): Likewise.
(gg_realloc): Moved.
* gengen.h (gg_indirect_i): New declaration.
* genutil.cc (get_location): Starting to look for aliasing.
(treeplet_fill_source): Moved.
(data_decl_type_for): Moved.
(attribute_bit_clear): Moved.
(attribute_bit_get): Moved.
(attribute_bit_set): Moved.
* genutil.h (treeplet_fill_source): New declaration.
(data_decl_type_for): Likewise.
(attribute_bit_clear): Likewise.
(attribute_bit_get): Likewise.
(attribute_bit_set): Likewise.
* move.cc: New file.

libgcobol/ChangeLog:

* libgcobol.cc (__gg__to_be_canceled): Use pointer instead of size_t.
(__gg__is_canceled): Likewise.

gcc/testsuite/ChangeLog:

* cobol.dg/group2/COMP-3_to_COMP-3__IN-PHASE__MOVES.cob: New test.
* cobol.dg/group2/COMP-3_to_COMP-3__IN-PHASE__MOVES.out: New test.
* cobol.dg/group2/COMP-3_to_COMP-3__OUT-OF-PHASE__MOVES.cob: New test.
* cobol.dg/group2/COMP-3_to_COMP-3__OUT-OF-PHASE__MOVES.out: New test.

9 days agoAVR: Fix typos in comments.
Georg-Johann Lay [Tue, 9 Jun 2026 20:40:42 +0000 (22:40 +0200)] 
AVR: Fix typos in comments.

gcc/
* config/avr/avr.cc: Fix typos in comments.
* config/avr/avr-c.cc: Same.
* config/avr/avr-passes.cc: Same.
* config/avr/avr-passes-fuse-move.h: Same.

10 days agoAda: Fix couple of oversights in Big_Integer package
Eric Botcazou [Tue, 9 Jun 2026 18:51:09 +0000 (20:51 +0200)] 
Ada: Fix couple of oversights in Big_Integer package

Having too many special cases can be counter-productive as shown here.

gcc/ada/
PR ada/125695
* libgnat/s-genbig.adb ("**"): Do not drop the sign on the floor.
(Big_Exp): Take into account the parity of the exponent for -2.

gcc/testsuite/
* gnat.dg/bigint1.adb: New  test.

10 days agoc++: recognize more aliases with lambda targs [PR125212]
Marek Polacek [Tue, 19 May 2026 23:03:33 +0000 (19:03 -0400)] 
c++: recognize more aliases with lambda targs [PR125212]

This patch introduces a new TYPE_DECL flag so that dependent_opaque_alias_p
doesn't have to peruse the tree every time it's called to see if there is
a LAMBDA_EXPR, in which case the alias should be opaque.  Using walk_tree
in dependent_opaque_alias_p was too expensive, and the special cases we
had there were fooled by more deeply nested lambdas.

Compiling range-v3's zip.cpp, perf stat shows:
this patch: 28.826446158 seconds time elapsed
trunk:      29.425441889 seconds time elapsed
so this patch makes the situation marginally better.

PR c++/121287
PR c++/125212
PR c++/105667
PR c++/121597
PR c++/110961

gcc/cp/ChangeLog:

* cp-tree.h (TYPE_DECL_OPAQUE_ALIAS_P): Define.
(any_lambdas_p): Declare.
* decl.cc (grokdeclarator): Set TYPE_DECL_OPAQUE_ALIAS_P.
* pt.cc (dependent_opaque_alias_p): Refine to check
TYPE_DECL_OPAQUE_ALIAS_P.
(tsubst_decl) <case TYPE_DECL>: Set TYPE_DECL_OPAQUE_ALIAS_P.
(any_lambdas_p): New, factored out of...
(regenerate_decl_from_template): ...this.  Call it.

gcc/testsuite/ChangeLog:

* g++.dg/cpp26/lambda-targ1.C: New test.
* g++.dg/cpp2a/lambda-targ26.C: New test.
* g++.dg/cpp2a/lambda-targ27.C: New test.
* g++.dg/cpp2a/lambda-targ28.C: New test.
* g++.dg/cpp2a/lambda-targ29.C: New test.
* g++.dg/cpp2a/lambda-targ30.C: New test.
* g++.dg/cpp2a/lambda-targ31.C: New test.
* g++.dg/cpp2a/lambda-targ32.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
10 days agoi386: Always emit MOVSBL instead of MOVSBW [PR125636]
Uros Bizjak [Tue, 9 Jun 2026 14:48:56 +0000 (16:48 +0200)] 
i386: Always emit MOVSBL instead of MOVSBW [PR125636]

Use MOVSBL instead of MOVSBW for QImode-to-HImode sign extension to avoid
a 16-bit partial register write and to eliminate 0x66 operand size prefix.

PR target/125636

gcc/ChangeLog:

* config/i386/i386.md (extendqihi2): Use movsbl instead of movsbw.
Adjust the destination operand to use %k0 and update the mode
attribute accordingly.

gcc/testsuite/ChangeLog:

* gcc.target/i386/pr89954.c: Update assembler scan
directives to expect movsbl instead of movsbw.

10 days agoARM: Fix broken Thumb1 CBZ cc tracking [PR124077]
Ciprian Arbone [Tue, 9 Jun 2026 15:31:11 +0000 (16:31 +0100)] 
ARM: Fix broken Thumb1 CBZ cc tracking [PR124077]

thumb1_cbz uses operands[2], both when checking if it can reuse the
previously set condition code, and when recording the operands that set
the current condition code. operands[2] for this pattern is the target
label of the jump though, and not the intended second operand of the
comparison operator.

As the label is unlikely to end up as operands[2], the condition code
reuse logic doesn't kick in and causes the redundant CMP instruction
described in PR124077. In addition, thumb1_final_prescan_insn also
doesn't treat thumb1_cbz as a cbranch and ends up resetting condition
code tracking state.

Fix by replacing operands[2] with the actual second operand of the
pattern i.e const0_rtx. Also treat thumb1_cbz the same as
cbranchsi4_insn in thumb1_final_prescan_insn and let it track condition
code state itself.

gcc/ChangeLog:

PR target/124077
* config/arm/arm.cc (thumb1_final_prescan_insn): Also skip
condition code update for thumb1_cbz instructions.
* config/arm/thumb1.md (thumb1_cbz): Use const0_rtx as the
recorded cc_op1 instead of operands[2].

gcc/testsuite/ChangeLog:

PR target/124077
* gcc.target/arm/pr124077.c: New test.

Co-authored-by: Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
10 days agolibgccjit: Allow casts between integers and pointers
Antoni Boucher [Tue, 10 Dec 2024 22:47:39 +0000 (17:47 -0500)] 
libgccjit: Allow casts between integers and pointers

gcc/jit/ChangeLog:

* libgccjit.cc: Allow cast between integers and pointers in
is_valid_cast.

gcc/testsuite/ChangeLog:

* jit.dg/test-cast.c: Add test case for pointer to int cast.

10 days ago[PATCH v3 2/9] RISC-V: Track altfmt in RVV vtype state
Lino Hsing-Yu Peng [Tue, 9 Jun 2026 15:35:46 +0000 (09:35 -0600)] 
[PATCH v3 2/9] RISC-V: Track altfmt in RVV vtype state

Zvfofp8min instructions use the VTYPE altfmt field to select the
alternate FP8 format.  Track altfmt in vsetvl_info so the vsetvl pass
does not merge or remove configurations that require different altfmt
values.

gcc/ChangeLog:

* config/riscv/riscv-protos.h (enum altfmt_type): New.
* config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): Pass
ALTFMT_NONE to gen_vsetvl.
(gen_no_side_effects_vsetvl_rtx): Pass ALTFMT_NONE to
gen_vsetvl_no_side_effects.
* config/riscv/riscv-vector-builtins-bases.cc: Include insn-attr.h.
(vsetvl::expand): Pass ALTFMT_NONE to gen_vsetvl_no_side_effects.
* config/riscv/riscv-vsetvl.cc (altfmt_to_str): New function.
(get_altfmt): New function.
(demand_flags): Add DEMAND_ALTFMT_P.
(altfmt_demand_type): New enum.
(vsetvl_info): Track altfmt.
(demand_system): Add altfmt compatibility, availability, and merge handling.
* config/riscv/riscv-vsetvl.def: Add altfmt rules.
* config/riscv/vector.md (altfmt): New attribute, numeric with
INVALID_ATTRIBUTE default.
(@vsetvl<mode>, vsetvl_vtype_change_only,
@vsetvl_discard_result<mode>, @vsetvl<mode>_no_side_effects,
*vsetvldi_no_side_effects_si_extend): Add altfmt operand.

10 days agoAVR: Fix some typos in comments.
Georg-Johann Lay [Tue, 9 Jun 2026 14:41:26 +0000 (16:41 +0200)] 
AVR: Fix some typos in comments.

gcc/
* config/avr/avr.md: Fix typos in comments.
* config/avr/avr-fixed.md: Same.
* config/avr/avr-passes.cc: Same
* config/avr/avr-passes-fuse-move.h: Same.

10 days agoAArch64: Avoid zeroing movprfx on MOV/FMOV
Wilco Dijkstra [Thu, 4 Jun 2026 14:47:23 +0000 (14:47 +0000)] 
AArch64: Avoid zeroing movprfx on MOV/FMOV

A zeroing movprfx with merging MOV/FMOV should be avoided since they result in a
read of the destination register - this introduces extra dependencies eventhough
the read has no useful effect. Remove such patterns so that the zero value is
created via MOV d0, 0. Update various tests.

gcc:

* config/aarch64/aarch64-sve.md: Remove zeroing movprfx of merging MOV

gcc/testsuite:

* gcc.target/aarch64/sve/acle/asm/dup_bf16.c: Update.
* gcc.target/aarch64/sve/acle/asm/dup_f16.c: Update.
* gcc.target/aarch64/sve/acle/asm/dup_f32.c: Update.
* gcc.target/aarch64/sve/acle/asm/dup_f64.c: Update.
* gcc.target/aarch64/sve/acle/asm/dup_s16.c: Update.
* gcc.target/aarch64/sve/acle/asm/dup_s32.c: Update.
* gcc.target/aarch64/sve/acle/asm/dup_s64.c: Update.
* gcc.target/aarch64/sve/acle/asm/dup_s8.c: Update.
* gcc.target/aarch64/sve/acle/asm/dup_u16.c: Update.
* gcc.target/aarch64/sve/acle/asm/dup_u32.c: Update.
* gcc.target/aarch64/sve/acle/asm/dup_u64.c: Update.
* gcc.target/aarch64/sve/acle/asm/dup_u8.c: Update.
* gcc.target/aarch64/sve/acle/asm/mul_s16.c: Update.
* gcc.target/aarch64/sve/acle/asm/mul_s32.c: Update.
* gcc.target/aarch64/sve/acle/asm/mul_s64.c: Update.
* gcc.target/aarch64/sve/acle/asm/mul_s8.c: Update.
* gcc.target/aarch64/sve/acle/asm/mul_u16.c: Update.
* gcc.target/aarch64/sve/acle/asm/mul_u32.c: Update.
* gcc.target/aarch64/sve/acle/asm/mul_u64.c: Update.
* gcc.target/aarch64/sve/acle/asm/mul_u8.c: Update.
* gcc.target/aarch64/sve/vcond_18.c: Update.
* g++.target/aarch64/sve/dup_sel_5.C: Update.
* g++.target/aarch64/sve/dup_sel_6.C: Update.

10 days agoaarch64: use ZIP1 instead of UZP1 for concatenation [PR125550]
Artemiy Volkov [Tue, 2 Jun 2026 08:53:40 +0000 (08:53 +0000)] 
aarch64: use ZIP1 instead of UZP1 for concatenation [PR125550]

This patch addresses the issue in PR125550, where two float16 values are
being concatenated using UZP1, i.e., this code:

svfloat16_t foo (float x0, float x1)
{
  return svdupq_n_f16 (x0, x1, x0, x1, x0, x1, x0, x1);
}

is being compiled into:

fcvt    h0, s0
fcvt    h1, s1
uzp1    v0.4h, v0.4h, v1.4h
mov     z0.s, s0
ret

causing the duplication of a 2-element vector ((float16) x0, 0) into z0.

This is a copy-paste error from the original combine_internal patterns,
where UZP1 always operates on vectors of 2 elements, in which circumstance
it is equivalent to ZIP1.  For smaller element sizes (and thus higher
element counts) only ZIP1 is correct.

The fix is to emit ZIP1 when concatenating values on vector registers.
For consistency, I've changed the original combine_internal patterns as
well as the ones added in r17-898-g920eeb67a3537b.  Since this latter
change has nothing to do with the PR, it could have been better to split
the patch in two; I'd be happy to do that if necessary.

Both aforementioned changes required adjusting existing AdvSIMD/SVE
vec_init-related testcases; I've added pr125550.c from the PR on top of
that as well.

Bootstrapped and regtested on aarch64-linux-gnu.

PR target/125550

gcc/ChangeLog:

* config/aarch64/aarch64-simd.md
(*aarch64_combine_internal<mode>): Use zip1 instead of uzp1
to concatenate values residing in SIMD registers.
(*aarch64_combine_internal_be<mode>): Likewise.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/ldp_stp_16.c: Adjust testcases.
* gcc.target/aarch64/pr109072_1.c: Likewise.
* gcc.target/aarch64/simd/mf8_data_1.c: Likewise.
* gcc.target/aarch64/sve/vec_init_5.c: Likewise.
* gcc.target/aarch64/vec-init-14.c: Likewise.
* gcc.target/aarch64/vec-init-23.c: Likewise.
* gcc.target/aarch64/vec-init-9.c: Likewise.
* gcc.target/aarch64/sve/pr125550.c: New test.

10 days ago[PATCH] RISC-V: Fix static rounding mode splicing for xtheadvector [PR125395]
JRobinNTA [Tue, 9 Jun 2026 12:58:14 +0000 (06:58 -0600)] 
[PATCH] RISC-V: Fix static rounding mode splicing for xtheadvector [PR125395]

When generating assembly for T-Head vector float conversions,
the backend used hardcoded pointer math that failed to account
for static rounding mode suffixes (e.g., .rtz). Additionally,
intercept blocks for VFCVT and VFWCVT were entirely missing,
allowing illegal static rounding modes to leak into the assembler.

This patch adds the missing conversion blocks and introduces
an offset calculation to safely bypass the mnemonic regardless
of standard RVV rounding suffixes.

PR target/125395
gcc/ChangeLog:

* config/riscv/thead.cc (th_asm_output_opcode): Add VFCVT
and VFWCVT blocks. Add offset logic for static rounding suffixes.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/xtheadvector/pr125395.c: New test.

10 days agoexpmed: Fix up CONST_POLY_INT case of make_tree [PR125621]
Alex Coplan [Fri, 5 Jun 2026 15:51:47 +0000 (16:51 +0100)] 
expmed: Fix up CONST_POLY_INT case of make_tree [PR125621]

The PR showed us ICEing in build_poly_int_cst because we have type set
to a non-type tree node (a var_decl).  A closer look shows this is
because we pass the wrong variable to wide_int_to_tree in
expmed.cc:make_tree: we pass t instead of type, where t is
uninitialized at the point of the call.  Fixed thusly.

I also took the opportunity to move the CONST_POLY_INT case out of the
default: section into its own case of the switch.

gcc/ChangeLog:

PR middle-end/125621
* expmed.cc (make_tree): Fix CONST_POLY_INT case to pass type
instead of t, move it to its own switch case.

gcc/testsuite/ChangeLog:

PR middle-end/125621
* gcc.target/aarch64/torture/pr125621.c: New test.

10 days ago[PATCH v2] RISC-V: Add load-to-address bypass for SiFive-7 series
Monk Chiang [Tue, 9 Jun 2026 12:51:43 +0000 (06:51 -0600)] 
[PATCH v2] RISC-V: Add load-to-address bypass for SiFive-7 series

The SiFive-7 series processors have a dual-pipeline architecture with
load latency of 3 cycles. However, when a load instruction produces
an address register that is used immediately by a subsequent load or
store with zero offset, the address can be forwarded after 2 cycles
instead of 3. This reduces pipeline stalls for common address
calculation patterns like:

  ld a0, 0(a1)    # Load pointer, 3-cycle latency
  ld a2, 0(a0)    # Use as address with zero offset, bypass to 2 cycles

Changes in v2:
- Fix sifive-7-load-address-bypass test for rv32 targets.

gcc/

* config/riscv/riscv-protos.h (riscv_zero_offset_address_bypass_p):
New function.
* config/riscv/riscv.cc (riscv_zero_offset_address_bypass_p): New
function.
* config/riscv/sifive-7.md: Add bypass definition.

gcc/testsuite/

* gcc.target/riscv/sifive-7-load-address-bypass.c: New test.

Co-authored-by: "Jim Wilson <jimw@sifive.com>
10 days ago[PATCH v2] RISC-V: Optimize trampoline code generation for Zicfilp
Monk Chiang [Tue, 9 Jun 2026 12:47:50 +0000 (06:47 -0600)] 
[PATCH v2] RISC-V: Optimize trampoline code generation for Zicfilp

The trampoline code generation for Zicfilp (CFI landing pads) uses
three registers and includes a redundant LUI instruction.

Before this patch, the trampoline code was:

  lpad    0
  auipc   t3, 0
  l[wd]   t0, (target_function_offset - 4)(t3)
  l[wd]   t3, (static_chain_offset - 4)(t3)
  lui     t2, 0
  jr      t0

This uses three registers (t0, t2, t3) and has a redundant "lui t2, 0"
instruction that is never used.

After this patch, the trampoline code is:

  lpad    0
  auipc   t3, 0
  l[wd]   t2, (target_function_offset - 4)(t3)
  l[wd]   t3, (static_chain_offset - 4)(t3)
  jr      t2
  nop

The optimization removes the redundant LUI instruction, uses only two
registers (t2, t3), and adds a nop for proper 8-byte alignment to avoid
-Wpadded warnings.

Changes in v2:
- Fix zicfilp-trampoline test for Linux targets.
- Fix line length exceeding 80 characters.

gcc/

* config/riscv/riscv.cc (riscv_trampoline_init): Remove redundant
LUI instruction.

gcc/testsuite/

* gcc.target/riscv/zicfilp-trampoline.c: New test.

10 days agoFortran/OpenMP: Improve declare-reduction diagnostic
Tobias Burnus [Tue, 9 Jun 2026 11:58:03 +0000 (13:58 +0200)] 
Fortran/OpenMP: Improve declare-reduction diagnostic

Change the diagnostic for the ambiguity check for 'omp declare reduction'
to actually output the reduction operator/idenfier and the type to which
this reduction applies to.

gcc/fortran/ChangeLog:

* module.cc (load_omp_udrs): Improve reduction diagnostic output.

gcc/testsuite/ChangeLog:

* gfortran.dg/gomp/declare-reduction-1.f90: New test.

10 days agoAVR: Outsource lib1func.S's macros to asm-defs.h.
Georg-Johann Lay [Tue, 9 Jun 2026 10:43:34 +0000 (12:43 +0200)] 
AVR: Outsource lib1func.S's macros to asm-defs.h.

libgcc/
* config/avr/lib1funcs.S: Fix trailing blanks.
(mov_h): Remove macro and invocations.
(mov_l): Remove macro.  Replace invocations with wmov.
(__zero_reg__, __tmp_reg__, __SREG__, __SP_H__)
(__SP_L__, __RAMPZ__, __EIND__, skip, NEG2, NEG4)
(wmov, wsubi, waddi, mov4, XCALL, XJMP, XICALL, XIJMP)
(do_prologue_saves, do_epilogue_restores, .branch_plus)
(DEFUN, ENDF, FALIAS): Move macros to...
* config/avr/asm-defs.h: ...this new file.
* config/avr/lib1funcs-fixed.S: Fix trailing blanks.

10 days agopdp11-aout: Remove invalid conversion and restore build
Martin Jambor [Tue, 9 Jun 2026 10:00:26 +0000 (12:00 +0200)] 
pdp11-aout: Remove invalid conversion and restore build

When cross compiling to pdp11-aout, the build has been recently
failing with

  error: invalid conversion from 'int*' to 'unsigned int*'

This patch changes the variable in question to the appropriate type
and fixes the issue (I have not looked at the code beyond that).

Tested by successfully configuring gcc with

  ../src/configure --prefix=/home/mjambor/gcc/mine/inst --enable-languages=c,c++ --enable-checking=yes --disable-bootstrap --disable-multilib --enable-obsolete --target=pdp11-aout

and running make all-host.

gcc/ChangeLog:

2026-06-09  Martin Jambor  <mjambor@suse.cz>

* config/pdp11/pdp11.cc (pdp11_conditional_register_usage): Change i
from int to unsigned int.

10 days agoDaily bump.
GCC Administrator [Tue, 9 Jun 2026 08:53:25 +0000 (08:53 +0000)] 
Daily bump.

10 days agohard-reg-set: make temporary SET for EXECUTE_IF_SET_IN_HARD_REG_SET a build-time...
Xi Ruoyao [Fri, 5 Jun 2026 08:29:20 +0000 (16:29 +0800)] 
hard-reg-set: make temporary SET for EXECUTE_IF_SET_IN_HARD_REG_SET a build-time error

So we don't make the same error again.

gcc/

PR rtl-optimization/125609
PR middle-end/122992
* hard-reg-set.h
(build_error_on_rvalue): New function.
(EXECUTE_IF_SET_IN_HARD_REG_SET): Call the function above.

10 days agoAdd 2 further commits to ignored_commits, remove old ones
Jakub Jelinek [Tue, 9 Jun 2026 08:20:57 +0000 (10:20 +0200)] 
Add 2 further commits to ignored_commits, remove old ones

2026-06-09  Jakub Jelinek  <jakub@redhat.com>

* gcc-changelog/git_update_version.py (ignored_commits): Add
'843b49269eaca82860ab4171f9644b5c411f05fc' and
'5c0785d62ca44b9073e543b2b3dbb04f0aca83af', remove all older
hashes.

10 days agolibgomp.texi: Mention ROCR_VISIBLE_DEVICES in context of USM
Tobias Burnus [Tue, 9 Jun 2026 06:21:18 +0000 (08:21 +0200)] 
libgomp.texi: Mention ROCR_VISIBLE_DEVICES in context of USM

Re-add half-sentence that got lost in commit r16-5799-gfe5c59ea997316.

Currently, USM is only supported if all AMD GPUs support USM; hence,
on a mixed system (e.g. CPU with GPU of type APU plus separate, discrete
GPU not supporting USM/SVM), host fallback always happens.

Workaround is to use ROCR_VISIBLE_DEVICES. Additionally, the
"not-supported" wording should refer here to USM/SVM support not
to XNACK, which has been clarified here.

libgomp/ChangeLog:

* libgomp.texi (GCN): Mention ROCR_VISIBLE_DEVICES.

10 days agoFortran: [PDT] Prevent unnecessary mallocs and frees. [PR125669]
Paul Thomas [Mon, 8 Jun 2026 11:20:40 +0000 (12:20 +0100)] 
Fortran: [PDT] Prevent unnecessary mallocs and frees. [PR125669]

2026-06-07  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/125669
* decl.cc (gfc_get_pdt_instance): If the bound expressions for
and array component, of the length expression for a character
component, gave simplified to a constant, do not set attributes
pdt_array and pdt_string respectively.

gcc/testsuite/
PR fortran/125669
* gfortran.dg/pdt_92.f03: New test.

10 days agors6000: Add Future ISA compare and swap equal AMO operations [RFC02689]
Jeevitha [Tue, 9 Jun 2026 02:39:54 +0000 (21:39 -0500)] 
rs6000: Add Future ISA compare and swap equal AMO operations [RFC02689]

This patch adds support for compare-and-swap-equal atomic memory
operations that may be added to a future PowerPC processor. Note that
the names of these functions may change in the future.

Add _AMO_LD_CS_EQ to the _AMO_LD enum and define four new
compare-and-swap equal helper functions, all guarded by _ARCH_FUTURE.
For non-Future targets, provide error-attribute stubs to emit a
compile-time diagnostic.

2026-06-09  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>

gcc/
* config/rs6000/amo.h (_AMO_LD): Add _AMO_LD_CS_EQ enumerator, gated on
_ARCH_FUTURE.
(amo_lwat_cas_eq, amo_lwat_scas_eq, amo_ldat_cas_eq,
amo_ldat_scas_eq): New compare-and-swap equal helper functions.
(_AMO_ERR_CMPSWP): New macro for error-attribute stubs on non-Future
targets.
* doc/extend.texi (PowerPC Atomic Memory Operation Functions): Document
new functions.

gcc/testsuite/
* gcc.target/powerpc/amo8.c: New test.
* gcc.target/powerpc/amo9.c: New test.

10 days agoa68: fix diagnostic strings in a68_attr_format_token
Jose E. Marchesi [Mon, 8 Jun 2026 23:09:22 +0000 (01:09 +0200)] 
a68: fix diagnostic strings in a68_attr_format_token

The a68_attr_format_token class is incorrectly using
a68_find_keyword_from_attribute to get the diagnostic message, rather
than the intended descriptive text for the attribute.

This patch fixes this and adds a little testcase.

Signed-off-by: Jose E. Marchesi <jemarch@gnu.org>
gcc/algol68/ChangeLog

* a68-pretty-print.h (a68_attr_format_token): Get diagnostic
string from a68_attribute_name.

gcc/testsuite/ChangeLog

* algol68/compile/error-attr-format-token-1.a68: New test.

10 days agodoc: regenerate tm.texi
Sam James [Mon, 8 Jun 2026 20:19:12 +0000 (21:19 +0100)] 
doc: regenerate tm.texi

Regenerate tm.texi after r17-1432-g5ffdb513ef9700.

gcc/ChangeLog:

* doc/tm.texi: Regenerate.

10 days agodoc: Spell "command-line option" with a dash
Gerald Pfeifer [Mon, 8 Jun 2026 20:08:41 +0000 (22:08 +0200)] 
doc: Spell "command-line option" with a dash

On the way fix some grammar issues and consistently use "option"
over "flag" or "switch".

gcc:
* doc/cpp.texi: Spell "command-line option" with a dash.
(Binary Resource Inclusion): Ditto.
* doc/fragments.texi (Target Fragment): Ditto.
* doc/gcc.texi: Ditto.
(Indices): Ditto.
* doc/gccint.texi: Ditto.
(Top): Ditto.
(Option Index): Ditto.
* doc/gcov.texi (Invoking Gcov): Ditto. And fix grammar.
* doc/gm2.texi (Compiler options): Ditto.
(Extensions): Ditto.
(The PIM system module): Ditto.
(The ISO system module): Ditto.
* doc/invoke.texi (Debugging Options): Ditto.
(AVR Options): Ditto.
* doc/lto.texi (LTO object file layout): Ditto.
(WHOPR): Ditto.
* doc/md.texi (Machine Constraints): Ditto.
* doc/objc.texi (Constant string objects): Ditto. And fix grammar.
(Exceptions): Ditto.
(Synchronization): Ditto.

* doc/tm.texi.in: Ditto. And standardize on "option" over
"flag".
(strategy): Ditto. And standardize on "option" over "switch"
and fix grammar.
* target.def: Ditto.
* doc/tm.texi: Regenerate.

10 days agoc++: Add various missing auto_diagnostic_group sentinels
Jakub Jelinek [Mon, 8 Jun 2026 19:38:17 +0000 (21:38 +0200)] 
c++: Add various missing auto_diagnostic_group sentinels

I've grepped for inform with larger grep context and looked for missing
auto_diagnostic_group if the inform was preceded by some related diagnostic
function (or call which emits that).

2026-06-08  Jakub Jelinek  <jakub@redhat.com>

* call.cc (build_op_delete_call_1): Add missing auto_diagnostic_group
sentinel.  Formatting fix.
(complain_about_access): Add missing auto_diagnostic_group sentinels.
(convert_like_internal): Likewise.
(build_over_call): Likewise.
(maybe_warn_class_memaccess): Likewise.
* constexpr.cc (maybe_warn_about_constant_value): Likewise.
(cxx_eval_outermost_constant_expr): Likewise.
* contracts.cc (check_param_in_postcondition): Likewise.
(check_postconditions_in_redecl): Likewise.  Formatting fixes.
* decl.cc (identify_goto): Add missing auto_diagnostic_group
sentinels.
(omp_declare_variant_finalize_one): Likewise.
* method.cc (walk_field_subobs): Likewise.
* semantics.cc (finish_omp_clauses): Likewise.
* tree.cc (validate_trivial_abi_attribute): Likewise.
* typeck2.cc (digest_init_r): Likewise.

Reviewed-by: Jason Merrill <jason@redhat.com>
10 days agoc: Fix up ICE with __builtin_{bswap,bitreverse}g [PR125629]
Jakub Jelinek [Mon, 8 Jun 2026 19:36:24 +0000 (21:36 +0200)] 
c: Fix up ICE with __builtin_{bswap,bitreverse}g [PR125629]

The following testcase ICEs, because we never call c_fully_fold on the
argument.
Fixed by calling it before calling fold_build_builtin_bswapg_bitreverseg
which creates the builtin or IFN calls.

2026-06-08  Jakub Jelinek  <jakub@redhat.com>

PR c/125629
* c-parser.cc (c_parser_postfix_expression) <case RID_BUILTIN_BSWAPG>:
Call c_fully_fold on the argument before calling
fold_build_builtin_bswapg_bitreverseg.

* c-c++-common/builtin-bswapg-4.c: New test.
* c-c++-common/builtin-bitreverseg-3.c: New test.

Reviewed-by: Marek Polacek <polacek@redhat.com>
11 days agolibstdc++: Spell command-line option with a dash
Gerald Pfeifer [Mon, 8 Jun 2026 18:36:20 +0000 (20:36 +0200)] 
libstdc++: Spell command-line option with a dash

libstdc++-v3:
* doc/xml/manual/abi.xml: Spell command-line option with a dash.
Simplify language.
* doc/html/manual/abi.html: Regenerate.

11 days agoaarch64: Add support for range prefetch intrinsic.
Alfie Richards [Fri, 6 Feb 2026 12:40:29 +0000 (12:40 +0000)] 
aarch64: Add support for range prefetch intrinsic.

gcc/ChangeLog:

* config/aarch64/aarch64-builtins.cc (enum aarch64_builtins):
Add AARCH64_PREFETCH_PLD_RANGE and AARCH64_PREFETCH_PLDX_RANGE.
(aarch64_init_prefetch_builtins): Add initialization of
__pld_range and __pldx_range.
(require_const_argument): Update to return the minval if value
is out of range.
(aarch64_expand_prefetch_range_builtin): New function.
(aarch64_general_expand_builtin): Add support for
AARCH64_PREFETCH_PLD_RANGE and AARCH64_PREFETCH_PLDX_RANGE.
* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add
__ARM_PREFETCH_RANGE macro.
* config/aarch64/aarch64.md (unspec): Add UNSPEC_PLDX_RANGE and
UNSPEC_PLD_RANGE
(aarch64_rprfm): New instruction.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/acle/rprfm.c: New test.
* gcc.target/aarch64/acle/rprfm_error.c: New test.

11 days agoaarch64: Add FEAT_FPRCVT support.
Alfie Richards [Mon, 5 Jan 2026 17:08:15 +0000 (17:08 +0000)] 
aarch64: Add FEAT_FPRCVT support.

gcc/ChangeLog:

* config/aarch64/aarch64.h (TARGET_FPRCVT): New macro definition.
* config/aarch64/aarch64.md (arches): Add fprcvt.
(arch_enabled): Add fprcvt.
(l<fcvt_pattern><su_optab><GPF_F16:mode><GPI:mode>2): Add
FEAT_FPRCVT variant.
(<optab>_trunchf<GPI:mode>2): Likewise.
(<optab>_trunc<fcvt_change_mode><GPI:mode>2): Likewise.
(fix_to_zero_extend<mode>di2): Likewise.
(<optab><fcvt_iesize><GPF:mode>2): Likewise.
(define_insn "aarch64_fp16_<optab><mode>hf2): Likewise.
* config/aarch64/iterators.md (fpw): Add SF and DF variants.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/acle/fprcvt.c: New test.
* gcc.target/aarch64/fprcvt.c: New test.
* gcc.target/aarch64/fprcvt.x: New test.
* gcc.target/aarch64/fprcvt_float32_int32.c: New test.
* gcc.target/aarch64/fprcvt_float32_int64.c: New test.
* gcc.target/aarch64/fprcvt_float32_uint32.c: New test.
* gcc.target/aarch64/fprcvt_float32_uint64.c: New test.
* gcc.target/aarch64/fprcvt_float64_int32.c: New test.
* gcc.target/aarch64/fprcvt_float64_int64.c: New test.
* gcc.target/aarch64/fprcvt_float64_uint32.c: New test.
* gcc.target/aarch64/fprcvt_float64_uint64.c: New test.

11 days agoaarch64: Add new fp->int conversion intrinsics
Alfie Richards [Mon, 5 Jan 2026 17:01:55 +0000 (17:01 +0000)] 
aarch64: Add new fp->int conversion intrinsics

Adds intrinsics for the following conversions:
- float32_t -> uint64_t
- float32_t -> int64_t
- float64_t -> uint32_t
- float64_t -> int32_t

gcc/ChangeLog:

* config/aarch64/aarch64-simd-builtins.def: (lround): Add new
forms for new conversions.
(lroundu): Likewise.
(lceil): Likewise.
(lceilu): Likewise.
(lfloor): Likewise.
(lflooru): Likewise.
(lfrintn): Likewise.
(lfrintnu): Likewise.
* config/aarch64/arm_neon.h (vcvtd_s32_f64): New intrinsic.
(vcvtd_s32_f64): Likewise.
(vcvtd_u32_f64): Likewise.
(vcvts_s64_f32): Likewise.
(vcvts_u64_f32): Likewise.
(vcvtad_s32_f64): Likewise.
(vcvtad_u32_f64): Likewise.
(vcvtas_s64_f32): Likewise.
(vcvtas_u64_f32): Likewise.
(vcvtmd_s32_f64): Likewise.
(vcvtmd_u32_f64): Likewise.
(vcvtms_s64_f32): Likewise.
(vcvtms_u64_f32): Likewise.
(vcvtnd_s32_f64): Likewise.
(vcvtnd_u32_f64): Likewise.
(vcvtns_s64_f32): Likewise.
(vcvtns_u64_f32): Likewise.
(vcvtpd_s32_f64): Likewise.
(vcvtpd_u32_f64): Likewise.
(vcvtps_s64_f32): Likewise.
(vcvtps_u64_f32): Likewise.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/acle/fcvt_intrinsics.c: New test.

11 days agoaarch64: Update gating for svexpa intrinsic
Alfie Richards [Tue, 4 Nov 2025 11:16:55 +0000 (11:16 +0000)] 
aarch64: Update gating for svexpa intrinsic

Updates the gating for the ssve-fexpa intrinsic to be supported in
streaming-mode if "ssve-fexpa" is supported.

Additionally, implements the "__ARM_FEATURE_SSVE_FEXPA" macro.

gcc/ChangeLog:

* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add
__ARM_FEATURE_SSVE_FEXPA.
* config/aarch64/aarch64-sve-builtins-base.def (svexpa): Change
gating to streaming compatible if AARCH64_FL_SSVE_FEXPA is
supported.
* config/aarch64/aarch64-sve.md: Update gating to be enabled if
TARGET_SSVE_FEXPA.
* config/aarch64/aarch64.h (TARGET_SVE_FEXPA): New macro.
* config/aarch64/iterators.md (SVE_FP_UNARY_INT): Update FEXPA
gating.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/pragma_cpp_predefs_4.c: Add
__ARM_FEATURE_SSVE_FEXPA test.
* gcc.target/aarch64/sve/acle/asm/expa_f16.c: Add streaming mode
test.
* gcc.target/aarch64/sve/acle/asm/expa_f32.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/expa_f64.c: Likewise.
* lib/target-supports.exp (sve_ext): Add ssve-fexpa support test.
* g++.target/aarch64/sve/aarch64-ssve.exp (GCC target pragma):
Add ssve-fexpa.
(streaming_ok): Add svexpa.
(nonstreaming_only) Remove svexpa.

11 days agoaarch64: Add support for FEAT_SSVE_BitPerm.
Alfie Richards [Tue, 4 Nov 2025 11:16:55 +0000 (11:16 +0000)] 
aarch64: Add support for FEAT_SSVE_BitPerm.

Adds support for the FEAT_SSVE_BitPerm AArch64 extension.

FEAT_SSVE_BitPerm makes the FEAT_SVE2_BitPerm instructions available in
streaming mode.

gcc/ChangeLog:

* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add
__ARM_FEATURE_SSVE_BITPERM.
* config/aarch64/aarch64-sve-builtins-sve2.def:
Make sve-bitperm intrinsics streaming compatible.
* config/aarch64/aarch64-sve2.md: Change gating of sve-bitperm
instructions.
* config/aarch64/aarch64.h (TARGET_SVE_BITPERM): New macro.
(TARGET_SVE2_BITPERM): Removed.

gcc/testsuite/ChangeLog:

* lib/target-supports.exp (exts): Add dg conditions for ssve-bitperm.
* g++.target/aarch64/sve/aarch64-ssve.exp: Update test for ssve-bitperm.
* gcc.target/aarch64/pragma_cpp_predefs_5.c: Update test.
* gcc.target/aarch64/sve2/acle/asm/bdep_u16.c: Update for ssve-bitperm.
* gcc.target/aarch64/sve2/acle/asm/bdep_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/bdep_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/bdep_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/bext_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/bext_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/bext_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/bext_u8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/bgrp_u16.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/bgrp_u32.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/bgrp_u64.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/bgrp_u8.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/bdep_u16.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/bdep_u32.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/bdep_u64.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/bdep_u8.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/bext_u16.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/bext_u32.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/bext_u64.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/bext_u8.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/bgrp_u16.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/bgrp_u32.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/bgrp_u64.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/bgrp_u8.c: Likewise.

11 days agotree-optimization/125668 - missed alignment updating from forwprop
Richard Biener [Mon, 8 Jun 2026 12:02:38 +0000 (14:02 +0200)] 
tree-optimization/125668 - missed alignment updating from forwprop

With the PR125296 fix I forgot to handle the LHS propagation case.

PR tree-optimization/125668
* tree-ssa-forwprop.cc (forward_propagate_addr_expr_1):
Preserve alignment of the original access also for propagating
into the LHS.

* gcc.dg/pr125668.c: New testcase.

11 days agobackprop: Avoid early return for abnormal phis [PR125653]
Richard Sandiford [Mon, 8 Jun 2026 12:38:55 +0000 (13:38 +0100)] 
backprop: Avoid early return for abnormal phis [PR125653]

r17-1238-g8e3eff39a4564c added an early return for SSA names that
occur in abnormal phis.  That had the effect of bypassing the later:

  /* If STMT is a phi, remove any information recorded for
     its arguments.  */
  if (is_a <gphi *> (stmt))
    reprocess_inputs (stmt);

That reprocessing is important since (by design) the pass initially
makes optimistic assumptions about backedges.

gcc/
PR tree-optimization/125653
* gimple-ssa-backprop.cc (backprop::process_var): Avoid early
return for SSA names that occur in abnormal phis.

gcc/testsuite/
PR tree-optimization/125653
* gcc.dg/torture/pr125653.c: New test.

11 days agotree-optimization/125652 - wrong code with SCEV
Richard Biener [Mon, 8 Jun 2026 08:50:35 +0000 (10:50 +0200)] 
tree-optimization/125652 - wrong code with SCEV

The following fixes a latent issue in chrec_fold_plus_poly_poly
which suffers from being prone to signed overflow UB in the way
it associates additions when accumulating two polynomical CHRECs.
Similar to r16-2781-gafafae097232e7 the following catches the
obvious cases when constants are involved without trying to address
the actual underlying issue.

PR tree-optimization/125652
* tree-chrec.cc (chrec_fold_plus_poly_poly): Avoid UB
integer overflow in accumulating CHREC_RIGHT.

* gcc.dg/torture/pr125652.c: New testcase.

11 days agotree-optimization/125646 - fixup vector types for const mult pattern
Richard Biener [Mon, 8 Jun 2026 07:41:25 +0000 (09:41 +0200)] 
tree-optimization/125646 - fixup vector types for const mult pattern

When we pattern recognize integer multiplication with a constant
and need a conversion to unsigned we fail to set the appropriate
unsigned vector type on the pattern stmt so it gets the vector
type of the signed result.  This confuses code dealing with UB
for reduction vectorization but will also result in wrong-code
in the non-reduction case.

PR tree-optimization/125646
* tree-vect-patterns.cc (vect_synth_mult_by_constant): Assign
vector type to the pattern def sequence stmts.

* gcc.dg/vect/pr125646.c: New testcase.

11 days agotestsuite: get a predictable ordered array for comparison
Torbjörn SVENSSON [Tue, 7 Apr 2026 12:32:46 +0000 (14:32 +0200)] 
testsuite: get a predictable ordered array for comparison

Without this patch, errors like below can be seen in g++.log:

Traceback (most recent call last):
  File "/build/gcc_src/gcc/testsuite/g++.dg/modules/test-p1689.py", line 220, in <module>
    is_ok = validate_p1689(actual, expect)
...
  File "/build/gcc_src/gcc/testsuite/g++.dg/modules/test-p1689.py", line 149, in compare_json
    actual = set(actual)
TypeError: unhashable type: 'dict'

To avoid hashing dicts, transform the elements to string representation
prior to sorting the array and then transform back to objects after.

gcc/testsuite/ChangeLog:

* g++.dg/modules/test-p1689.py: Make arrays have predictable
order.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
11 days agom68k: Fix invalid EXECUTE_IF_SET_IN_HARD_REG_SET conversion
Andreas Schwab [Fri, 5 Jun 2026 08:43:42 +0000 (10:43 +0200)] 
m68k: Fix invalid EXECUTE_IF_SET_IN_HARD_REG_SET conversion

PR rtl-optimization/122992
* config/m68k/m68k.cc (m68k_conditional_register_usage): Fix
signedness of register number var.
(m68k_zero_call_used_regs): Fix missing declaration.

11 days agoaarch64: Remove <vconq> from name
Richard Sandiford [Mon, 8 Jun 2026 08:03:46 +0000 (09:03 +0100)] 
aarch64: Remove <vconq> from name

After the previous patch, the pattern no longer mentions VCONQ.

gcc/
* config/aarch64/aarch64-sve.md
(*aarch64_vec_duplicate_subvector<vconsv><vconq><mode>): Remove
<vconq> from name.

11 days agoSimplify vec_duplicates of vec_duplicates
Richard Sandiford [Mon, 8 Jun 2026 07:31:18 +0000 (08:31 +0100)] 
Simplify vec_duplicates of vec_duplicates

r17-899-g52d5a8870d2108 added a pattern with a nested vec_duplicate,
but I think those should be folded down to a single vec_duplicate.

The later:

  if (VECTOR_MODE_P (mode)
      && vec_duplicate_p (op, &elt)
      && code != VEC_DUPLICATE)

handles only scalar elements, but this rule applies to vec_duplicates
of vectors as well.

A bit of scripting suggests that this was the only use of nested
vec_duplicates in the md files.

This is tested by gcc.target/aarch64/sve/vec_init_5.c.

gcc/
* simplify-rtx.cc (simplify_context::simplify_unary_operation_1):
Simplify vec_duplicates of vec_duplicates.
* config/aarch64/aarch64-sve.md
(*aarch64_vec_duplicate_subvector<vconsv><vconq><mode>): Remove
nested vec_duplicate.

11 days agosh: Remove can_create_pseudo_p check
Richard Sandiford [Mon, 8 Jun 2026 07:31:18 +0000 (08:31 +0100)] 
sh: Remove can_create_pseudo_p check

Optab instruction conditions are cached and so won't adapt to the
current phase of compilation.

The old code to FAIL for !create_pseudo_p was redundant since
general-purpose arithmetic optabs like bswap can only be used
while can_create_pseudo_p is true.

gcc/
* config/sh/sh.md (bswapsi): Remove can_create_pseudo_p () check.

11 days agomips: fix unintialized operand use in sync_{old,new}_<optab>_12
Xi Ruoyao [Sun, 7 Jun 2026 06:34:26 +0000 (14:34 +0800)] 
mips: fix unintialized operand use in sync_{old,new}_<optab>_12

In GCC, if the RTL template of define_insn has multiple elements, it's
treated as a parallel expression.  And, "in parallel" means that first
all the values used in the invidiviual side-effects are computed, and
second all the actual side-effects are performed.  So when the value of
operand 1 (the output reg) is used, it's not set yet.

When optimization is enabled, the uninitialized value is replaced with 0
and then for e.g. if atomic_hiqi_op is plus, (plus (0) (val)) is folded
to simply (val).  Now the RTL template happens to be matched by
sync_old_nand_12 (of which the RTL is written in a really inconsistent
way), causing "0 + 1 = -1".

So fix the uninitialized operand use, i.e. (match_dup 0) should be
(match_dup 1).  Also slightly alter the source of the set for the memory
in sync_new_<optab>_12 to make it clear the value in the reg and in the
memory should be same after the operation.

gcc/

* config/mips/sync.md (sync_old_<optab><mode>): Fix
uninitialized operand use.
(sync_new_<optab><mode>): Fix uninitialized operand use, use the
same expression for the set source of operand 0 and 1.

11 days agotestsuite: Resolve non-unique test names under several section
Haochen Jiang [Mon, 1 Jun 2026 06:29:17 +0000 (14:29 +0800)] 
testsuite: Resolve non-unique test names under several section

Last year, contrib/compare_test introduces non-unique test name check.
It is a good feature for new tests addition so that they will have no
more same test names, which will help identify bugs more precisely.

However, the legacy old tests got many non-unique names. This will
result in compare_tests showing tons of lines for non-unique names
at the beginning of the report. This actually reduced the readability
report when I am testing new patches whether there are test regressions.

This patch will not fix all the non-unique names (Definitely!). The fixed
amount non-unique names is around 70-75%. Still about 1/4 remaining. But
for a current 3400+ lines long non-unique name list for unix{-m32,-m64} under
x86_64, it is a big step.

For modules.exp, the patch appends std option into the report.

The layout change example:

- 3 PASS: g++: g++.dg/modules/access-1_a.C module-cmi Foo (gcm.cache/Foo.gcm)
+ g++: g++.dg/modules/access-1_a.C -std=c++17 module-cmi Foo (gcm.cache/Foo.gcm)
+ g++: g++.dg/modules/access-1_a.C -std=c++20 module-cmi Foo (gcm.cache/Foo.gcm)
+ g++: g++.dg/modules/access-1_a.C -std=c++26 module-cmi Foo (gcm.cache/Foo.gcm)

For lto.exp, the patch appends option testing into the report.
The layout change example:

- 6 PASS: g++: g++.dg/lto/odr-1  (test for LTO warnings, odr-1_0.C line 3)
+ g++: g++.dg/lto/odr-1  (test for LTO warnings, odr-1_0.C line 3 -O0 -flto -flto-partition=1to1 -fno-use-linker-plugin )
+ g++: g++.dg/lto/odr-1  (test for LTO warnings, odr-1_0.C line 3 -O0 -flto -flto-partition=none -fuse-linker-plugin)
+ g++: g++.dg/lto/odr-1  (test for LTO warnings, odr-1_0.C line 3 -O0 -flto -fuse-linker-plugin -fno-fat-lto-objects )
+ g++: g++.dg/lto/odr-1  (test for LTO warnings, odr-1_0.C line 3 -O2 -flto -flto-partition=1to1 -fno-use-linker-plugin )
+ g++: g++.dg/lto/odr-1  (test for LTO warnings, odr-1_0.C line 3 -O2 -flto -flto-partition=none -fuse-linker-plugin -fno-fat-lto-objects )
+ g++: g++.dg/lto/odr-1  (test for LTO warnings, odr-1_0.C line 3 -O2 -flto -fuse-linker-plugin)

For prettyprinters, the patch appends -flto or not into the report.

The layout change example:

- 2 PASS: libstdc++: libstdc++-prettyprinters/48362.cc execution test
+ libstdc++: libstdc++-prettyprinters/48362.cc -flto execution test

The other is the original non-lto one, which is unchanged.

Tested on x86_64-pc-linux-gnu{-m32,}.

gcc/testsuite/ChangeLog:

* g++.dg/modules/modules.exp (module_cmi_p): Add std parameter
and include it in test report.  Update call site.
* lib/lto.exp (lto_handle_diagnostics_for_file): Add optstr
parameter and append it to the test report.
(lto_handle_diagnostics): Add optstr parameter.
(lto-link-and-maybe-run): Update lto_handle_diagnostics call site.

libstdc++-v3/ChangeLog:

* testsuite/libstdc++-prettyprinters/prettyprinters.exp: Pass
-flto as the options to make it shown in test report.

11 days ago[PATCH] tree-optimization/118680 match.pd: Fold (type)(minmax((wide)a, (wide)b))...
Naveen [Mon, 8 Jun 2026 04:20:42 +0000 (21:20 -0700)] 
[PATCH] tree-optimization/118680 match.pd: Fold (type)(minmax((wide)a, (wide)b)) -> minmax(a, b)

This patch folds a min/max expression where both operands are first
widened to a larger integer type and the result is then converted back
to the original type.

For example:
  (uint32_t) MAX_EXPR <(uint64_t) a, (uint64_t) b>
can be folded to:
  MAX_EXPR <a, b>
when the widening conversion preserves the signedness of the original
type. In that case the wider min/max result is always one of the
original operands so converting it back is unnecessary.

The PR118680 match.pd simplification folds widened integer MIN/MAX
expressions before vectorization. pr113281-5.c does not contain over-widened
MIN_EXPR/MAX_EXPR operations for the vectorizer to narrow. Hence, the
corresponding vectorizer dump messages are no longer emitted.

Bootstrapped and tested on aarch64-linux-gnu.

PR tree-optimization/118680

gcc/ChangeLog:
* match.pd: ((type) minmax (wide) a, wide (b)): New pattern.

gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/pr118680.c: New test.
* gcc.dg/vect/pr113281-5.c: Drop MIN_EXPR and MAX_EXPR narrowing
dump checks that are optimized away before vectorization.

Signed-off-by: Naveen <naveen.siddegowda@oss.qualcomm.com>
11 days agoDon't define __FRACT_FBIT__ in C++ [PR 125642]
Zhou Qiankang [Mon, 8 Jun 2026 02:30:45 +0000 (10:30 +0800)] 
Don't define __FRACT_FBIT__ in C++ [PR 125642]

PR c++/125642

gcc/c-family/

* c-cppbuiltin.cc (c_cpp_builtins): Don't define __FRACT_FBIT__
in C++.

gcc/testsuite/

* g++.dg/pr125642.C: New test.

11 days agofortran: [PR125535] wrong-code for implied-do with allocatable-component
Jerry DeLisle [Fri, 5 Jun 2026 20:20:05 +0000 (13:20 -0700)] 
fortran: [PR125535] wrong-code for implied-do with allocatable-component

When a nested implied-do array constructor called a transformational
intrinsic (e.g. RESHAPE) whose result type has allocatable components, the
argument temporaries were freed before the result's allocatable components
were deep-copied, causing a heap-use-after-free and wrong runtime values.

Transformational library functions such as RESHAPE do a shallow byte-copy
of the source array into the result, so the result's component pointers
alias those of the argument temporaries. Freeing the temporaries first
and then copying yielded use-after-free.

Move gfc_add_block_to_block (&se->pre, &post) to after the deep-copy
loop, so that the result's allocatable components are copied while the
source storage is still live.

Assisted by: Claude Sonnet 4.6

PR fortran/125535

gcc/fortran/ChangeLog:

* trans-expr.cc (gfc_conv_procedure_call): Move post block append
to after the deep copy of allocatable components for transformational
intrinsics, so that argument temporaries are not freed before the
result components are copied.

gcc/testsuite/ChangeLog:

* gfortran.dg/implied_do_alloc_comp_1.f90: New test.

12 days agofortran: ALLOCATE of parameterized derived-type array initializes only first element
Jerry DeLisle [Fri, 5 Jun 2026 20:19:58 +0000 (13:19 -0700)] 
fortran: ALLOCATE of parameterized derived-type array initializes only first element

gfc_trans_allocate passed expr->rank to gfc_allocate_pdt_comp and
gfc_deallocate_pdt_comp for array allocations of parameterized derived
types.  For an allocate-shape-spec expression (e.g. "allocate(a(n))"),
expr->rank is 0 even though the symbol is an array; the rank is carried on
the symbol rather than on the allocate expression.  With rank 0 the loop
that initialises each element's allocatable components ran zero times, so
only element zero was initialised.  Subsequent accesses to elements 1..N-1
used garbage pointers and crashed.

Fix: when se.expr is a GFC array descriptor, take the rank from the
descriptor via GFC_TYPE_ARRAY_RANK instead of from expr->rank.  Apply the
same correction to the CLASS path and to the matching deallocate calls in
gfc_trans_deallocate.

Assisted by: Claude Sonnet 4.6

PR fortran/125534

gcc/fortran/ChangeLog:

* trans-stmt.cc (gfc_trans_allocate): Use GFC_TYPE_ARRAY_RANK from
the GFC descriptor type when se.expr is a descriptor, rather than
expr->rank, for the rank passed to gfc_allocate_pdt_comp.  Apply
the same fix to the CLASS path.
(gfc_trans_deallocate): Likewise for gfc_deallocate_pdt_comp.

gcc/testsuite/ChangeLog:

* gfortran.dg/pdt_array_alloc_1.f90: New test.

12 days agolibiberty: avoid exponential back reference issue in D demangler
Andrew Burgess [Tue, 14 Apr 2026 10:20:55 +0000 (11:20 +0100)] 
libiberty: avoid exponential back reference issue in D demangler

We had a bug reported against Fedora GDB where a particular D symbol
was causing an out of memory error.  I believe that the symbol is
valid (see below for details), but I'm not sure if it is possible to
successfully demangle it, so this patch aims to avoid the out of
memory error.

The symbol in question can be found in the newly added test case.

The symbol in question makes heavy use of back references to compress
the demangled string.  The back references are nested to ~57 levels of
depth, but that's not the real problem.  The real issue is that many
of these nested levels of back reference refer, multiple times, to the
earlier levels.  If the innermost level of back reference results in a
1 byte string (it doesn't, the resulting string is longer), and each
level of back reference refers to the next inner level just twice
(it's usually more), then by 30 levels the resulting string is 1G in
size.  This is an absolute lower bound of the required size.  By 40
levels we have, at a minimum, a 1024G string.

My plan for fixing this is to count nested back references, resetting
the counter at the "top level", i.e. at a nesting depth of 0.  If we
see too many (based on some arbitrary limit) nested back references,
then we'll abort the demangle, and return NULL.

Now, this isn't purely a recursion problem.  The theoretical maximum
depth is just 57, but the problem is the cumulative work that ends up
being done due to the exponential growth of each level referencing the
earlier levels.

However, I wanted to avoid adding a separate flag for this to the
demangler, and I figured that this problem is close enough to
recursion that we can reuse the existing recursion limit flag here
too.

And so, the solution I propose is that each time we encounter a nested
back reference we increment a counter.  If we see more than
DEMANGLE_RECURSION_LIMIT nested back references then we abort the
demangle, even if these back references are not all nested one inside
the other.  A second counter tracks the current depth of nested back
references.  If we are at depth 0 then the first counter, the nested
back reference counter, is reset back to 0.

With this fix in place, when passed the problematic mangled symbol,
the demangler returns NULL.  The c++filt tool will just re-print the
mangled symbol.  The D demangler tests are extended to include the
problematic symbol.

Side note: I mentioned above that I think this symbol is valid.  To
reach this conclusion I implemented a hack where I cached the result
of evaluating a back reference.  The first time a back reference is
processed I actually processed the input to check the string demangled
correctly, but I never added this demangled string to the final
result.  The second time the same back reference is requested, I spot
the cached entry and return, again adding nothing to the result string.

Thus, the final result string contains only the content from the top
level.  None of the back referenced content is included.  The input
string (mangled) is 2695 bytes, while the output string was 42kB, but
this skips all the nested content.  However, we did get to the end of
the input string, and returned a non-NULL value.  The full string
would be multiple GB given the exponential growth.

Bug: https://bugzilla.redhat.com/show_bug.cgi?id=2368350

libiberty/ChangeLog:

* d-demangle.c (struct dlang_info::options): New field,
carries options passed to the demangler.
(struct dlang_info::num_backrefs): Count total number of back
referenced types that have been processed.
(struct dlang_info::backref_depth): Count the depth of
recursive back references.
(dlang_type_backref): Track recursive back reference depth,
and the total number of back references encountered.  Bail out
early if the total number gets too high.
(dlang_demangle_init_info): Initialise new 'struct dlang_info'
fields.
(dlang_demangle): Pass demangler options to
dlang_demangle_init_info.
* testsuite/d-demangle-expected: Add new test.

12 days agotestsuite: Automatically add check_function_bodies options
Richard Sandiford [Sun, 7 Jun 2026 09:03:09 +0000 (10:03 +0100)] 
testsuite: Automatically add check_function_bodies options

It's easy to forget that i386 check-function-bodies tests require:

  { dg-add-options check_function_bodies }

This patch makes:

  { dg-final { check-function-bodies ... } }

add the options automatically.

This means that the dg-final must come after the final dg-options (like
the dg-add-options must).  That already seemed to be the case for every
test in the patch.

gcc/
* doc/sourcebuild.texi: Document that check-function-bodies
automatically adds the check_function_bodies options.

gcc/testsuite/
* lib/gcc-dg.exp (dg-final): Add check_function_bodies options
for check-function-bodies directives.
* g++.target/i386/cf_check-3.C: Remove explicit
{ dg-add-options check_function_bodies }.
* g++.target/i386/cf_check-4.C: Likewise.
* g++.target/i386/memset-pr101366-1.C: Likewise.
* g++.target/i386/memset-pr101366-2.C: Likewise.
* g++.target/i386/memset-pr108585-1a.C: Likewise.
* g++.target/i386/memset-pr108585-1b.C: Likewise.
* g++.target/i386/memset-pr118276-1a.C: Likewise.
* g++.target/i386/memset-pr118276-1b.C: Likewise.
* g++.target/i386/memset-pr118276-1c.C: Likewise.
* gcc.target/i386/20040112-1.c: Likewise.
* gcc.target/i386/builtin-copysign-2.c: Likewise.
* gcc.target/i386/builtin-copysign-3.c: Likewise.
* gcc.target/i386/builtin-copysign-4.c: Likewise.
* gcc.target/i386/builtin-copysign-5.c: Likewise.
* gcc.target/i386/builtin-copysign-6.c: Likewise.
* gcc.target/i386/builtin-copysign-7.c: Likewise.
* gcc.target/i386/builtin-copysign-8a.c: Likewise.
* gcc.target/i386/builtin-copysign-8b.c: Likewise.
* gcc.target/i386/builtin-fabs-1.c: Likewise.
* gcc.target/i386/builtin-memmove-10.c: Likewise.
* gcc.target/i386/builtin-memmove-11a.c: Likewise.
* gcc.target/i386/builtin-memmove-11b.c: Likewise.
* gcc.target/i386/builtin-memmove-11c.c: Likewise.
* gcc.target/i386/builtin-memmove-12.c: Likewise.
* gcc.target/i386/builtin-memmove-13.c: Likewise.
* gcc.target/i386/builtin-memmove-14.c: Likewise.
* gcc.target/i386/builtin-memmove-15.c: Likewise.
* gcc.target/i386/builtin-memmove-1a.c: Likewise.
* gcc.target/i386/builtin-memmove-1b.c: Likewise.
* gcc.target/i386/builtin-memmove-1c.c: Likewise.
* gcc.target/i386/builtin-memmove-1d.c: Likewise.
* gcc.target/i386/builtin-memmove-2a.c: Likewise.
* gcc.target/i386/builtin-memmove-2b.c: Likewise.
* gcc.target/i386/builtin-memmove-2c.c: Likewise.
* gcc.target/i386/builtin-memmove-2d.c: Likewise.
* gcc.target/i386/builtin-memmove-3a.c: Likewise.
* gcc.target/i386/builtin-memmove-3b.c: Likewise.
* gcc.target/i386/builtin-memmove-3c.c: Likewise.
* gcc.target/i386/builtin-memmove-4a.c: Likewise.
* gcc.target/i386/builtin-memmove-4b.c: Likewise.
* gcc.target/i386/builtin-memmove-4c.c: Likewise.
* gcc.target/i386/builtin-memmove-5a.c: Likewise.
* gcc.target/i386/builtin-memmove-5b.c: Likewise.
* gcc.target/i386/builtin-memmove-5c.c: Likewise.
* gcc.target/i386/builtin-memmove-6.c: Likewise.
* gcc.target/i386/builtin-memmove-7.c: Likewise.
* gcc.target/i386/builtin-memmove-8.c: Likewise.
* gcc.target/i386/builtin-memmove-9.c: Likewise.
* gcc.target/i386/cf_check-11.c: Likewise.
* gcc.target/i386/cf_check-7.c: Likewise.
* gcc.target/i386/memcpy-pr120683-1.c: Likewise.
* gcc.target/i386/memcpy-pr120683-2.c: Likewise.
* gcc.target/i386/memcpy-pr120683-3.c: Likewise.
* gcc.target/i386/memcpy-pr120683-4.c: Likewise.
* gcc.target/i386/memcpy-pr120683-5.c: Likewise.
* gcc.target/i386/memcpy-pr120683-6.c: Likewise.
* gcc.target/i386/memcpy-pr120683-7.c: Likewise.
* gcc.target/i386/memcpy-strategy-12.c: Likewise.
* gcc.target/i386/memset-pr120683-1.c: Likewise.
* gcc.target/i386/memset-pr120683-10.c: Likewise.
* gcc.target/i386/memset-pr120683-11.c: Likewise.
* gcc.target/i386/memset-pr120683-12.c: Likewise.
* gcc.target/i386/memset-pr120683-13.c: Likewise.
* gcc.target/i386/memset-pr120683-14.c: Likewise.
* gcc.target/i386/memset-pr120683-15.c: Likewise.
* gcc.target/i386/memset-pr120683-16.c: Likewise.
* gcc.target/i386/memset-pr120683-17.c: Likewise.
* gcc.target/i386/memset-pr120683-18.c: Likewise.
* gcc.target/i386/memset-pr120683-19.c: Likewise.
* gcc.target/i386/memset-pr120683-2.c: Likewise.
* gcc.target/i386/memset-pr120683-20.c: Likewise.
* gcc.target/i386/memset-pr120683-21.c: Likewise.
* gcc.target/i386/memset-pr120683-22.c: Likewise.
* gcc.target/i386/memset-pr120683-23.c: Likewise.
* gcc.target/i386/memset-pr120683-3.c: Likewise.
* gcc.target/i386/memset-pr120683-4.c: Likewise.
* gcc.target/i386/memset-pr120683-5.c: Likewise.
* gcc.target/i386/memset-pr120683-6.c: Likewise.
* gcc.target/i386/memset-pr120683-7.c: Likewise.
* gcc.target/i386/memset-pr120683-8.c: Likewise.
* gcc.target/i386/memset-pr120683-9.c: Likewise.
* gcc.target/i386/memset-pr70308-1a.c: Likewise.
* gcc.target/i386/memset-pr70308-1b.c: Likewise.
* gcc.target/i386/memset-strategy-10.c: Likewise.
* gcc.target/i386/memset-strategy-13.c: Likewise.
* gcc.target/i386/memset-strategy-25.c: Likewise.
* gcc.target/i386/memset-strategy-28.c: Likewise.
* gcc.target/i386/memset-strategy-29.c: Likewise.
* gcc.target/i386/memset-strategy-30.c: Likewise.
* gcc.target/i386/pr111673.c: Likewise.
* gcc.target/i386/pr120936-1.c: Likewise.
* gcc.target/i386/pr120936-11.c: Likewise.
* gcc.target/i386/pr120936-2.c: Likewise.
* gcc.target/i386/pr120936-4.c: Likewise.
* gcc.target/i386/pr120936-5.c: Likewise.
* gcc.target/i386/pr120936-9.c: Likewise.
* gcc.target/i386/pr122343-1a.c: Likewise.
* gcc.target/i386/pr122343-1b.c: Likewise.
* gcc.target/i386/pr122343-2a.c: Likewise.
* gcc.target/i386/pr122343-2b.c: Likewise.
* gcc.target/i386/pr122343-3.c: Likewise.
* gcc.target/i386/pr122343-4a.c: Likewise.
* gcc.target/i386/pr122343-4b.c: Likewise.
* gcc.target/i386/pr122343-5a.c: Likewise.
* gcc.target/i386/pr122343-5b.c: Likewise.
* gcc.target/i386/pr122343-6a.c: Likewise.
* gcc.target/i386/pr122343-6b.c: Likewise.
* gcc.target/i386/pr122343-7.c: Likewise.
* gcc.target/i386/pr122675-1.c: Likewise.
* gcc.target/i386/pr125100-4.c: Likewise.
* gcc.target/i386/pr125355-2.c: Likewise.
* gcc.target/i386/pr125355.c: Likewise.
* gcc.target/i386/pr82142a.c: Likewise.
* gcc.target/i386/pr82142b.c: Likewise.
* gcc.target/i386/pr92080-17.c: Likewise.

12 days agoFortran: Fix regression caused by first patch [PR125527]
Paul Thomas [Sun, 7 Jun 2026 08:11:13 +0000 (09:11 +0100)] 
Fortran: Fix regression caused by first patch [PR125527]

2026-06-07  Paul Thomas  <pault@gcc.gnu.org>

gcc/fortran
PR fortran/125527
* class.cc (gfc_find_derived_vtab): Stash module namespace and
use it as the last place to search for the vtab before building
a new one.