Harishankar [Tue, 6 Jan 2026 13:50:29 +0000 (19:20 +0530)]
gccrs: Fix ICE in insert_associated_trait_impl due to recursion
Recursive const blocks containing trait implementations previously caused
an assertion failure (ICE) because the compiler re-visited existing IDs.
This patch adds a check to return early if the ID exists, enabling
graceful handling of recursion.
Fixes Rust-GCC/gccrs#4166
gcc/rust/ChangeLog:
* typecheck/rust-typecheck-context.cc (insert_associated_trait_impl):
Prevent ICE by checking for existing ID.
* typecheck/rust-hir-type-check.h: Update declarations.
Jayant Chauhan [Fri, 9 Jan 2026 23:47:33 +0000 (05:17 +0530)]
gccrs: util/attributes: error on malformed #[link_section] input
Emit a diagnostic when #[link_section] is used without arguments on
functions or static items, matching rustc behavior. This prevents
silent acceptance of empty attributes and provides a helpful
diagnostic that shows the expected form.
Fixes Rust-GCC#4229
gcc/rust/ChangeLog:
* util/rust-attributes.cc (check_link_section_attribute): New helper.
(AttributeChecker::visit): Check link_section on functions and statics.
gcc/testsuite/ChangeLog:
* rust/compile/link_section-malformed.rs: New test.
James Bohl [Fri, 27 Feb 2026 12:32:16 +0000 (07:32 -0500)]
a68: Allow full range of negative values in integral denotations
Signed-off-by: James Bohl <bohlj47@gmail.com>
gcc/algol68/ChangeLog
* a68-low-prelude.cc (a68_lower_negate2): Annotate denotation
as being negated.
* a68-low-units.cc (a68_lower_denotation): Allow the full range
of negative values if the denotation is negated.
* a68-types.h (struct NODE_T): Add negated field.
(NEGATED): Define.
* a68-parser.cc (a68_new_node): Initialize NEGATED.
gcc/testsuite/ChangeLog
* algol68/compile/error-denotation-2.a68: Check for no error on
minimum negative value.
* algol68/compile/error-denotation-3.a68: Likewise.
Tamar Christina [Fri, 27 Feb 2026 14:21:36 +0000 (14:21 +0000)]
vect: enforce trapping math checks when early breaks [PR124142]
The loop
void
__attribute__((noipa))
bug (int f, int *w, int l)
{
int i;
for (i = 0; i < l; ++i)
while (f % w[i]) w[i]--;
}
is an uncounted loop which performs a trapping operation during vectorization.
Normally the vectorizer doesn't stop vectorization if the operation can't be
masked (though ifcvt does).
For Early breaks however this is unsafe as we are introducing a trap where the
original scalar code may not have.
Some tests now fail to vectorize (including some tsvc ones) which I could have
xfail'ed but instead decided to add -fno-trapping-math just to get the
additional coverage they provide.
gcc/ChangeLog:
PR tree-optimization/124142
* tree-vect-data-refs.cc (vect_analyze_early_break_dependences):
For early break require masking when operation can trap.
Jeff Law [Sun, 22 Feb 2026 16:26:38 +0000 (09:26 -0700)]
[1/n][PR tree-optimization/90036] All refinement of entries in DOM hash table
This is the first of a few patches to fix pr90036.
I've gone back and forth about whether or not to fix this for gcc-16 or queue
for gcc-17. Ultimately I don't think these opportunities are *that* common, so
I don't expect widespread code generation changes.
I'm going to drop the changes in a small series as the changes stand on their
own. This gives us better bisectability.
--
The first patch allows refinement of existing equivalences in a case where we'd
missed it before. In particular say we have <res> = <expr> in the expression
hash table. We later use <expr> in a way that creates a temporary expression
equivalence. We'll fail to record that temporary expression equivalence
because of the pre-existing entry in the hash table.
And just to be clear, the old equivalence will be restored when we leave the
domwalk scope of the newer, more precise, hash table entry.
This matters for pr90036 as we initially enter a simple equivalence in the
table with the result being an SSA_NAME. Later we have a conditional that
allows us to refine the result to a constant. And we're going to need that
constant result to trigger additional simplifications and equivalence
discovery.
Bootstrapped and regression tested on x86_64, aarch64, riscv64 and probably a
couple others as well. It's also been tested across the embedded targets in my
tester. Pushing to the trunk.
PR tree-optimization/90036
gcc/
* tree-ssa-scopedtables.cc (avail_exprs_stack::record_cond): Always
record the new hash table entry.
Xi Ruoyao [Fri, 27 Feb 2026 08:54:40 +0000 (16:54 +0800)]
middle-end: allow expand_vector_broadcast to broadcast QImode to BImode vector [PR 124280]
A boolean value is in QImode, but a vector of booleans is in VxxBImode.
And both AArch64 SVE and RISC-V V have vec_duplicatevXXbi accepting a QI
scalar. Allow this case.
PR middle-end/124280
gcc/
* optabs.cc (expand_vector_broadcast): Allow broadcasting QImode
to BImode vector.
Martin Jambor [Fri, 27 Feb 2026 13:26:13 +0000 (14:26 +0100)]
ipa-prop: Reset param_index of indir. edge when there are no jfuncs (PR123229)
In my commit r16-6149-g14ee9a2b41bafa I have added an early exit to
update_indirect_edges_after_inlining which was however wrong, as
demonstrated by the PR123229 testcase. This patch reverts that change,
restoring the previous behavior in this regard.
In the testcase, the edge being inlined is a call to a thunk, which do
not have jump functions associated with them. This means that with
the early exit we neither reset the parameter index associated with
the indirect edge nor update the edges and the usage flags associated
with them
In the testcase, this meant that the param_used_by_indirect_call flag
was not updated, which in turn meant that the inlining edge cost cache
did not copy necessary information into the context which led to the
fact that two contexts which were not the same were considered the
same, and the checking code that evaluations in the cache should match
a re-evaluation triggered. But unfortunately this bug can probably
have all sorts of weird and unexpected consequences.
The testcase also shows that inlined thunks are a barrier to
devirtualization which is something I will try to address next stage1.
gcc/ChangeLog:
2026-02-27 Martin Jambor <mjambor@suse.cz>
PR ipa/123229
* ipa-prop.cc (update_indirect_edges_after_inlining): Reset parameter
index associated with an indirect edge if the inlined edge does not
have any jump functions.
Soumya AR [Thu, 26 Feb 2026 04:55:48 +0000 (04:55 +0000)]
aarch64: Fix NULL structures in base tunings being silently ignored by JSON parser
In the JSON parser's parse_object_helper for const pointer members, we have a
if (!member) return; guard at entry.
This is because the function works by dereferencing the member pointer and
making a non-const copy of the object it points to. The parser can then
override this copy with new values and re-assign the pointer to the new object.
This is problematic if member is NULL in the base tunings, but provided in the
JSON file, which can happen with some combinations of -mcpu and
-muser-provided-CPU.
For example, with no -mcpu, if the generic tunings has issue_info set to
nullptr (eg. generic_armv8_a), then even if the user does provide issue_info
data in the JSON file, parse_object_helper will silently ignore it.
The naive fix for this is to create a zero-initialized copy of the object if
it is NULL, and then override it with the new values from the JSON file.
However, this results in another problem: if the user provides only selective
fields of the strucutre, the rest of the fields will be set to zero and
potentially interfere with costing decisions.
I think at that point the best we can do is emit a warning. With David Malcolm's
improved JSON diagnostics, we can be specific about the problematic structure as
well.
----
Since we potentially zero-initialize objects, I had to add a default constructor
to objects that only had parameterized constructors.
Bootstrapped and regtested on aarch64-linux-gnu, OK for trunk?
Signed-off-by: Soumya AR <soumyaa@nvidia.com>
gcc/ChangeLog:
* config/aarch64/aarch64-json-tunings-parser.cc (parse_object_helper):
Zero-initialize objects that are NULL in the base tunings, if provided
in JSON tunings.
* config/aarch64/aarch64-protos.h (struct sve_vec_cost): Add default
constructor.
(struct aarch64_simd_vec_issue_info): Likewise.
(struct aarch64_sve_vec_issue_info): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/aarch64-json-tunings/nullptr-issue-info.c:
New test.
* gcc.target/aarch64/aarch64-json-tunings/nullptr-issue-info.json:
New test input.
Martin Jambor [Fri, 27 Feb 2026 10:58:01 +0000 (11:58 +0100)]
ipa: Meet same speculative and certain polymorphic contexts (PR123629)
PR 123629 is a somewhat complicated situation. IPA-CP clones for a
known speculative polymorphic context in a situation when a caller
bringing the known context has itself already been cloned, and now we
can determine that the context coming from that clone is not
speculative (but otherwise the same). This confuses the meet function
of contexts which gives up and returns a useless context, which in
turn triggers an assert because the value we originally cloned for is
nowhere to be found in the data structures which describe what we know
about the function clone.
This patch changes the meet function so that it can deal with this
situation. When one of the contexts does not have a certain
component, the other one is moved to the speculative one.
gcc/ChangeLog:
2026-02-23 Martin Jambor <mjambor@suse.cz>
PR ipa/123629
* ipa-polymorphic-call.cc
(ipa_polymorphic_call_context::meet_with): When an outer context is
NULL, call make_speculative on the other one.
Tamar Christina [Fri, 27 Feb 2026 07:41:20 +0000 (07:41 +0000)]
AArch64: Don't enable ptest elimination for partial vectors [PR124162]
The following loop
char b = 41;
int main() {
signed char a[31];
#pragma GCC novector
for (int c = 0; c < 31; ++c)
a[c] = c * c + c % 5;
{
signed char *d = a;
#pragma GCC novector
for (int c = 0; c < 31; ++c, b += -16)
d[c] += b;
}
for (int c = 0; c < 31; ++c) {
signed char e = c * c + c % 5 + 41 + c * -16;
if (a[c] != e)
__builtin_abort();
}
}
compiled with -O2 -ftree-vectorize -msve-vector-bits=256 -march=armv8.2-a+sve
Which uses a predicate for the first iteration where all bits are 1. i.e. all
lanes active. This causes the result of the cmpne to set the wrong CC flags.
The second iteration uses
whilelo p7.s, w0, w2
which gives the correct mask layout going forward.
This is due to the CSE'ing code that tries to share predicates as much as
possible. In aarch64_expand_mov_immediate we do during predicate generation
/* Only the low bit of each .H, .S and .D element is defined,
so we can set the upper bits to whatever we like. If the
predicate is all-true in MODE, prefer to set all the undefined
bits as well, so that we can share a single .B predicate for
all modes. */
if (imm == CONSTM1_RTX (mode))
imm = CONSTM1_RTX (VNx16BImode);
which essentially maps all predicates to .b unless the predicate is created
outside the immediate expansion code.
It creates the sparse predicate for data lane VNx4QI from a VNx16QI and then
has a "conversion" operation. The conversion operation results in a simple copy:
mov p7.b, p6.b
because in the data model for partial vectors the upper lanes are *don't care*.
So computations using this vector are fine. However for comparisons, or any
operations setting flags the predicate value does matter otherwise we get the
wrong flags as the above.
Additionally we don't have a way to distinguish based on the predicate alone
whether the operation is partial or not. i.e. we have no "partial predicate"
modes.
two ways to solve this:
1. restore the ptest for partial vector compares. This would slow down the loop
though and introduce a second ptrue .s, VL8 predicate.
2. disable the sharing of partial vector predicates. This allows us to remove
the ptest. Since the ptest would introduce a second predicate here anyway
I'm leaning towards disabling sharing between partial and full predicates.
For the patch I ended up going with 1. The reason is that this is that
unsharing the predicate does end up being pessimistic loops that only operate on
full vectors only (which are the majority of the cases).
I also don't fully understand all the places we depend on this sharing (and
about 3600 ACLE tests fail assembler scans). I suspect one way to possibly
deal with this is to perform the sharing on GIMPLE using the new isel hook and
make RTL constant expansion not manually force it. Since in gimple it's easy to
follow compares from a back-edge to figure out if it's safe to share the
predicate.
I also tried changing it so that during cond_vec_cbranch_any we perform an AND
with the proper partial predicate. But unfortunately folding doesn't realize
that the and on the latch edge is useless (e.g. whilelo p7.s, w0, w2 makes it
a no-op) and that the AND should be moved outside the loop. This is something
that again isel should be able to do.
I also tried changing the
mov p7.b, p6.b
into an AND, while this worked, folding didn't quite get that the and can be
eliminated. And this also pessimists actual register copies.
So for now I just undo ptest elimination for partial vectors for GCC 16 and will
revisit it for GCC 17 when we extend ptest elimination.
gcc/ChangeLog:
PR target/124162
* config/aarch64/aarch64-sve.md (cond_vec_cbranch_any,
cond_vec_cbranch_all): Drop partial vectors support.
gcc/testsuite/ChangeLog:
PR target/124162
* gcc.target/aarch64/sve/vect-early-break-cbranch_16.c: New test.
Andrew Pinski [Thu, 26 Feb 2026 20:06:51 +0000 (12:06 -0800)]
phiopt: Reject hot/cold predictors for early phiopt [PR117935]
In this case, early phiopt would get rid of the user provided predicator
for hot/cold as it would remove the basic blocks. The easiest and best option is
for early phi-opt don't do phi-opt if the middle basic-block(s) have either
a hot or cold predict statement. Then after inlining, jump threading will most likely
happen and that will keep around the predictor.
Note this only needs to be done for match_simplify_replacement and not the other
phi-opt functions because currently only match_simplify_replacement is able to skip
middle bb with predicator statements in it.
This allows for MIN/MAX/ABS/NEG still even with the predicators there as those will
less likely be jump threaded later on. The main thing that is rejected is ssa names
that are alone where one of the comparisons operands is that one or if we produce
a comparison from the phiopt.
Changes since v1:
* v2: Only reject if the result was the comparison.
Bootstrapped and tested on x86_64-linux-gnu.
PR tree-optimization/117935
gcc/ChangeLog:
* tree-ssa-phiopt.cc (contains_hot_cold_predict): New function.
(match_simplify_replacement): Return early if early_p and one of
the middle bb(s) have a hot/cold predict statement.
gcc/testsuite/ChangeLog:
* gcc.dg/predict-24.c: New test.
* gcc.dg/predict-25.c: New test.
Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
Robert Dubner [Thu, 26 Feb 2026 19:42:51 +0000 (14:42 -0500)]
cobol: Fix FUNCTION TRIM.
The FUNCTION TRIM now works properly with UTF16 inputs.
According to the ISO specification, the return type of a number of
intrinsic functions is defined by the variable type of their first
parameter. A number of changes here cause more functions to honor that
requirement.
gcc/cobol/ChangeLog:
* parse.y: BASECONVERT and TRIM take their type from their first
parameter.
* parse_util.h (intrinsic_return_field): The function_descrs[] is
adjusted so that a number of functions take their return type from
their first calling parameter. intrinsic_return_field() has been
refined.
* symbols.cc (new_alphanumeric): Use set_explicit() instead of
set() in support of refined intrinsic function return type.
libgcobol/ChangeLog:
* intrinsic.cc (__gg__trim): Rewritten to work properly, and avoid
unnecessary variable codeset encoding translation.
Eric Botcazou [Thu, 26 Feb 2026 21:13:22 +0000 (22:13 +0100)]
Ada: Fix bogus visibility error for iterated element association with key
The problem is that the Resolve_Iterated_Association procedure, unlike its
sibling Resolve_Iterated_Component_Association, preanalyzes a copy of the
specification so, in a generic context, global references cannot later be
captured. This changes it to preanalyze the specification directly, which
requires a small adjustment during expansion.
gcc/ada/
PR ada/124201
* exp_aggr.adb (Expand_Iterated_Component): Replace the iteration
variable in the key expression and iterator filter, if any.
* sem_aggr.adb (Resolve_Iterated_Component_Association): Preanalyze
the specification and key expression directly.
gcc/testsuite/
* gnat.dg/generic_inst17.adb: New test.
Ruslan Valiyev [Thu, 26 Feb 2026 19:15:06 +0000 (19:15 +0000)]
libiberty: fix resource exhaustion in rust demangler (PR demangler/106641)
demangle_binder() parses the bound_lifetimes count as a base-62
integer with no upper bound. A crafted symbol can encode a huge
lifetime count in very few bytes, causing OOM or CPU hang.
Cap bound_lifetimes at 1024 and check rdm->errored in the loop
so it bails out early on errors during iteration.
libiberty/ChangeLog:
PR demangler/106641
* rust-demangle.c (demangle_binder): Reject bound_lifetimes
above 1024 to prevent resource exhaustion from crafted symbols.
Add rdm->errored check in the loop condition.
* testsuite/rust-demangle-expected: Add regression test.
Signed-off-by: Ruslan Valiyev <linuxoid@gmail.com>
[PR115042, LRA]: Postpone processing of new reload insns
LRA in this PR can not find regs for asm insn which requires 11
general regs when 13 regs are available. Arm subtarget (thumb) has
two stores with low and high general regs. LRA systematically chooses
stores involving low regs as having less costs and there are only 8
low regs. That is because LRA (and reload) chooses (mov) insn
alternatives independently from register pressure.
The proposed patch postpones processing new reload insns until reload
pseudos are assigned and after that considers new reload insns.
Depending on the assignment LRA chooses insns involving low or high
regs. Generally speaking it can change code generation in better or
worse way but it should be a rare case.
The patch does not contain the test as original test is too big (300KB
of C code). Unfortunately cvise after 2 days of work managed to
decrease the test only to 100KB file.
gcc/ChangeLog:
PR target/115042
* lra-int.h (lra_constraint_insn_stack_clear): New prototype.
* lra.cc (lra_constraint_insn_stack2): New vector.
(lra_constraint_insn_stack_clear): New function.
(lra): Initialize/finalize lra_constraint_insn_stack2.
* lra-constraints.cc (lra_constraints): Use
lra_constraint_insn_stack_clear to postpone processing new reload
insns.
Jerry DeLisle [Sun, 15 Feb 2026 23:30:39 +0000 (15:30 -0800)]
Fortran: Fix run time failures when compiled with -m32
PR fortran/124080
libgfortran/ChangeLog:
* caf/shmem/hashmap.c (hash): Use size_t instead of
uint64.
(hmiadd): Use size_t instead of ssize_t.
(scan_inside_lookahead): Likewise.
(scan_empty): Likewise.
Jerry DeLisle [Sun, 15 Feb 2026 23:17:17 +0000 (15:17 -0800)]
Fortran: Add new testcase for PR121360
This test case is from the PR adjusted to reduce the execution
time and includes a suitable test condition. It was tested with
export GFORTRAN_NUM_IMAGES=200 which of course takes a bit of
time.
Jerry DeLisle [Sat, 14 Feb 2026 23:46:44 +0000 (15:46 -0800)]
Fortran: Adjust test to work with multiple images.
The testcase would fail occasionally with multiple images because the
use of acquired_lock is a non-blocking LOCK. Only UNLOCK this if the
LOCK was acquired. Keep track of the loop count and bail out if the
limit is reached.
During testing it was observed that the loop count could go as high as
33 times depending on system conditions, running the test outside the
testsuite 1000's of times.
Form team w/o new_index= tried to compute the new_index assuming that
images are scattered onto to teams. I.e. the distribution is:
Image index: 1 2 3 4 5 6
New team no: 1 2 1 2 1 2 , i.e. scattered
But this algorithm failed, when the images were linearly distributed
into the new teams, like in:
Image index: 1 2 3 4 5 6
New team no: 1 1 1 2 2 2
The new approach is to look up a free index in the new team, when the
computed one is already taken. Because F2018, 11.6.9, §4 states the
new index is processor dependent, it feels safe to do it this way.
PR fortran/124071
libgfortran/ChangeLog:
* caf/shmem.c (_gfortran_caf_form_team): Take free index, when
computed one is already taken.
Fortran: Add a shared memory coarray implementation [PR88076]
Add caf_shmem, a shared memory multi process coarray implementation.
The library adheres to the existing coarray ABI and is controlled by
environment variables for selecting the number of images and virtual
memory size.
Co-authored by: Thomas Koenig <tkoenig@gcc.gnu.org>
Nicolas Koenig <koenigni@gcc.gnu.org>
On MacOS mmap() very often does not respect the provided base address
for the shared memory segment. On the other hand the mutexes have to be
on the same (virtual) address for each process to function properly.
Therefore try a configurable number of times to get the same address for
the shared memory segment on MacOS. If that fails the user is notified
and the program terminates.
gcc/fortran/ChangeLog:
* invoke.texi: Document new environment variable GFORTRAN_IMAGE_
RESTARTS_LIMIT.
libgfortran/ChangeLog:
* caf/shmem.c (_gfortran_caf_finalize): Ensure all memory is
freeed.
* caf/shmem/allocator.c (allocator_shared_malloc): Just assert
that an index is within its bounds.
* caf/shmem/shared_memory.c (shared_memory_init): When shared
memory can not be placed at desired address, exit the image with
a certain code to let the supervisor restart the image.
(shared_memory_cleanup): Only the supervisor must unlink the shm
object.
* caf/shmem/supervisor.c (GFORTRAN_ENV_IMAGE_RESTARTS_LIMITS):
New environment variable.
(get_image_restarts_limit): Get the limit on image restarts
(accumulates over all) form the environment variable or default
to 4000.
(ensure_shmem_initialization): Add error handling.
(startWorker): Start a single worker/image.
(kill_all_images): Kill all images.
(supervisor_main_loop): When a worker/image reports a shared
memory issue just try to restart it.
* caf/shmem/thread_support.c (initialize_shared_mutex): Mark
mutex robust on plattforms that support it.
(initialize_shared_errorcheck_mutex): Same.
Cygwin's libc's pthread implementation does not support setting
pshared on mutexes and condition variables. Therefore Windows
synchronisation primitives needed to be used directly.
On MSYS2/UCRT64 fork and mmap are not available and Windows core
functionality needs to be used.
libgfortran/ChangeLog:
* caf/shmem.c (_gfortran_caf_init): Cleanup thread helper after
use.
(_gfortran_caf_finalize): Same.
(_gfortran_caf_register): Handle lock_t correctly on Windows.
(GEN_OP): Prevent warnings on non-initialized.
(_gfortran_caf_lock): Handle lock_t correctly on Windows.
(_gfortran_caf_unlock): Same.
(_gfortran_caf_random_init): Fix formatting.
(_gfortran_caf_form_team): Add more images to counter_barrier.
* caf/shmem/alloc.c: Use routines from thread_support.
* caf/shmem/allocator.c (allocator_lock): Same.
(allocator_unlock): Same.
* caf/shmem/allocator.h: Same.
* caf/shmem/collective_subroutine.c (get_collsub_buf): Same.
* caf/shmem/collective_subroutine.h: Same.
* caf/shmem/counter_barrier.c (lock_counter_barrier): Same.
(unlock_counter_barrier): Same.
(counter_barrier_init): Same.
(counter_barrier_wait): Same.
(change_internal_barrier_count): Same.
(counter_barrier_add): Same.
(counter_barrier_init_add): Only increase value w/o signaling.
(counter_barrier_get_count): Use routines from thread_support.
* caf/shmem/counter_barrier.h: Same.
(counter_barrier_init_add): New routine.
* caf/shmem/shared_memory.c: Use windows routines where
applicable.
(shared_memory_set_env): Same.
(shared_memory_get_master): Same.
(shared_memory_init): Same.
(shared_memory_cleanup): Same.
* caf/shmem/shared_memory.h: Use types from thread_support.
* caf/shmem/supervisor.c: Use windows routines where applicable.
(get_memory_size_from_envvar): Same.
(ensure_shmem_initialization): Same.
(supervisor_main_loop): Use windows process start on windows
without fork().
* caf/shmem/supervisor.h: Use types from thread_support.
* caf/shmem/sync.c (lock_table): Use routines from thread_support.
(unlock_table): Same.
(sync_init): Same.
(sync_init_supervisor): Same.
(sync_table): Same.
(lock_event): Same.
(unlock_event): Same.
(event_post): Same.
(event_wait): Same.
* caf/shmem/sync.h: Use types from thread_support.
* caf/shmem/teams_mgmt.c (update_teams_images): Use routines from
thread_support.
* caf/shmem/thread_support.c: Add synchronisation primitives for
windows.
(smax): Windows only: Max for size_t.
(get_handle): Windows only: Get the windows handle for a given
id or create a new one, if it does not exist.
(get_mutex): Windows only: Shortcut for getting a windows mutex
handle.
(get_condvar): Windows only: Same, but for condition variable.
(thread_support_init_supervisor): Windows only: Clear tracker of
allocated handle ids.
(caf_shmem_mutex_lock): Windows only: Implememtation of lock,
(caf_shmem_mutex_trylock): Windows only: trylock, and
(caf_shmem_mutex_unlock): Windows only: unlock for Windows.
(bm_is_set): Windows only: Check a bit is set in a mask.
(bm_clear_bit): Windows only: Clear a bit in a mask.
(bm_set_mask): Windows only: Set all bits in a mask.
(bm_is_none): Windows only: Check if all bits are cleared.
(caf_shmem_cond_wait): Windows only: Condition variable
implemenation fro wait,
(caf_shmem_cond_broadcast): Windows only: broadcast, and
(caf_shmem_cond_signal): Windows only: signal on Windows.
(caf_shmem_cond_update_count): Windows only: Need to know the
images participating in a condition variable.
(thread_support_cleanup): Windows only: Clean up the handles on
exit.
* caf/shmem/thread_support.h: Conditionally compile the types
as required for Windows and other OSes.
Fortran: Add a shared memory multi process coarray implementation [PR88076]
Add caf_shmem, a shared memory multi process coarray implementation. The
library adheres to the existing coarray ABI and is controlled by some
environment variables for selecting the number of images and virtual
memory size (see invoke.texi).
Co-authored by: Thomas Koenig <tkoenig@gcc.gnu.org>
Nicolas Koenig <koenigni@gcc.gnu.org>
PR fortran/88076
gcc/fortran/ChangeLog:
* invoke.texi: Add description for use.
libgfortran/ChangeLog:
* caf/libcaf.h (LIBCAF_H): Remove unused header inclusions.
* caf/caf_error.c: New file.
* caf/caf_error.h: New file.
* caf/shmem.c: New file.
* caf/shmem/alloc.c: New file.
* caf/shmem/alloc.h: New file.
* caf/shmem/allocator.c: New file.
* caf/shmem/allocator.h: New file.
* caf/shmem/collective_subroutine.c: New file.
* caf/shmem/collective_subroutine.h: New file.
* caf/shmem/counter_barrier.c: New file.
* caf/shmem/counter_barrier.h: New file.
* caf/shmem/hashmap.c: New file.
* caf/shmem/hashmap.h: New file.
* caf/shmem/shared_memory.c: New file.
* caf/shmem/shared_memory.h: New file.
* caf/shmem/supervisor.c: New file.
* caf/shmem/supervisor.h: New file.
* caf/shmem/sync.c: New file.
* caf/shmem/sync.h: New file.
* caf/shmem/teams_mgmt.c: New file.
* caf/shmem/teams_mgmt.h: New file.
* caf/shmem/thread_support.c: New file.
* caf/shmem/thread_support.h: New file.
Fortran: Fix signatures of coarray API and caf_single.
The teams argument to some functions was marked as unused in the header.
With upcoming caf_shmem this is incorrect, given the mark is repeated in
caf_single.
libgfortran/ChangeLog:
* caf/libcaf.h (_gfortran_caf_failed_images): Team attribute is
used now in some libs.
(_gfortran_caf_image_status): Same.
(_gfortran_caf_stopped_images): Same.
* caf/single.c (caf_internal_error): Use correct printf function
to handle va_list.
Fortran: Fix coarray generation for char arrays and derived types.
Fix the generation of a coarray, esp. its bounds, for char arrays.
When a scalar char array is used in a co_reduce the coarray part was
dropped.
Furthermore for class typed dummy arguments where derived types were
used as actual arguments the coarray generation is now done, too.
gcc/fortran/ChangeLog:
* trans-expr.cc (get_scalar_to_descriptor_type): Fix coarray
generation.
(copy_coarray_desc_part): New function to copy coarray dimensions.
(gfc_class_array_data_assign): Use the new function.
(gfc_conv_derived_to_class): Same.
Fortran: Small fixes of coarray routines handling and code gen.
gcc/fortran/ChangeLog:
* check.cc (gfc_check_image_status): Fix argument index of team=
argument for correct error message.
* trans-intrinsic.cc (conv_intrinsic_image_status): Team=
argument is optional and is a pointer to the team handle.
* trans-stmt.cc (gfc_trans_sync): Make images argument also a
dereferencable pointer. But treat errmsg as a pointer to a
char array like in all other functions.
gcc/testsuite/ChangeLog:
* gfortran.dg/coarray_sync_memory.f90: Adapt grep pattern for
msg being only &msg.
Matthieu Longo [Fri, 30 Jan 2026 15:53:18 +0000 (15:53 +0000)]
aarch64: remove GNU properties expectations from a BTI test
When branch protections are enabled (see -mbranch-protection), GCC tags
the output object file with metadata describing which security features
are used, allowing the GNU linker to detect incompatibilities between
objects in the same link unit.
Originally, this metadata was conveyed via GNU properties. GCC emitted a
.note.gnu.property section containing a GNU_PROPERTY_AARCH64_FEATURE_1_AND
entry.
Build Attributes v2 (OAv2) aim at replacing GNU properties, provinding
a more flexible way to express complex metadata and making easier for
tools like linkers to parse them.
Since the runtime linker only understands GNU properties, the GNU static
linker translates OAv2 attributes into GNU properties. As a result,
emitting both GNU properties and OAv2 in the same object file is redundant.
When GCC detects OAv2 support in GNU binutils, it therefore emits only
OAv2 directives.
Support for OAv2 was added in [1], along with new tests covering both
the emission/omission of GNU properties/OAv2 directives. However, an older
BTI test that checked for the presence of a GNU properties section was
left unchanged. This test now fails when GNU binutils support OAv2, as no
GNU properties are emitted.
This patch removes the expectations of the presence of GNU properties from
that BTI test.
Robin Dapp [Thu, 19 Feb 2026 14:44:38 +0000 (15:44 +0100)]
RISC-V: Consider uses for vsetvl LCM transparency. [PR122448]
Until now we didn't consider (pre-existing) uses of vsetvl's destination
registers when computing transparency for vsetvl LCM. In rare instances,
this can lead to hoisting vsetvls beyond blocks that have uses on such
registers.
We already check transparency when hoisting but here LCM computes edge
insertion points.
For vsetvl a5,zero,e16,m1 in BB 65 we have the following, not
particularly uncommon, situation:
BB 64 uses a5, so is not transparent with respect to the vsetvl.
BB 63 -> BB 65 is an edge LCM computes as earliest.
But we're not inserting the vsetvl on just that edge like in regular LCM
where we could have a new block along that edge but instead insert it at
the end of BB 63. At that point, though, the other outgoing edges and
successor blocks have to be considered as well.
The patch is two-fold. It adds a new bitmap m_reg_use_loc that keeps
track of uses of vsetvl destinations, rather than just new definitions
and adds them to the transparency bitmap. This correct LCM's
computations with respect to uses. Then, as described above, it
prevents hoisting into the target block (BB 63) if the vsetvl's
destination register is used outside of vsetvls in any other
successor (BB 64).
In regular, non-speculating LCM we would be able to just check ANTOUT but
as we are hoisting speculatively this won't work. We don't require all
successors to have a vsetvl in order to hoist it to a block.
Therefore the patch computes reaching definitions for all vsetvl's
destination registers up to their AVL uses. Knowing a block's live-in
and the reaching definitions we can deduce that a use must be non-vsetvl
and prone to clobbering.
PR target/122448
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (compute_reaching_defintion):
Rename...
(compute_reaching_definition): ...To this.
(pre_vsetvl::compute_vsetvl_def_data): Compute reaching
definitions for vsetvl VL -> vsetvl AVL.
(pre_vsetvl::compute_transparent): Include VL uses.
(pre_vsetvl::fuse_local_vsetvl_info): Initialize m_reg_use_loc.
(pre_vsetvl::earliest_fuse_vsetvl_info): Don't hoist if any
successor would use VL.
Karl Meakin [Thu, 11 Dec 2025 16:19:22 +0000 (16:19 +0000)]
aarch64: fix `cmpbr-3.c` tests
The assembly tests in `cmpbr-3.c` were failing when run with an old
version of `gas` which did not recognise the extension. Fix by changing
`dg-do assemble` to `dg-do compile`.
This patch fixes a very annoying problem where we emit a bogus
check_out_of_consteval_use error. The error is provoked while
processing
[: std::meta::reflect_constant_array (data) :]
The argument of a [: :] is a constant-expression = a manifestly
constant-evaluated context, so any consteval-only exprs in it
are OK. But in eval_reflect_constant_array we do get_template_parm_object
which does push_to_top_level -- so we have no scope_chain, therefore
any in_consteval_if_p and current_function_decl are cleared, so we're
not in an immediate context. As part of this get_template_parm_object,
we call cp_finish_decl -> check_initializer -> build_aggr_init ->
-> build_vec_init.
Here in build_vec_init try_const is true, but we still generate code
for the initializer like
etc. We add ++D.67757 with finish_expr_stmt which calls
convert_to_void -> check_out_of_consteval_use which causes the error
because ++D.67757's type is consteval-only. Note that what we end up using
is the simple
because we didn't see anything non-const in the initializer.
Rather than convincing check_out_of_consteval_use that we are in an
immediate context, we should only call check_out_of_consteval_use on the
outermost statement, not sub-statements like the ++D.67757 above. This
is not a complete fix though, see the FIXME.
PR c++/123662
PR c++/123611
gcc/cp/ChangeLog:
* cvt.cc (convert_to_void): Only call check_out_of_consteval_use
when stmts_are_full_exprs_p.
gcc/testsuite/ChangeLog:
* g++.dg/reflect/reflect_constant_array5.C: New test.
* g++.dg/reflect/reflect_constant_array6.C: New test.
Xi Ruoyao [Thu, 26 Feb 2026 03:55:22 +0000 (11:55 +0800)]
middle-end: extend the narrower shift amount before broadcasting it [PR 124250]
The comment above expand_vector_broadcast() states a precondition that
the mode of op must be the element mode of vmode. But when
expand_binop() called expand_vector_broadcast() to broadcast the shift
amount, it only truncated the shift amount if it's too wide, but no
action is performed if the shift amount is too narrow.
PR middle-end/124250
PR target/123807
gcc/
* optabs.cc (expand_vector_broadcast): Add a checking assert to
verify the precondition about the input modes.
(expand_binop): Extend the shift amount if it's narrower than
the element of the shifted vector.
Marek Polacek [Tue, 24 Feb 2026 18:38:48 +0000 (13:38 -0500)]
c++/reflection: members_of and cv-qual class types [PR124215]
Here when asking for the members of "^^Test const" we found nothing.
The reason is that members_of_representable_p checks whether
CP_DECL_CONTEXT != c, but if c is a type, it doesn't look at its
TYPE_MAIN_VARIANT. Fixed as per Jakub's suggestion in the PR.
PR c++/124215
gcc/cp/ChangeLog:
* reflect.cc (class_members_of): Use TYPE_MAIN_VARIANT of R.
gcc/testsuite/ChangeLog:
* g++.dg/reflect/members_of9.C: New test.
Co-authored-by: Jakub Jelinek <jakub@redhat.com> Reviewed-by: Jason Merrill <jason@redhat.com>
Yuao Ma [Wed, 25 Feb 2026 12:44:07 +0000 (20:44 +0800)]
libstdc++: complete P0493R5 with pointer support
Previous implementations of fetch_min/max only supported integers, not
handling pointers. To complete the paper, we need to implement support
for pointers as well. This patch adds the missing functionality and
test cases.
libstdc++-v3/ChangeLog:
* include/bits/atomic_base.h (__atomic_base<_PTp*>::fetch_min,
__atomic_base<_PTp*>::fetch_max,
__atomic_ref<_Pt, false, false, true>::fetch_min,
__atomic_ref<_Pt, false, false, true>::fetch_max): Define new
functions.
* include/std/atomic (atomic<_Tp*>::fetch_min,
atomic<_Tp*>::fetch_max): Likewise.
(atomic_fetch_min_explicit, atomic_fetch_max_explicit,
atomic_fetch_min, atomic_fetch_max): Change parameter from
__atomic_base<_ITp>* to atomic<_Tp>*.
* testsuite/29_atomics/atomic/pointer_fetch_minmax.cc: New test.
* testsuite/29_atomics/atomic_ref/pointer_fetch_minmax.cc: New
test.
This patch fixes the wrong code regression PR target/124194 on x86_64.
The target implements a pre-reload splitter that recognizes that
integer vector comparisons can be evaluated at compile-time when the
operands being compared are the same (register). The (admittedly rare)
case when the comparison operator is always-true, was incorrectly
handled and folded to false instead of the correct value true.
2025-02-26 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
PR target/124194
* config/i386/sse.md (*<avx512>_cmp<mode>3_dup_op): Also return
CONSTM1_RTX for the case cmp_imm == 7 (predicate TRUE).
gcc/testsuite/ChangeLog
PR target/124194
* gcc.target/i386/pr124194.c: New test case.
Roger Sayle [Thu, 26 Feb 2026 08:03:25 +0000 (08:03 +0000)]
PR c/119651: Fix some unexpected error_mark_node ICEs.
This patch resolves PR c/119651 and PR c/123472 P4 regressions.
2026-02-26 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
PR c/119651
PR c/123472
* fold-const.cc (tree_nonzero_bits): Rename the original as a
static function taking an additional precision parameter. Make
this implementation robust to error_mark_node. Preserve the
original API by checking for error_operand_p before invoking the
static helper function.
gcc/testsuite/ChangeLog
PR c/119651
PR c/123472
* gcc.dg/pr119651.c: New test case.
* gcc.dg/pr123472.c: Likewise.
H.J. Lu [Wed, 31 Dec 2025 23:14:57 +0000 (07:14 +0800)]
Add default_promote_function_mode_sign_extend
TARGET_PROMOTE_PROTOTYPES is an optimization, not an ABI requirement.
TARGET_PROMOTE_FUNCTION_MODE should be used for ABI requirement. Like
xtensa, mcore ABI requires sign extension of signed 8/16-bit integer
arguments to 32 bits and zero extension of unsigned integer 8/16-bit
arguments to 32 bits:
1. Rename xtensa_promote_function_mode to
default_promote_function_mode_sign_extend to sign-extend signed 8/16-bit
integer arguments to 32 bits and zero-extend of unsigned 8/16-bit
integer arguments to 32 bits.
2. Replace xtensa_promote_function_mode with
default_promote_function_mode_sign_extend.
3. Remove TARGET_PROMOTE_PROTOTYPES for mcore and define
TARGET_PROMOTE_FUNCTION_MODE with
default_promote_function_mode_sign_extend to properly extend 8/16-bit
arguments to 32 bits.
Targets with the same ABI requirement should define
TARGET_PROMOTE_FUNCTION_MODE with
default_promote_function_mode_sign_extend.
PR target/119979
PR target/120888
* gcc.target/xtensa/pr120888-1.c: Removed to ...
* gcc.dg/zero-extend.c: This. Enable for mcore and xtensa.
* gcc.target/xtensa/pr120888-2.c: Removed to ...
* gcc.dg/sign-extend.c: This. Enable for mcore and xtensa.
Jose E. Marchesi [Wed, 25 Feb 2026 23:43:03 +0000 (00:43 +0100)]
a68: handle Darwin's #1/NN archive members
In Darwin archives use an extension to encode the member names
off-header, in the first bytes of the contents. The name in the
header proper is then #1/NN... where NN... is an ascii-encoded number
in decimal with the length of the name, which is encoded right after
the header as part of the contents.
This patch fixes the Algol 68 module importing from archives in Darwin
by acknowledging this extension. Note that, for the moment, we don't
bother to fetch the actual member name. This can lead to poor
diagnostics, so we probably will fix that at some point.
Signed-off-by: Jose E. Marchesi <jemarch@gnu.org>
gcc/algol68/ChangeLog
* a68-imports-archive.cc (Archive_file): Handle Darwin #1/NN
archive members.
Philipp Tomsich [Mon, 23 Feb 2026 10:05:06 +0000 (11:05 +0100)]
avoid-store-forwarding: Fix sbitmap memory leak in process_store_forwarding
forwarded_bytes was allocated with sbitmap_alloc but never freed on any
of the function's return paths. Use auto_sbitmap instead, which calls
sbitmap_free in its destructor.
gcc/ChangeLog:
* avoid-store-forwarding.cc
(store_forwarding_analyzer::process_store_forwarding): Use
auto_sbitmap for forwarded_bytes to ensure it is freed on all
return paths.
Philipp Tomsich [Mon, 23 Feb 2026 11:11:07 +0000 (12:11 +0100)]
avoid-store-forwarding: Fix include order and drop cselib.h include
The header file included config.h, system.h, coretypes.h,
backend.h, and rtl.h directly, which is unconventional for GCC
headers. Strip those includes from the header and fix the include
order in the .cc file so that config.h comes first. Also remove
the unused cselib.h include.
gcc/ChangeLog:
* avoid-store-forwarding.cc: Move config.h before
avoid-store-forwarding.h; place avoid-store-forwarding.h
after rtl.h; remove unused cselib.h include.
* avoid-store-forwarding.h: Remove includes of config.h,
system.h, coretypes.h, backend.h, rtl.h.
fortran: Fix ICE in ALLOCATE of sub-objects with recursive types
The deep-copy wrapper generation for recursive allocatable array
components (PR121628) calls cgraph_node::add_new_function to register
the wrapper. During PARSING state, add_new_function calls
finalize_function which triggers ggc_collect(). This garbage
collection frees locally-computed tree nodes (COMPONENT_REFs etc.)
in caller stack frames of structure_alloc_comps that are not yet
attached to any GC-rooted structure, causing a segfault when those
nodes are subsequently accessed.
Use finalize_function with no_collect=true to skip the collection.
The GC will run at a safe point later.
PR fortran/124235
gcc/fortran/ChangeLog:
* trans-array.cc (generate_element_copy_wrapper): Use
cgraph_node::finalize_function with no_collect=true instead
of cgraph_node::add_new_function to avoid garbage collection
while caller frames hold unrooted tree nodes.
gcc/testsuite/ChangeLog:
* gfortran.dg/pr124235.f90: New test.
Signed-off-by: Christopher Albert <albert@tugraz.at>
bpf: Split expressions for proper CO-RE code generation
This patch corrects CO-RE generation for the cases where an expression
starts with a non-CO-RE access, but in the middle it requires to
generate CO-RE to correctly compute the access location.
It fixes it by splitting the expression into their CO-RE and non-CO-RE
counterparts. It performs this by walking gimple expressions, and for
each field access to which its type is a struct or union, it verifies if
both the types for the base and field are attributed similarly.
Otherwise, it splits the expression at this location by creating a
temporary variable and performing any required pointer conversions.
This smaller expressions are converted to CO-RE in the subsequent
gimple walker.
There is no way in GCC to distinguish nested struct/union definitions
from non-nested ones.
This patch simplifies code and enforces that all preserve_access_index
structs/unions would be attributed explicitly.
Previous approach was error prone as it would extend CO-RE accesses to
structures which would not be attributed.
All GCC BPF dejagnu passes tests:
# of expected passes 553
# of expected failures 6
gcc/ChangeLog:
PR target/120241
* config/bpf/core-builtins.cc
(is_attr_preserve_access): Correct for pointer types.
(maybe_get_base_for_field_expr, core_access_index_map,
core_access_clean, core_is_access_index, core_mark_as_access_index):
Remove.
(make_gimple_core_safe_access_index): Remove function.
(struct walker_data): New struct to pass data to tree walker.
(callback_should_do_core_access, should_do_core_access): Add
function to identify expressions that should not be converted to
CO-RE.
(core_make_builtins): Add callback tree walker function to
convert expressions to CO-RE.
(callback_find_next_split_location, core_should_split_expr,
find_next_split_location, gimple_core_early_split_expr): Add
function to split expressions in CO-RE and non-CO-RE
expressions.
(execute_lower_bpf_core): Adapt to new code.
* config/bpf/bpf.opt: Add option Wco-re.
* doc/invoke.texi: Add documentation for Wco-re.
Andrew Pinski [Sun, 22 Feb 2026 00:43:53 +0000 (16:43 -0800)]
fn-split: Move clobbers from the old exit bb to new call block after the call [PR110091]
After outlinining the bbs for function splitting, we move the clobbers that were in the
last bb to be after the newly calling function.
This allows for stack location sharing and more when the non split out part is inlined
into another function.
This also fixes some of the warnings about dangling-pointers because
the clobbers are now correctly handled while function splitting.
The testcases test for the cases where the dangling-pointers pointer
warnings would show up too.
Note only end of storage clobbers in this case.
Changes since v1:
* v2: Add comments and add a call to unlink_stmt_vdef/release_ssa_name.
Bootstrapped and tested on x86_64-linux-gnu.
PR tree-optimization/110091
gcc/ChangeLog:
* ipa-split.cc (split_function): Find the bb
which is used for return in the outlined function.
Move the clobbers that are at the end of that bb
to be after the new call.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/pr110091-3.c: New test.
* gcc.dg/tree-ssa/pr110091-4.c: New test.
Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
Andrew Pinski [Sat, 21 Feb 2026 22:38:12 +0000 (14:38 -0800)]
fn-split: Insert new call after clobbers/debug stmt [PR110091]
So for function splitting when we outlined the function, we
should keep around the clobbers that were at the begining of
the bb which will be outlined. So change the last stmt
to where we split the bb for where the function call will be
to be after the clobbers.
Note we have to ignore the debug stmts here otherwise you would
get a debug comparison failure.
This also fixes some of the warnings about dangling-pointers because
the clobbers are now correctly handled while function splitting.
The testcases test for the cases where the dangling-pointers pointer
warnings would show up too.
Note only end of storage clobbers in this case.
Bootstrapped and tested on x86_64-linux-gnu.
PR tree-optimization/110091
gcc/ChangeLog:
* ipa-split.cc (split_function): Split after
the clobbers/debug stmts rather than after the labels.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/pr110091-1.c: New test.
* gcc.dg/tree-ssa/pr110091-2.c: New test.
Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
When TARGET_SALT is configured in the Xtensa ISA, a Boolean evaluation of
LT/GT[U] between address (GP) registers can be done in a single machine
instruction, making it easy to implement the spaceship operator by sub-
tracting one from the other result.
/* examples */
int test0(int a, int b) {
return a == b ? 0 : (a > b ? 1 : -1);
}
int test1(unsigned int a, unsigned int b) {
return a == b ? 0 : (a > b ? 1 : -1);
}
Marek Polacek [Thu, 19 Feb 2026 17:40:39 +0000 (12:40 -0500)]
c++/reflection: also walk BIND_EXPR_BODY
As discussed in
<https://gcc.gnu.org/pipermail/gcc-patches/2026-January/705756.html>,
we shouldn't walk BIND_EXPR_VARS in check_out_of_consteval_use_r, but
BIND_EXPR_BODY should still be walked.
The IF_STMT is there so that we don't emit bogus errors in "if consteval"
branches, as tested in expr12.C.
gcc/cp/ChangeLog:
* reflect.cc (check_out_of_consteval_use_r): Walk BIND_EXPR_BODY.
For IF_STMT_CONSTEVAL_P, only walk the ELSE_CLAUSE. For
IF_STMT_CONSTEXPR_P, only walk the THEN_ and ELSE_CLAUSE.
gcc/testsuite/ChangeLog:
* g++.dg/reflect/expr11.C: Test more if constexpr.
* g++.dg/reflect/expr12.C: Adjust test.
Richard Biener [Tue, 24 Feb 2026 08:53:00 +0000 (09:53 +0100)]
target/120234 - adjust vector construction costs
The following allows vectorizing the gcc.target/i386/pr111023*.c
testcases again with -m32 -msse2 by ensuring we see through a cast
when looking for vector extract sources during costing of vector construction.
This, together with the forwprop fix fixes the regression on those testcases.
PR target/120234
* config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
For constructor elements always look through a conversion.
Rewrite load and vector extraction matching to be more obvious.
Allow arbitrary conversions from the vector extract to elide
costing of a gpr<->xmm move.
Iain Sandoe [Tue, 24 Feb 2026 11:44:27 +0000 (11:44 +0000)]
libiberty, Darwin: Fix handling of file offsets.
In the case where a Mach-O object is embedded inside some container
(e.g. an archive) we must account the offset from the start of that
container when reading. In most cases, this has been done correctly.
However, we were missing the case for reading segment data. This
only showed up once we tried using archives (since regular Mach-O
objects start at the begining of the file).
Fixed thus.
libiberty/ChangeLog:
* simple-object-mach-o.c
(simple_object_mach_o_segment): Account for the offset of
this Mach-O object from the start of any container.
Andrew Pinski [Tue, 27 Jan 2026 20:19:13 +0000 (12:19 -0800)]
aarch64: early-ra: Fix handling of multi-register allocation with clobbers [PR123285]
So the problem here is while forming chains, we don't process hard register
conflicts (and ABI based ones) for allocnos which are already part of a chain.
This means sometimes we allocate a register to a color which might be clobbered
over is live range.
Processing clobbers for all allocnos don't work while forming a chain does
not work as the chain's front allocnos' candidates does not get updated.
So we need to the processing of clobbers (and ABI clobbers) before starting
to form the chains.
Changes since v1:
* v2: remove accidental hack which was there just for testing.
* v3: Move the copying of the shared part to new earlier loop too.
Fix small white space issue.
Bootstrappd and tested on aarch64-linux-gnu.
PR target/123285
gcc/ChangeLog:
* config/aarch64/aarch64-early-ra.cc (early_ra::form_chains): Process clobbers
and ABI clobbers before starting to form the chain.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/pr123285-1.c: New test.
Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
Jonathan Yong [Tue, 17 Feb 2026 02:08:55 +0000 (02:08 +0000)]
gcc.dg/plugin: fix spurious llp64 warnings
Fixes compile tests with mingw-w64.
gcc/testsuite/ChangeLog:
* gcc.dg/plugin/taint-pr112850-precise.c:
(__kernel_ulong_t): Change unsigned long to __UINTPTR_TYPE__.
(__kernel_size_t): Change __kernel_ulong_t to __kernel_size_t.
(copy_from_user): Change unsigned long n to size_t n.
(snd_rawmidi_ioctl): Change unsigned long arg to uintptr_t arg.
* gcc.dg/plugin/taint-pr112850-too-complex.c: Ditto.
* gcc.dg/plugin/taint-pr112850-unsanitized.c: Ditto.
* gcc.dg/plugin/taint-pr112850.c: Ditto.
Sandra Loosemore [Sat, 21 Feb 2026 01:04:14 +0000 (01:04 +0000)]
doc: Fix the attribute urlifier after changes to indexing [PR88472]
Recent patches to the GCC manual have merged previously-separate
sections for function, variable, type, and statement attributes, and
created a separate index for attributes instead of putting them in the
concept index. This reorganization broke the attribute URLifier and its
self-tests. I've fixed it up and regenerated attr-urls.def.
gcc/ChangeLog
PR other/88472
* Makefile.in (ATTR_URLS_HTML_DEPS): Point at new index file.
* attr-urls.def: Regenerated.
* gcc-attribute-urlifier.cc (test_attribute_urlifier): Adjust
URLs to match formatting in the new index.
* regenerate-attr-urls.py (parse_html_line_attribute_index):
Update pattern to match formatting in the new combined index.
Don't segregate entries into separate function/variable/etc
arrays.
(INDEX_REL_PATH): Point at the new index file.
(class TestParsingIndex): Update patterns in self-tests to match
the current formatting.
Sandra Loosemore [Thu, 19 Feb 2026 18:26:32 +0000 (18:26 +0000)]
doc: Consolidate documentation for naked attribute [PR88472]
This attribute has been documented similarly in the sections for 12
different targets. I think it's time to promote this to a common
attribute and document it only once with a warning that it's not
supported everywhere.
gcc/ChangeLog
PR other/88472
* doc/extend.texi (Common Attributes): Document the "naked"
attribute here.
(ARC Attributes): Delete entry for "naked".
(ARM Attributes): Likewise.
(AVR Attributes): Likewise.
(BPF Attributes): Likewise.
(C-SKY Attributes): Likewise.
(MCORE Attributes): Delete entire section since "naked" was
the only thing listed.
(MSP430 Attributes): Delete entry for "naked".
(NDS32 Attributes): Likewise.
(RISC-V Attributes): Likewise.
(RL78 Attributes): Likewise.
(RX Attributes): Likewise.
(x86 Attributes): Likewise.
gcc/ChangeLog
PR other/88472
* doc/extend.texi (Common Attributes): Consolidate documentation
for "cold" and "hot" attributes, including the C++-specific
behavior.
(C++ Attributes): Likewise, just point to the main entry.
Sandra Loosemore [Thu, 19 Feb 2026 17:15:05 +0000 (17:15 +0000)]
doc, riscv: Tidy RISC-V attribute documentation
gcc/ChangeLog
* doc/extend.texi (RISC-V Attributes): Format and index options
for the "target" attribute consistently with the documentation
for other back ends.
Sandra Loosemore [Mon, 16 Feb 2026 23:48:24 +0000 (23:48 +0000)]
doc, loongarch: Clean up LoongArch attribute documentation
This section of the manual was in need of general tidying for grammar
and markup, as well as correcting confusion resulting from using "attribute"
to refer both to the target attribute and its individual arguments. I also
added LoongArch to the lists of targets supporting target_clones and
target_version in other sections of the manual.
gcc/ChangeLog
* doc/extend.texi (Common Attributes): Add LoongArch to lists of
targets supporting target_clones and target_version.
(LoongArch Attributes): Copy-edit for grammar and markup. Wrap
excessively long lines. Rearrange the introductory material for
the target attribute. Correct index entries for target attribute
options.
(Function Multiversioning): Add LoongArch to list of targets
supporting this feature. Fix nearby typo.
The presentation in this section previously documented and referred to
the options that could be specified in the "target" attribute string
as if they were attributes themselves, which was quite confusing. I've
straightened out the terminology and reorganized the text to put the
introductory material and examples first instead of at the end, and fixed
the markup and formatting to match what's already used for other targets
that support this attribute.
gcc/ChangeLog
* doc/extend.texi (AArch64 Attributes): Reorganize material in this
section, correct terminology and formatting.
Sandra Loosemore [Thu, 19 Feb 2026 05:37:27 +0000 (05:37 +0000)]
doc: General copy-editing in Attributes section
This patch fixes a number of copy-editing issues in the attributes
documentation that are not specifically related to the restructuring
of this section for PR88472. This includes typos, grammatical errors
like inappropriate verb tenses, switching from passive to active
voice, missing or incorrect markup, missing @noindent after examples,
hbox overflows in the PDF manual, and so on.
gcc/ChangeLog
* doc/extend.texi (Attributes): General copy-editing.
(C++ Attributes): Likewise.
Sandra Loosemore [Sat, 14 Feb 2026 22:46:54 +0000 (22:46 +0000)]
doc: Tag attributes with what they apply to [PR88472]
After merging the lists of function/variable/type/etc attributes, it
wasn't always clear what particular attributes applied to without
reading through the description. This patch adopts the practice from
the C standard of starting each attribute section with a paragraph
describing what it can apply to. In many cases this just involved
adding a paragraph break after the first sentence of the description;
others required a bit of rephrasing too.
gcc/ChangeLog
PR other/88472
* doc/extend.texi (Attributes): Start each attribute's
documentation with a short paragraph describing what it applies to.
(C++ Attributes): Likewise.
Sandra Loosemore [Wed, 18 Feb 2026 01:05:31 +0000 (01:05 +0000)]
doc: Merge function, variable, type, and statement attribute sections [PR88472]
The previous organization of the Attributes section of the manual was like
Attributes
Function Attributes
Common Function Attributes
+ various subsections by target
Variable Attributes
Common Variable Attributes
+ various subsections by target
Type Attributes
likewise
Label Attributes
Enumerator Attributes
Statement Attributes
GNU Attribute Syntax
There was a bunch of introductory text duplicated at the top of the
sections for each kind of attribute, and many attributes were listed
in multiple places -- particularly linker-related attributes like
"section" that apply to both functions and variables with the same
semantics.
The material has been reorganized by merging the corresponding
sections for each kind of attribute:
Attributes
Common Attributes
Target-Specific Attributes
+ various subsections by target
GNU Attribute Syntax
Most of the previous boilerplate introductory text for each subsection
has been discarded since it's been replaced by a general introduction
in the top-level Attributes section in a previous patch of this
series. The duplicate entries for different kinds of attributes of
the same name have been merged and in some cases I reworded things to
provide explicit context about what entities the attribute applies to.
gcc/ChangeLog
PR other/88472
* doc/extend.texi (Attributes): Merge respective subsections of
Function Attributes, Variable Attributes, Type Attributes,
Label Attributes, Enumerator Attributes, and Statement Attributes
into new sections Common Attributes and Target-Specific Attributes.
Fix cross-references.
* doc/invoke.texi: Fix cross-references.
* doc/trouble.texi: Likewise.
doc: Rewrite/reorganize discussion of attribute syntax [PR102397]
Now that GCC's default language dialect for both C and C++ includes
support for the standard attribute syntax, we should encourage users
to prefer that instead of the legacy GNU syntax, while recognizing
that there is a lot of code out there using the latter. This patch
updates the discussion in the introduction to the Attributes section
with examples showing attribute placement in both syntaxes and focuses
the syntax section on the GNU syntax only. (Users can read the C/C++
standards, programming books or tutorials, etc to learn about the
standard syntax, so we don't need to document that in detail.)
gcc/ChangeLog
PR c++/102397
* doc/extend.texi (Attributes): Rewrite and expand discussion
of standard vs legacy syntax, with several examples.
(Attribute Syntax): Rename section to...
(GNU Attribute Syntax): ...this. Prune discussion of standard
attribute syntax. Fix cross-references.
David Malcolm [Tue, 24 Feb 2026 22:16:59 +0000 (17:16 -0500)]
analyzer: fix ICE on (X + (-X)) for vectors [PR124188]
gcc/analyzer/ChangeLog:
PR analyzer/124188
* region-model-manager.cc
(region_model_manager::maybe_fold_binop): Don't attempt to fold
X + (-X) to zero for vector types.
gcc/testsuite/ChangeLog:
PR analyzer/124188
* c-c++-common/analyzer/vector-ice-pr124188.c: New test.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
David Malcolm [Tue, 24 Feb 2026 22:16:58 +0000 (17:16 -0500)]
analyzer: fix ICE on division by zero [PR124195]
gcc/analyzer/ChangeLog:
PR analyzer/124195
* region-model-manager.cc
(region_model_manager::maybe_fold_binop): Bulletproof against
division by zero by returning "unknown".
* region-model.cc (region_model::get_gassign_result): Bail out for
division by zero.
* svalue.cc (svalue::maybe_get_value_range): Rename to...
(svalue::maybe_get_value_range_1): ...this.
(constant_svalue::maybe_get_value_range): Rename to...
(constant_svalue::maybe_get_value_range_1): ...this.
(unknown_svalue::maybe_get_value_range): Rename to...
(unknown_svalue::maybe_get_value_range_1): ...this.
(unaryop_svalue::maybe_get_value_range): Rename to...
(unaryop_svalue::maybe_get_value_range_1): ...this.
(binop_svalue::maybe_get_value_range): Rename to...
(binop_svalue::maybe_get_value_range_1): ...this.
* svalue.h (svalue::maybe_get_value_range): Reimplement inline,
asserting that if we get a result it is not undefined_p. Use
maybe_get_value_range_1 for the vfunc.
(svalue::maybe_get_value_range_1): Rename from above.
(constant_svalue::maybe_get_value_range): Rename to...
(constant_svalue::maybe_get_value_range_1): ...this.
(unknown_svalue::maybe_get_value_range): Rename to...
(unknown_svalue::maybe_get_value_range_1): ...this.
(unaryop_svalue::maybe_get_value_range): Rename to...
(unaryop_svalue::maybe_get_value_range_1): ...this.
(binop_svalue::maybe_get_value_range): Rename to...
(binop_svalue::maybe_get_value_range_1): ...this.
gcc/testsuite/ChangeLog:
PR analyzer/124195
* c-c++-common/analyzer/divide-by-zero-1.c: New test.
* c-c++-common/analyzer/divide-by-zero-pr124195-2.c: New test.
* gcc.dg/analyzer/divide-by-zero-pr124195-1.c: New test.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
where the clobber constraint for the third alternative is 'X'.
This is supposed to express that we accept anything because we don't
need the scratch for that alternative anyway.
However, in mask_gather_load_run-11.c we create a mem
Robin Dapp [Wed, 18 Feb 2026 11:10:13 +0000 (12:10 +0100)]
RISC-V: theadvector specifics for vec_init and vec_extract. [PR124147]
The mask-mode vec_init and vec_extract expanders assume that we can
create QImode vectors with the same number of units as the mask mode
has. XTheadVector does not have fractional-LMUL modes and we ICE when
trying to expand the actual insns.
An obvioius solution would be to simply disable the autovec expanders for
TARGET_XTHEADVECTOR but exactly these optab/mode combination has no fallback
in the common expansion code. That's a known problem and should be fixed
separately in extract_bit_field_1.
For now, though, we do not need to use small modes and can go with full
vectors instead. The excess elements don't matter.
To that end, this patch uses paradoxical subregs on the source (for
vec_extract) and on the destination (for vec_init), leaving the
remaining elements undefined.
In order to obtain the right "full vector" I needed to adjust
get_m1_mode slightly. By default it returns a VLA mode so when
introducing a subreg like above we can have
(subreg:full_vector_mode (reg:small_vls_vector_mode) 0)
where full_vector_mode is a VLA mode and small_vls_vector_mode is a VLS
mode. This won't be a valid subreg so the patch adds a VLS_P
argument to get_m1_mode that returns a full VLS vector mode.
Regtested on rv64gcv_zvl512b. As I didn't have theadvector hardware
available I made the new code paths unconditional (so they are active
for regular RVV) and re-tested.
PR target/124147
gcc/ChangeLog:
* config/riscv/autovec.md: Work around fractional-LMUL modes for
TARGET_XTHEADVECTOR.
* config/riscv/riscv-protos.h (get_m1_mode): Export.
* config/riscv/riscv-v.cc (get_m1_mode): Allow to get a VLS m1
vector.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/xtheadvector/pr124147.c: New test.
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