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3 weeks agodt-bindings: iio: adc: qcom,pm8018-adc: add label property for ADC channels
Antony Kurniawan Soemardi [Sun, 10 May 2026 07:01:33 +0000 (07:01 +0000)] 
dt-bindings: iio: adc: qcom,pm8018-adc: add label property for ADC channels

Add a new optional label property for ADC channels to help users
identify each channel when reading values from the sysfs interface.

Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adc: qcom-pm8xxx-xoadc: add support for reading channel labels
Antony Kurniawan Soemardi [Sun, 10 May 2026 07:01:45 +0000 (07:01 +0000)] 
iio: adc: qcom-pm8xxx-xoadc: add support for reading channel labels

Implement the .read_label callback to allow userspace to identify ADC
channels via the "label" property in the device tree. The name field in
pm8xxx_chan_info is renamed to label to better reflect its purpose. If
no label is provided in the device tree, it defaults to the hardware
datasheet name.

The change has been tested on Sony Xperia SP (PM8921).

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adc: qcom-pm8xxx-xoadc: remove redundant error logs when reading values
Antony Kurniawan Soemardi [Sun, 10 May 2026 07:01:41 +0000 (07:01 +0000)] 
iio: adc: qcom-pm8xxx-xoadc: remove redundant error logs when reading values

Drop dev_err() logging for -EINVAL and -ETIMEDOUT cases and rely on
return values to report errors, reducing unnecessary log noise.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: accel: adxl355: replace usleep_range() with fsleep()
Stepan Ionichev [Sun, 10 May 2026 11:38:52 +0000 (16:38 +0500)] 
iio: accel: adxl355: replace usleep_range() with fsleep()

The "at least 5ms" wait after software reset has no specific upper
bound. Use fsleep() with 5 * USEC_PER_MSEC to make the unit
explicit at the call site.

No functional change.

Signed-off-by: Stepan Ionichev <sozdayvek@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adc: ad7192: replace usleep_range() with fsleep()
Stepan Ionichev [Mon, 11 May 2026 02:55:44 +0000 (07:55 +0500)] 
iio: adc: ad7192: replace usleep_range() with fsleep()

The AD7192 datasheet (Rev. A, page 34, RESET section) says:
"When a reset is initiated, the user must allow a period of
500 us before accessing any of the on-chip registers."

Use fsleep(500) instead of usleep_range(500, 1000).

Signed-off-by: Stepan Ionichev <sozdayvek@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adc: ti-ads1298: Remove unnecessary CONFIG2 write during init
Md Shofiqul Islam [Sat, 9 May 2026 15:19:59 +0000 (18:19 +0300)] 
iio: adc: ti-ads1298: Remove unnecessary CONFIG2 write during init

The driver was enabling the internal test signal (INT_TEST), double
amplitude (TEST_AMP), and fast frequency (TEST_FREQ_FAST) bits in
CONFIG2 during initialization. These bits activate an internal square
wave generator intended for device testing and calibration, not normal
ECG operation.

CONFIG2 defaults to having only the RESERVED bit set after reset, which
is the correct value for normal operation. Remove the write entirely
since it would just be writing the reset default value.

Suggested-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Md Shofiqul Islam <shofiqtest@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adc: ti-ads1298: Add parentheses around macro parameter
Md Shofiqul Islam [Sat, 9 May 2026 15:19:57 +0000 (18:19 +0300)] 
iio: adc: ti-ads1298: Add parentheses around macro parameter

ADS1298_REG_CHnSET() is missing parentheses around the parameter 'n'.
Add them to follow kernel macro coding style and prevent potential
operator precedence issues if the argument is an expression.

Signed-off-by: Md Shofiqul Islam <shofiqtest@gmail.com>
Reviewed-by: Stepan Ionichev <sozdayvek@gmail.com>
Acked-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adc: ti-ads1298: Fix incorrect timeout comment
Md Shofiqul Islam [Sun, 10 May 2026 19:34:35 +0000 (22:34 +0300)] 
iio: adc: ti-ads1298: Fix incorrect timeout comment

At the lowest supported data rate of 250Hz, one conversion period is
4ms, not 40ms. The 50ms timeout is deliberately conservative to allow
for kernel scheduling latency, which can be significant under load or
on slow machines.

Fix the comment to state the correct conversion time, use "lowest sample
rate" for clarity, and explain that the extra margin exists to absorb
scheduling latency so that no one is tempted to shrink the timeout to
match the conversion period.

Also drop the redundant ret variable assignment by using the return value
of wait_for_completion_timeout() directly in the if() condition.

Signed-off-by: Md Shofiqul Islam <shofiqtest@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: frequency: adrf6780: replace usleep_range() with fsleep()
Stepan Ionichev [Mon, 11 May 2026 05:44:41 +0000 (10:44 +0500)] 
iio: frequency: adrf6780: replace usleep_range() with fsleep()

The ADRF6780 datasheet (Rev. D, page 23, ADC section) says:
"Wait approximately 200 us for the ADC to be ready."

fsleep(200) expands to the same usleep_range(200, 250). Use the
flexible sleep helper, which picks the right primitive for the
given microsecond delay.

Replace the generic "Recommended delay for the ADC to be ready"
comment with the datasheet reference so the "why" of the wait is
visible at the call site.

No functional change.

Signed-off-by: Stepan Ionichev <sozdayvek@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Reviewed-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adc: ad7793: replace usleep_range() with fsleep()
Stepan Ionichev [Mon, 11 May 2026 05:30:43 +0000 (10:30 +0500)] 
iio: adc: ad7793: replace usleep_range() with fsleep()

The AD7792/AD7793 datasheet (Rev. B, page 25, RESET section)
says: "When a reset is initiated, the user must allow a period
of 500 us before accessing any of the on-chip registers."

Use fsleep(500) instead of usleep_range(500, 2000). The 500 us
minimum stays the same; fsleep() picks the upper slack itself
(about +25% on a default config -- narrower than the original
2000 us).

Add a code comment with the datasheet reference so the "why"
of the wait is visible at the call site.

Signed-off-by: Stepan Ionichev <sozdayvek@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: chemical: scd30: reject (response=NULL, size>0) in scd30_i2c_command()
Stepan Ionichev [Thu, 7 May 2026 15:28:00 +0000 (20:28 +0500)] 
iio: chemical: scd30: reject (response=NULL, size>0) in scd30_i2c_command()

scd30_i2c_command() takes an opaque "response" buffer plus its size.
At the start of the function the code already checks if response is
NULL (via the rsp local), but the response-decoding loop after the
i2c transfer always dereferences rsp without re-checking. With the
current callers in scd30_core.c this is harmless, since write
commands pass response=NULL together with size=0 (so the loop body
is never entered).

The (response=NULL, size>0) combination has no useful meaning: there
is nowhere to put the bytes that come back from the chip. Treat it
as an invalid argument and bail out at the top of the function with
-EINVAL, instead of silently doing the i2c transfer and dereferencing
a NULL pointer in the decode loop.

smatch flagged the inconsistency:

  drivers/iio/chemical/scd30_i2c.c:104 scd30_i2c_command() error: we
    previously assumed rsp could be null (see line 77)

No functional change for the existing callers, which only ever use
(response=NULL, size=0) for writes and (response!=NULL, size>0) for
reads.

Signed-off-by: Stepan Ionichev <sozdayvek@gmail.com>
Acked-by: Maxwell Doose <m32285159@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: chemical: scd30: make command lookup table const
Giorgi Tchankvetadze [Fri, 8 May 2026 13:39:17 +0000 (17:39 +0400)] 
iio: chemical: scd30: make command lookup table const

scd30_i2c_cmd_lookup_tbl contains fixed opcodes and is
only read by scd30_i2c_command(). Make it const to document that it's immutable
and allow it to be placed in read-only memory.

Signed-off-by: Giorgi Tchankvetadze <giorgitchankvetadze1997@gmail.com>
Reviewed-by: Stepan Ionichev <sozdayvek@gmail.com>
Acked-by: Maxwell Doose <m32285159@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: yamaha-yas530: replace usleep_range() with fsleep()
Andy Shevchenko [Fri, 8 May 2026 06:08:35 +0000 (08:08 +0200)] 
iio: magnetometer: yamaha-yas530: replace usleep_range() with fsleep()

Replace usleep_range() with fsleep() to allow the kernel
to select the most appropriate delay mechanism based on duration.
Using USEC_PER_MSEC makes the unit conversion explicit.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: yamaha-yas530: Use devm_mutex_init() for mutex initialization
Andy Shevchenko [Fri, 8 May 2026 06:08:34 +0000 (08:08 +0200)] 
iio: magnetometer: yamaha-yas530: Use devm_mutex_init() for mutex initialization

Use devm_mutex_init() since it brings some benefits when
CONFIG_DEBUG_MUTEXES is enabled.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: yamaha-yas530: Get rid of i2c_client_get_device_id()
Andy Shevchenko [Fri, 8 May 2026 06:08:33 +0000 (08:08 +0200)] 
iio: magnetometer: yamaha-yas530: Get rid of i2c_client_get_device_id()

Instead of relying on the name from ID table, which might be ambiguous
in some cases, use explicit product label in the driver data. With that
being done, get rid of i2c_client_get_device_id() call.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoMAINTAINERS: Add myself as SCD30 maintainer
Maxwell Doose [Thu, 7 May 2026 17:24:04 +0000 (12:24 -0500)] 
MAINTAINERS: Add myself as SCD30 maintainer

The current maintainer's email is no longer valid and the driver is
being orphaned. Replace his entry with mine, as I am volunteering to
take over.

Link: https://lore.kernel.org/linux-iio/20260507170950.37a46820@jic23-huawei/T/#t
Signed-off-by: Maxwell Doose <m32285159@gmail.com>
Reviewed-by: Stepan Ionichev <sozdayvek@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adc: ingenic-adc: use guard()() and scoped_guard() to handle synchronisation
Felipe Ribeiro de Souza [Wed, 6 May 2026 02:24:30 +0000 (23:24 -0300)] 
iio: adc: ingenic-adc: use guard()() and scoped_guard() to handle synchronisation

Replace mutex_lock() and mutex_unlock() calls with guard()() in
functions ingenic_adc_set_adcmd(), ingenic_adc_set_config(),
ingenic_adc_enable(), ingenic_adc_capture(), and with scoped_guard()
in function ingenic_adc_read_chan_info_raw().

This removes the need to call the unlock function, as the lock is
automatically released when the function return or the scope exits
for any other case.

Signed-off-by: Felipe Ribeiro de Souza <felipers@ime.usp.br>
Co-developed-by: Lucas Ivars Cadima Ciziks <lucas@ciziks.com>
Signed-off-by: Lucas Ivars Cadima Ciziks <lucas@ciziks.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adc: ingenic-adc: refactor ingenic_adc_read_chan_info_raw()
Felipe Ribeiro de Souza [Wed, 6 May 2026 02:24:29 +0000 (23:24 -0300)] 
iio: adc: ingenic-adc: refactor ingenic_adc_read_chan_info_raw()

Extract the sample logic from ingenic_adc_read_chan_info_raw() into
a new helper function __ingenic_adc_read_chan() to improve code
readability and modularity.

The helper handles the mutex-protected section for sampling channels,
while the main function manages mutex and clock enabling/disabling.

Signed-off-by: Felipe Ribeiro de Souza <felipers@ime.usp.br>
Co-developed-by: Lucas Ivars Cadima Ciziks <lucas@ciziks.com>
Signed-off-by: Lucas Ivars Cadima Ciziks <lucas@ciziks.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adc: ingenic-adc: rename ingenic_adc_enable_unlocked() function
Felipe Ribeiro de Souza [Wed, 6 May 2026 02:24:28 +0000 (23:24 -0300)] 
iio: adc: ingenic-adc: rename ingenic_adc_enable_unlocked() function

Rename ingenic_adc_enable_unlocked() to __ingenic_adc_enable() to
better reflect that this helper must be called with the lock held.

Signed-off-by: Felipe Ribeiro de Souza <felipers@ime.usp.br>
Co-developed-by: Lucas Ivars Cadima Ciziks <lucas@ciziks.com>
Signed-off-by: Lucas Ivars Cadima Ciziks <lucas@ciziks.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: ak8975: unify return code variable name
Andy Shevchenko [Tue, 5 May 2026 11:46:09 +0000 (13:46 +0200)] 
iio: magnetometer: ak8975: unify return code variable name

In one case 'rc' is used in the other 'err', the most use 'ret'.
Make the latter use the former, id est 'ret'.

While at it, drop unneeded ' < 0' checks.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: ak8975: reduce usage of magic lengths of the buffer
Andy Shevchenko [Tue, 5 May 2026 11:46:08 +0000 (13:46 +0200)] 
iio: magnetometer: ak8975: reduce usage of magic lengths of the buffer

Reduce usage of magic lengths of the supplied buffer by replacing them
with the corresponding sizeof():s.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: ak8975: remove duplicate error message
Andy Shevchenko [Tue, 5 May 2026 11:46:07 +0000 (13:46 +0200)] 
iio: magnetometer: ak8975: remove duplicate error message

The devm_request_irq() already prints an error message.
Remove the duplicate.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: ak8975: drop duplicate NULL check
Andy Shevchenko [Tue, 5 May 2026 11:46:06 +0000 (13:46 +0200)] 
iio: magnetometer: ak8975: drop duplicate NULL check

The gpiod_set_consumer_name() is NULL-aware, no need to perform the same
check in the caller.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: ak8975: avoid using temporary variable
Andy Shevchenko [Tue, 5 May 2026 11:46:05 +0000 (13:46 +0200)] 
iio: magnetometer: ak8975: avoid using temporary variable

Avoid using temporary variable in ak8975_read_axis(). With that being done,
the clamp_t() call becomes idiomatic in the driver and can be factored out
to a helper later on (and if needed).

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: ak8975: pass conversion timeouts as arguments
Joshua Crofts [Tue, 5 May 2026 11:46:02 +0000 (13:46 +0200)] 
iio: magnetometer: ak8975: pass conversion timeouts as arguments

Refactor wait_conversion_complete*_() helper function to accept poll
and timeout values directly as parameters. This improves the
readability of the code and does not rely on hardcoded macros.

Besides that, fix the home grown and obviously wrong in some cases the
jiffy-based timeout.

Co-developed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: ak8975: fix wrong errno on return
Joshua Crofts [Tue, 5 May 2026 11:46:01 +0000 (13:46 +0200)] 
iio: magnetometer: ak8975: fix wrong errno on return

The driver currently returns -EINVAL on polling timeout instead of
-ETIMEDOUT.

Replace return code for -ETIMEDOUT and remove unnecessary error
message as -ETIMEDOUT is a standard POSIX error. Also replace
instances of -EINVAL in comments.

Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: ak8975: change 'u8*' to 'u8 *' in cast
Joshua Crofts [Tue, 5 May 2026 11:46:00 +0000 (13:46 +0200)] 
iio: magnetometer: ak8975: change 'u8*' to 'u8 *' in cast

Change 'u8*' cast to 'u8 *' as the former triggers a checkpatch error.
Also fix the indentation of parameters in
i2c_smbus_read_i2c_block_data_or_emulated() function.

No functional change.

Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Reviewed-by: Maxwell Doose <m32285159@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: ak8975: replace usleep_range() with fsleep()
Joshua Crofts [Tue, 5 May 2026 11:45:59 +0000 (13:45 +0200)] 
iio: magnetometer: ak8975: replace usleep_range() with fsleep()

Replace usleep_range() calls with fsleep(), passing the minimum value
required by the sensor for hardware delays.

fsleep() automatically selects the optimal sleep mechanism, simplifying
driver code and time management.

Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: ak8975: update headers per IWYU principle
Joshua Crofts [Tue, 5 May 2026 11:45:58 +0000 (13:45 +0200)] 
iio: magnetometer: ak8975: update headers per IWYU principle

Remove kernel.h proxy header and unused headers (slab.h, iio/sysfs.h,
iio/trigger.h). Add missing headers to ensure atomicity (array_size.h,
dev_printk.h, asm/byteorder.h, irqreturn.h, minmax.h, property.h,
types.h, wait.h).

Audited using the include-what-you-use tool.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Reviewed-by: Maxwell Doose <m32285159@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: ak8975: sort headers alphabetically
Joshua Crofts [Tue, 5 May 2026 11:45:57 +0000 (13:45 +0200)] 
iio: magnetometer: ak8975: sort headers alphabetically

Sort include headers alphabetically to improve coding style and
readability.

No functional change.

Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Reviewed-by: Maxwell Doose <m32285159@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: ak8975: Add missed pm_runtime_put_autosuspend() call
Andy Shevchenko [Wed, 6 May 2026 08:27:55 +0000 (10:27 +0200)] 
iio: magnetometer: ak8975: Add missed pm_runtime_put_autosuspend() call

On the failure in the ak8975_read_axis() the PM runtime gets unbalanced.
Balance it by calling pm_runtime_put_autosuspend() on error path as well.

Fixes: cde4cb5dd422 ("iio: magn: ak8975: deploy runtime and system PM")
Reported-by: Sashiko <sashiko-bot@kernel.org>
Closes: https://sashiko.dev/#/patchset/20260505-magnetometer-fixes-v5-0-831b9b5550fc%40gmail.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Joshua Crofts <joshua.crofts1@gmail.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: ABI: Add DAC 500ohm, 3.85kohm, and 16kohm powerdown modes
Kim Seer Paller [Tue, 5 May 2026 04:34:31 +0000 (12:34 +0800)] 
iio: ABI: Add DAC 500ohm, 3.85kohm, and 16kohm powerdown modes

Add powerdown mode entries for DACs with 500 Ohm, 3.85 kOhm, and
16 kOhm resistor to ground output impedance states. These are used
by the AD3531/AD3531R 4-channel DAC.

Signed-off-by: Kim Seer Paller <kimseer.paller@analog.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adxl313: fix typos in documentation
Wang Zihan [Tue, 5 May 2026 09:22:43 +0000 (17:22 +0800)] 
iio: adxl313: fix typos in documentation

Add missing space in "ADXL313is" and improve grammar for
"a single types of channels" to "multiple channels of a single type"
as suggested by Jonathan Cameron.

Wrap long line as suggested by Andy Shevchenko.

Signed-off-by: Wang Zihan <jiyu03@qq.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: light: iqs621-als: prefer early error handling over if (!ret)
Pedro Barletta Gennari [Wed, 29 Apr 2026 01:29:55 +0000 (22:29 -0300)] 
iio: light: iqs621-als: prefer early error handling over if (!ret)

Handle errors as early as possible by replacing 'if (!ret)' with the
more common form 'if (ret)'. This makes the code easier to read.

Signed-off-by: Pedro Barletta Gennari <pedro.pbg@usp.br>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: light: iqs621-als: use lock guards
Pedro Barletta Gennari [Wed, 29 Apr 2026 01:29:54 +0000 (22:29 -0300)] 
iio: light: iqs621-als: use lock guards

Use guard(mutex)() for handling mutex lock instead of
manually locking and unlocking the mutex. This prevents forgotten
locks due to early exits and removes the need of gotos.

Signed-off-by: Pedro Barletta Gennari <pedro.pbg@usp.br>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adc: mcp3422: write bit operations using bitfield.h APIs
Marcelo Machado Lage [Wed, 29 Apr 2026 22:44:01 +0000 (19:44 -0300)] 
iio: adc: mcp3422: write bit operations using bitfield.h APIs

Replace manual bit manipulations with FIELD_GET(), FIELD_PREP() and
FIELD_MODIFY() calls. The resulting code is more readable and
maintainable, and 6 macros previously defined in the header are not
needed anymore.

Signed-off-by: Marcelo Machado Lage <marcelomlage@usp.br>
Co-developed-by: Vinicius Lira <vinilira@usp.br>
Signed-off-by: Vinicius Lira <vinilira@usp.br>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adc: mcp3422: rewrite mask macros with help of bits.h APIs
Marcelo Machado Lage [Wed, 29 Apr 2026 22:44:00 +0000 (19:44 -0300)] 
iio: adc: mcp3422: rewrite mask macros with help of bits.h APIs

Rewrite MCP3422_CHANNEL_MASK, MCP3422_SRATE_MASK, MCP3422_PGA_MASK
and MCP3422_CONT_SAMPLING using GENMASK() and BIT() macros from
bits.h.

The other macros MCP3422_SRATE_{240, 60, 15, 3} were not changed
because they are also used as array indices.

Signed-off-by: Marcelo Machado Lage <marcelomlage@usp.br>
Co-developed-by: Vinicius Lira <vinilira@usp.br>
Signed-off-by: Vinicius Lira <vinilira@usp.br>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: magnetometer: rm3100: Modernize locking and refactor control flow
Maxwell Doose [Thu, 30 Apr 2026 12:41:47 +0000 (07:41 -0500)] 
iio: magnetometer: rm3100: Modernize locking and refactor control flow

Replace mutex_lock() and mutex_unlock() calls in rm3100-core.c with
the more modern guard(mutex)() family. This will help modernize the
driver and bring it up-to-date with modern available macros/functions.

While replacing mutex_lock() and mutex_unlock(), the critical sections
of rm3100_read_mag() and rm3100_get_samp_freq() have been extended to
include negligible operations for cleaner logic.

Add new helper-wrapper function rm3100_regmap_bulk_read_locked() to
help keep rm3100_trigger_handler() switch-cases clean while maintaining
mutex locking and avoiding re-entrancy risks from potential callbacks.

While at it, remove redundant gotos where applicable, and use direct
returns instead. In addition, remove regmap variable in
rm3100_trigger_handler() as its references have been replaced with
variable data.

Suggested-by: Jonathan Cameron <jic23@kernel.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Maxwell Doose <m32285159@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: light: si1133: use guard(mutex)() macro
Joshua Crofts [Tue, 5 May 2026 07:31:33 +0000 (09:31 +0200)] 
iio: light: si1133: use guard(mutex)() macro

Remove mutex_lock()/mutex_unlock() and goto instances and add
guard(mutex)() macro to modernize driver and improve mutex handling.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: light: si1133: add local variable for timeout
Joshua Crofts [Tue, 5 May 2026 07:31:32 +0000 (09:31 +0200)] 
iio: light: si1133: add local variable for timeout

Add local variable for timeout to improve readability.

No functional change.

Suggested-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: light: si1133: group generic <linux/*> headers
Joshua Crofts [Tue, 5 May 2026 07:31:31 +0000 (09:31 +0200)] 
iio: light: si1133: group generic <linux/*> headers

Group generic <linux/*> include headers to improve code style.

No functional change.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: light: si1133: add missing include headers
Joshua Crofts [Tue, 5 May 2026 07:31:30 +0000 (09:31 +0200)] 
iio: light: si1133: add missing include headers

Add missing include headers to prevent compilation relying on transient
dependencies (array_size.h, bitops.h, completion.h, dev_printk.h, err.h,
jiffies.h, math.h, mod_devicetable.h, mutex.h, types.h).

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: light: si1133: prefer complex macros enclosed in parenthesis
Joshua Crofts [Tue, 5 May 2026 07:31:29 +0000 (09:31 +0200)] 
iio: light: si1133: prefer complex macros enclosed in parenthesis

Enclose complex macros in parenthesis per checkpatch.pl error to
improve code style.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: light: si1133: remove unused macros
Joshua Crofts [Tue, 5 May 2026 07:31:28 +0000 (09:31 +0200)] 
iio: light: si1133: remove unused macros

Remove unused macros unrelated to hardware definition.

No functional change.

Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: light: si1133: prevent race condition on timeout
Joshua Crofts [Tue, 5 May 2026 07:31:27 +0000 (09:31 +0200)] 
iio: light: si1133: prevent race condition on timeout

Sashiko reported a bug where the si1133_command exits on timeout
without halting the sensor or masking the interrupt. If the sensor
completes the command later, any subsequent command to the sensor
will cause the IRQ handler to complete immediately, returning stale
data to the driver all while the command hasn't finished yet, shifting
all potential reads in the future.

Fix this by masking the IRQ if wait_for_completion_timeout() fails.
When initiating a new command, do a dummy read of the IRQ_STATUS
register and turn the IRQ back on.

Fixes: e01e7eaf37d8 ("iio: light: introduce si1133")
Reported-by: sashiko-bot <sashiko-bot@kernel.org>
Closes: https://sashiko.dev/#/message/20260428-si1133-checkup-v2-5-70ad14bfefe2%40gmail.com
Assisted-by: gemini:gemini-3.1-pro-preview
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: light: si1133: reset counter to prevent race condition
Joshua Crofts [Tue, 5 May 2026 07:31:26 +0000 (09:31 +0200)] 
iio: light: si1133: reset counter to prevent race condition

Sashiko reported a potential race condition happening when the driver
returns an errno after a timeout in the si1133_command() function. The
premature exit causes the hardware and software counters to become out
of sync by not updating data->rsp_seq, therefore the internal hardware
counter keeps incrementing.

Fix this by adding a call to si1133_cmd_reset_counter() before returning
from timeout.

Fixes: e01e7eaf37d8 ("iio: light: introduce si1133")
Reported-by: sashiko-bot <sashiko-bot@kernel.org>
Closes: https://sashiko.dev/#/message/20260428-si1133-checkup-v2-5-70ad14bfefe2%40gmail.com
Assisted-by: gemini:gemini-3.1-pro-preview
Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: gyro: adxrs290: Use guard(mutex) in lieu of manual lock+unlock
Guilherme Dias [Mon, 4 May 2026 19:04:25 +0000 (16:04 -0300)] 
iio: gyro: adxrs290: Use guard(mutex) in lieu of manual lock+unlock

Use guard(mutex)() to automatically release the lock on scope exit,
simplifying the error handling path and removing the need for
explicit unlock and goto-based cleanup.

Signed-off-by: Guilherme Dias <guilhermeabreu200105@usp.br>
Co-developed-by: João Paulo Menezes Linaris <jplinaris@usp.br>
Signed-off-by: João Paulo Menezes Linaris <jplinaris@usp.br>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Reviewed-by: Maxwell Doose <m32285159@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: Move MODULE_DEVICE_TABLE next to the table itself
Krzysztof Kozlowski [Tue, 5 May 2026 10:29:04 +0000 (12:29 +0200)] 
iio: Move MODULE_DEVICE_TABLE next to the table itself

By convention MODULE_DEVICE_TABLE() immediately follows the ID table it
exports, because this is easier to read and verify.  It also makes more
sense since #ifdef for ACPI or OF could hide both of them.

Most of the drivers already have this correctly placed, so adjust
the missing ones.  No functional impact.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: light: stk3310: Use sizeof() for regmap_bulk_read/write count parameter
Miao Li [Mon, 4 May 2026 03:04:08 +0000 (11:04 +0800)] 
iio: light: stk3310: Use sizeof() for regmap_bulk_read/write count parameter

Convert the hardcoded count parameter to sizeof(buf) for all
regmap_bulk_write() and regmap_bulk_read() calls in this driver
to improve code maintainability. For details, see [1].

Link: https://lore.kernel.org/all/20260428192213.7c5c80e5@jic23-huawei/
Signed-off-by: Miao Li <limiao@kylinos.cn>
Reviewed-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: light: stk3310: Replace uint32_t with u32 and reorder members to eliminate padding
Miao Li [Mon, 4 May 2026 03:04:07 +0000 (11:04 +0800)] 
iio: light: stk3310: Replace uint32_t with u32 and reorder members to eliminate padding

Replace the uint32_t type members in struct stk3310_data with u32
to adhere to the unified kernel coding style, and reorder the member
variables to eliminate memory padding holes.

Suggested-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Miao Li <limiao@kylinos.cn>
Reviewed-by: Joshua Crofts <joshua.crofts1@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: light: stk3310: Deal with the ps interrupt issue in PM
Miao Li [Mon, 4 May 2026 03:04:06 +0000 (11:04 +0800)] 
iio: light: stk3310: Deal with the ps interrupt issue in PM

On the Inspur HS326 laptop(which integrated with HiSilicon M900
processor), if the STK3311-X chip's PS interrupt is configured
in "Recommended interrupt mode", the interrupt cannot be triggered
normally after waking from suspend or hibernation.

In this case, neither disabling and re-enabling the interrupt nor
resetting the PS threshold register can restore the interrupt to
normal operation.

If the interrupt is disabled in suspend() then reset the PS threshold
register and enable the interrupt in resume(). This resolves the issue.

Signed-off-by: Miao Li <limiao@kylinos.cn>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agostaging: iio: ad9834: fix chip name typo in comments
Angus Gardner [Mon, 4 May 2026 09:20:59 +0000 (19:20 +1000)] 
staging: iio: ad9834: fix chip name typo in comments

Two comments incorrectly refer to 'AD9843' instead of 'AD9834'.
Fix the copy-paste typo.

Signed-off-by: Angus Gardner <angusg778@gmail.com>
Reviewed-by: Maxwell Doose <m32285159@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agostaging: iio: ad9834: use dev_err_probe() in probe function
Angus Gardner [Mon, 4 May 2026 09:20:58 +0000 (19:20 +1000)] 
staging: iio: ad9834: use dev_err_probe() in probe function

Replace open-coded dev_err() + return sequences with dev_err_probe(),
which is the preferred pattern for probe error paths as it handles
deferred probing correctly and reduces boilerplate.

Convert all three remaining instances in ad9834_probe():
 - master clock enable failure
 - device init SPI sync failure

The avdd regulator path already used dev_err_probe().

Signed-off-by: Angus Gardner <angusg778@gmail.com>
Reviewed-by: Maxwell Doose <m32285159@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agostaging: iio: ad9834: simplify -ENOMEM return in probe
Angus Gardner [Mon, 4 May 2026 09:20:57 +0000 (19:20 +1000)] 
staging: iio: ad9834: simplify -ENOMEM return in probe

devm_iio_device_alloc() failure returns -ENOMEM via a local variable
unnecessarily. Return -ENOMEM directly instead.

Signed-off-by: Angus Gardner <angusg778@gmail.com>
Reviewed-by: Maxwell Doose <m32285159@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adc: rcar: Fix up Marek Vasut MAINTAINERS entry
Marek Vasut [Wed, 29 Apr 2026 19:27:23 +0000 (21:27 +0200)] 
iio: adc: rcar: Fix up Marek Vasut MAINTAINERS entry

Use up to date address. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: light: stk3310: Update includes to match IWYU
Rafael G. Dias [Tue, 28 Apr 2026 16:13:39 +0000 (13:13 -0300)] 
iio: light: stk3310: Update includes to match IWYU

Clean up the included headers in stk3310.c according to the
Include-What-You-Use (IWYU) tool. Remove the generic <linux/kernel.h>
header and add explicit dependencies to improve compilation accuracy.

Co-developed-by: Felipe Khoury Dayoub <felipedayoub@usp.br>
Signed-off-by: Felipe Khoury Dayoub <felipedayoub@usp.br>
Signed-off-by: Rafael G. Dias <rafael.guimaraes.dias@usp.br>
Reviewed-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: light: stk3310: Sort headers alphabetically
Rafael G. Dias [Tue, 28 Apr 2026 16:13:38 +0000 (13:13 -0300)] 
iio: light: stk3310: Sort headers alphabetically

Sort the included headers alphabetically and group the <linux/iio/*>
headers separately from the generic <linux/*> headers.

Co-developed-by: Felipe Khoury Dayoub <felipedayoub@usp.br>
Signed-off-by: Felipe Khoury Dayoub <felipedayoub@usp.br>
Signed-off-by: Rafael G. Dias <rafael.guimaraes.dias@usp.br>
Reviewed-by: Joshua Crofts <joshua.crofts1@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: frequency: ad9832: simplify bitwise math
Joshua Crofts [Sun, 19 Apr 2026 18:36:23 +0000 (20:36 +0200)] 
iio: frequency: ad9832: simplify bitwise math

Refactor the ad9832_calc_freqreg by removing the redundant u64 casts
and 1L bitwise left shift and replacing the multiplication by a bit
shift, as multiplying integers by a power of two is identical to a
bitwise left shift.

Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com>
Reviewed-by: Nuno SĆ” <nuno.sa@analog.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: buffer: Move from int64_t to s64 for timestamp
Andy Shevchenko [Mon, 27 Apr 2026 18:51:47 +0000 (20:51 +0200)] 
iio: buffer: Move from int64_t to s64 for timestamp

iio_push_to_buffers_with_ts_unaligned() uses int64_t for timestamp.
Move it from int64_t to s64 to make consistent with:
- iio_push_to_buffers_with_ts()
- all current users that supply s64 anyway

This will reduce potential of wrong type being chosen when using
this API.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: temperature: maxim_thermocouple: Fix indentation in of_match table
Rahman Mahmutović [Mon, 27 Apr 2026 20:20:16 +0000 (22:20 +0200)] 
iio: temperature: maxim_thermocouple: Fix indentation in of_match table

Replace leading spaces with tabs in the of_device_id table
entries to comply with kernel coding style.

Signed-off-by: Rahman Mahmutović <mahmutovicrahman5@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: dac: ad5706r: Add support for AD5706R DAC
Alexis Czezar Torreno [Mon, 27 Apr 2026 06:23:17 +0000 (14:23 +0800)] 
iio: dac: ad5706r: Add support for AD5706R DAC

Add support for the Analog Devices AD5706R, a 4-channel 16-bit
current output digital-to-analog converter with SPI interface.

Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com>
Signed-off-by: Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agodt-bindings: iio: dac: Add ADI AD5706R
Alexis Czezar Torreno [Mon, 27 Apr 2026 06:23:16 +0000 (14:23 +0800)] 
dt-bindings: iio: dac: Add ADI AD5706R

Add device tree binding documentation for the Analog Devices
AD5706R 4-channel 16-bit current output digital-to-analog converter.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adc: ad7625: fix type mismatch in clamp() macro
Giorgi Tchankvetadze [Sat, 25 Apr 2026 07:16:16 +0000 (11:16 +0400)] 
iio: adc: ad7625: fix type mismatch in clamp() macro

clamp() expects compatible operand types. The period calculation uses
nanosecond constants, while the local target variable was narrower than
the upper bound expression.

Make target unsigned long and use unsigned long bounds, including
NSEC_PER_USEC for the upper limit. This keeps the operands naturally
aligned without adding casts.

Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Giorgi Tchankvetadze <giorgitchankvetadze1997@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: ssp_sensors: cleanup codestyle warning
Sanjay Chitroda [Sun, 26 Apr 2026 09:17:02 +0000 (14:47 +0530)] 
iio: ssp_sensors: cleanup codestyle warning

Reported by checkpatch:
FILE: drivers/iio/common/ssp_sensors/ssp_dev.c

WARNING: Prefer __packed over __attribute__((__packed__))
+} __attribute__((__packed__));

Signed-off-by: Sanjay Chitroda <sanjayembeddedse@gmail.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: adc: ad4080: add support for AD4880 dual-channel ADC
Antoniu Miclaus [Mon, 20 Apr 2026 10:12:25 +0000 (13:12 +0300)] 
iio: adc: ad4080: add support for AD4880 dual-channel ADC

Add support for the AD4880, a dual-channel 20-bit 40MSPS SAR ADC with
integrated fully differential amplifiers (FDA).

The AD4880 has two independent ADC channels, each with its own SPI
configuration interface. The driver uses spi_new_ancillary_device() to
create an additional SPI device for the second channel, allowing both
channels to share the same SPI bus with different chip selects.

Reviewed-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Nuno SĆ” <nuno.sa@analog.com>
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agodt-bindings: iio: adc: ad4080: add AD4880 support
Antoniu Miclaus [Mon, 20 Apr 2026 10:12:24 +0000 (13:12 +0300)] 
dt-bindings: iio: adc: ad4080: add AD4880 support

Add support for the AD4880, a dual-channel 20-bit 40MSPS SAR ADC
with integrated fully differential amplifiers (FDA).

The AD4880 has two independent ADC channels, each with its own SPI
configuration interface. This requires:
- Two entries in reg property for primary and secondary channel
  chip selects
- Two io-backends entries for the two data channels

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoiio: backend: add devm_iio_backend_get_by_index()
Antoniu Miclaus [Mon, 20 Apr 2026 10:12:23 +0000 (13:12 +0300)] 
iio: backend: add devm_iio_backend_get_by_index()

Add a new function to get an IIO backend by its index in the
io-backends device tree property. This is useful for multi-channel
devices that have multiple backends, where looking up by index is
more straightforward than using named backends.

Extract __devm_iio_backend_fwnode_get_by_index() from the existing
__devm_iio_backend_fwnode_get(), taking the index directly as a
parameter. The new public API devm_iio_backend_get_by_index() uses
the index to find the backend reference in the io-backends property,
avoiding the need for io-backend-names.

Reviewed-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Nuno SĆ” <nuno.sa@analog.com>
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agodt-bindings: iio: gyroscope: add mount-matrix for bmg160
Vishwas Rajashekar [Fri, 17 Apr 2026 18:41:09 +0000 (00:11 +0530)] 
dt-bindings: iio: gyroscope: add mount-matrix for bmg160

The mount-matrix property supplies a 3x3 matrix that is used
to transform the values from the gyroscope to get vector
values that are relative to the way the sensor has been mounted
on the device. When the property is not specified, the identity
matrix is used.

This change adds mount-matrix as an optional property to the
dt-bindings for the bmg160 gyroscope.

Signed-off-by: Vishwas Rajashekar <vishwas.dev@vrajashkr.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
3 weeks agoarm64: dts: renesas: r9a08g046l48-smarc: Enable audio
Biju Das [Thu, 28 May 2026 07:45:45 +0000 (08:45 +0100)] 
arm64: dts: renesas: r9a08g046l48-smarc: Enable audio

Enable audio on the RZ/G3L SMARC EVK by linking SSI0 with the DA7212
audio CODEC.  The SSI0 signals are multiplexed with SD2 and are selected
by switch SW_SD2_EN#.  Add regulator nodes regulator-{1p8v,3p3v} to the
SoM DTSI for reuse by eMMC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260528074615.91110-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: rzg3l-smarc-som: Enable Versa clock generator
Biju Das [Thu, 28 May 2026 07:45:44 +0000 (08:45 +0100)] 
arm64: dts: renesas: rzg3l-smarc-som: Enable Versa clock generator

The RZ/G3L SMARC SoM has a Versa 5P35023B clock generator to generate
the following clocks:
  - ref: Not connected,
  - se1: AUDIO_MCK (11.2896 or 12.2880 MHz),
  - se2: RZ_AUDIO_CLK_B (11.2896 MHz),
  - se3: RZ_AUDIO_CLK_C (12.2880 MHz),
  - diff{1,1B}: ET{0,1}_PHY_CLK (25 MHz),
  - diff2{2,2B}: Not connected.

Enable the Vversa 5P35023B clock generator on the RZ/G3L SoM DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260528074615.91110-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a08g046l48-smarc: Enable I2C{2,3} devices
Biju Das [Thu, 28 May 2026 07:02:35 +0000 (08:02 +0100)] 
arm64: dts: renesas: r9a08g046l48-smarc: Enable I2C{2,3} devices

Enable I2C{2,3} on the RZ/G3L SMARC EVK board.  I2C3 is enabled by
setting SW SYS.2 to the OFF position.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20260528070239.33352-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a08g046l48-smarc: Add gpio keys
Biju Das [Thu, 28 May 2026 07:02:34 +0000 (08:02 +0100)] 
arm64: dts: renesas: r9a08g046l48-smarc: Add gpio keys

RZ/G3L SMARC EVK  has 3 user buttons called USER_SW1, USER_SW2 and
USER_SW3.  Instantiate the gpio-keys driver for these buttons by
removing place holders and replacing proper pins for the buttons.

USER_SW{1,2,3} are configured as wakeup-sources, so they can wake up the
system during s2idle.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260528070239.33352-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: rzt2h-n2h-evk: Enable xSPI nodes
Lad Prabhakar [Wed, 27 May 2026 20:24:30 +0000 (21:24 +0100)] 
arm64: dts: renesas: rzt2h-n2h-evk: Enable xSPI nodes

Enable the xSPI0 and xSPI1 controllers on the RZ/T2H N2H EVK board.

Configure the xSPI0 controller interface to 1-bit (x1) mode, even though
the connected MX25LW51245 octal flash device supports octal mode.  Add a
corresponding inline hardware comment detailing this restriction;
operating in octal mode causes the BootROM to fail loading the
first-stage bootloader following a Watchdog Timer (WDT) reset.

Configure the xSPI1 controller interface connected to the AT25SF128A
flash device for 4-bit (x4) mode to utilize all available data lines.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260527202430.606341-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a09g087: Add xSPI nodes
Lad Prabhakar [Tue, 26 May 2026 20:40:44 +0000 (21:40 +0100)] 
arm64: dts: renesas: r9a09g087: Add xSPI nodes

Add device tree nodes for the two xSPI (Expanded SPI) controllers
integrated into the RZ/N2H (R9A09G087) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260526204045.3481604-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a09g077: Add xSPI nodes
Lad Prabhakar [Tue, 26 May 2026 20:40:43 +0000 (21:40 +0100)] 
arm64: dts: renesas: r9a09g077: Add xSPI nodes

Add device tree nodes for the two xSPI (Expanded SPI) controllers
integrated into the RZ/T2H (R9A09G077) SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260526204045.3481604-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: rzg3e-smarc-som: Sort GMAC pinmux entries
Biju Das [Sun, 24 May 2026 09:20:11 +0000 (10:20 +0100)] 
arm64: dts: renesas: rzg3e-smarc-som: Sort GMAC pinmux entries

Sort the pinmux entries for both GMAC ctrl nodes in port order (A/B/C and
D/E/F respectively) and remove the extra blank line before the second
pinmux assignment.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260524092016.46346-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r8a779md: Add support for R-Car M3Le R8A779MD Geist
Nguyen Tran [Fri, 22 May 2026 17:19:57 +0000 (19:19 +0200)] 
arm64: dts: renesas: r8a779md: Add support for R-Car M3Le R8A779MD Geist

Add support for the Geist board based on the Renesas R-Car R8A779MD (M3Le)
SoC, a register-compatible variant of the R8A77965 (M3-N) with reduced set
of peripherals.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Nguyen Tran <nguyen.tran.pz@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20260522172000.15096-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a07g044: Add DMA properties to serial nodes
Claudiu Beznea [Wed, 20 May 2026 13:23:15 +0000 (16:23 +0300)] 
arm64: dts: renesas: r9a07g044: Add DMA properties to serial nodes

Add DMA properties to the serial nodes on the RZ/G2L SoC.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260520132315.944117-1-claudiu.beznea@kernel.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a07g054: Add max-frequency to SDHI nodes
Biju Das [Wed, 20 May 2026 11:51:41 +0000 (12:51 +0100)] 
arm64: dts: renesas: r9a07g054: Add max-frequency to SDHI nodes

Add the max-frequency property set to 133333333 Hz (133.33 MHz) to both
SDHI0 and SDHI1 MMC controller nodes in the RZ/V2L (r9a07g054) device
tree, increasing performance by ca. 33%.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260520115144.60067-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a07g044: Add max-frequency to SDHI nodes
Biju Das [Wed, 20 May 2026 11:51:40 +0000 (12:51 +0100)] 
arm64: dts: renesas: r9a07g044: Add max-frequency to SDHI nodes

Add the max-frequency property set to 133333333 Hz (133.33 MHz) to both
SDHI0 and SDHI1 MMC controller nodes in the RZ/{G2L,G2LC} (r9a07g044)
device tree, increasing performance by ca. 33%.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260520115144.60067-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a07g043: Add max-frequency to SDHI nodes
Biju Das [Wed, 20 May 2026 11:51:39 +0000 (12:51 +0100)] 
arm64: dts: renesas: r9a07g043: Add max-frequency to SDHI nodes

Add the max-frequency property set to 133333333 Hz (133.33 MHz) to both
SDHI0 and SDHI1 MMC controller nodes in the RZ/{G2UL,Five} (r9a07g043)
device tree, increasing performance by ca. 33%.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260520115144.60067-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a08g046: Add rsci{0..3} device nodes
Biju Das [Tue, 19 May 2026 10:00:17 +0000 (11:00 +0100)] 
arm64: dts: renesas: r9a08g046: Add rsci{0..3} device nodes

Add rsci{0..3} device nodes to the RZ/G3L ("R9A08G046") SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260519100022.116318-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: ironhide: Enable to use SCMI
Kuninori Morimoto [Tue, 19 May 2026 07:47:04 +0000 (09:47 +0200)] 
arm64: dts: renesas: ironhide: Enable to use SCMI

Enable SCMI via MFIS-SCP and S-TCM transport area.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260519074702.3308-6-wsa+renesas@sang-engineering.com
[geert: Drop scmi_clk node]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoMerge tag 'renesas-r8a78000-dt-binding-defs-tag1' into renesas-dts-for-v7.2
Geert Uytterhoeven [Sun, 31 May 2026 08:52:05 +0000 (10:52 +0200)] 
Merge tag 'renesas-r8a78000-dt-binding-defs-tag1' into renesas-dts-for-v7.2

Renesas R-Car X5H MFIS DT Binding Definitions

DT bindings and binding definitions for the Renesas R-Car X5H (R8A78000)
Multifunctional Interface (MFIS), shared by driver and DT source files.

3 weeks agoarm64: dts: renesas: r8a78000: Add MFIS, MFIS-SCP, and transport nodes
Kuninori Morimoto [Tue, 19 May 2026 07:47:03 +0000 (09:47 +0200)] 
arm64: dts: renesas: r8a78000: Add MFIS, MFIS-SCP, and transport nodes

Describe the MFIS and MFIS SCP instances which are used for various
tasks including inter-processor communication.  Remove the PRR node
because it is part of MFIS on R-Car X5H and should be handled using the
MFIS compatible. Also, describe the S-TCM transport area used for shared
memory mailboxing.

Signed-off-by: Vinh Nguyen <vinh.nguyen.xz@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260519074702.3308-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: ironhide: Describe all reserved memory
Marek Vasut [Sun, 17 May 2026 16:31:25 +0000 (18:31 +0200)] 
arm64: dts: renesas: ironhide: Describe all reserved memory

Fully describe all available DRAM in the DT, and describe regions which
are not accessible because they are used by firmware in reserved-memory
nodes.

Replace the first memory bank memory@60600000 with memory@40000000 and a
518 MiB long reserved-memory no-map subnode. This memory region is used
by other cores in the system.

Reserve 32 kiB of memory at 0x8c100000 for parameters shared by IPL,
SCP, TFA BL31 and TEE.

Reserve 512 kiB of memory at 0x8c200000 for TFA BL31.  The upcoming
upstream TFA 2.15 BL31 uses memory from 0x8c200000..0x8c242fff; rounding
up to 512 kiB is slight future-proofing.

Reserve 32 MiB of memory at 0x8c400000 for OPTEE-OS, which is the entire
OPTEE-OS TZ protected DRAM area.

Neither TFA BL31 nor OPTEE-OS modify the DT passed to Linux in any way
with any new reserved-memory {} nodes to reserve memory areas used by
the TFA BL31 or OPTEE-OS to prevent the next stage from using those
areas, which lets Linux use all of the available DRAM as it is described
in the DT that was passed in by U-Boot, including the areas that are
newly utilized by TFA BL31 or OPTEE-OS.

In case of high DRAM utilization, unless the memory used by TFA BL31 or
OPTEE-OS is properly reserved, Linux may use and corrupt the memory used
by TFA BL31 or OPTEE-OS, which would lead to the system becoming
unresponsive.

Fixes: ad142a4ef710 ("arm64: dts: renesas: r8a78000: Add initial Ironhide board support")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260517163212.18016-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: rzt2h-n2h-evk: Configure eMMC/SDHI pins
Fabrizio Castro [Thu, 14 May 2026 21:02:17 +0000 (22:02 +0100)] 
arm64: dts: renesas: rzt2h-n2h-evk: Configure eMMC/SDHI pins

The HW user manual for the Renesas RZ/T2H and the RZ/N2H states that for
SDR104, SDR50, and HS200 to work properly the eMMC/SDHI interface pins
have to be configured as specified below:
  - SDn_CLK pin - drive strength: Ultra High, slew rate: Fast,
  - Other SDn_* pins: drive strength: High, slew rate: Fast,
    Schmitt trigger: disabled (not applicable to SDn_RST pins).

HS DDR and DDR50 are currently not supported, and for every other bus
mode the eMMC/SDHI interface pins should be configured as specified
below:
  - SDn_CLK pin - drive strength: High, slew rate: Fast,
  - Other SDn_* pins: drive strength: Middle, slew rate: Fast,
    Schmitt trigger: disabled (not applicable to SDn_RST pins).

Adjust the pin definitions accordingly.

Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://patch.msgid.link/20260514210220.7616-1-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r8a78000: Fix GIC-720AE View 1 Redistributor description
Marek Vasut [Thu, 14 May 2026 12:53:06 +0000 (14:53 +0200)] 
arm64: dts: renesas: r8a78000: Fix GIC-720AE View 1 Redistributor description

The Renesas R-Car X5H (R8A78000) SoC contains Arm CoreLink GIC-720AE
Generic Interrupt Controller with Multi View capability. Firmware has
access to configuration View 0, Linux kernel has access to View 1.

The Arm CoreLink GIC-720AE Generic Interrupt Controller Technical
Reference Manual, currently latest r2p1 [1], chapter "5. Programmers
model for GIC-720AE", subchapter "5.4 Redistributor registers
for control and physical LPIs summary", part "5.4.3 GICR_TYPER,
Redistributor Type Register", "Table 5-50: GICR_TYPER bit descriptions"
on page 200, clarifies register "GICR_TYPER" bit 4 "Last" behavior
in Multi View setup as follows:

    Last
    Last Redistributor:

    0 ... This Redistributor is not the last Redistributor on the chip.
    1 ... This Redistributor is the last Redistributor on the chip.
  When GICD_CFGID.VIEW == 1, for views 1, 2, or 3 this bit
  always returns 1.

On this SoC, GICD_CFGID.VIEW is 1 and the Linux kernel has access to
View 1, therefore Linux kernel GICv3 driver will interpret register
"GICR_TYPER" bit 4 "Last" = 1 in the first Redistributor in continuous
Redistributor page as that first Redistributor being the one and only
Redistributor and will stop processing the continuous Redistributor
page further. This will prevent the other Redistributors from being
recognized by the system and used for other PEs.

Because the hardware indicates that the continuous Redistributor page
is not continuous for View 1, 2, or 3, describe every Redistributor
separately in the DT. This makes all Redistributors for all cores
accessible in Linux.

[1] https://documentation-service.arm.com/static/69ef3c1cd35efd294e335c43
    ArmĀ® CoreLinkā„¢ GIC-720AE Generic Interrupt Controller
    Revision: r2p1 / Issue 12 / 102666_0201_12_en

Fixes: 63500d12cf76 ("arm64: dts: renesas: Add R8A78000 SoC support")
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260514125328.20954-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r8a78000: Add PSCI node
Marek Vasut [Wed, 13 May 2026 22:50:24 +0000 (00:50 +0200)] 
arm64: dts: renesas: r8a78000: Add PSCI node

Describe SMC based PSCI access in SoC DT.  The system can interact with
TFA BL31 PSCI provider running on the Cortex-A cores via SMC calls.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260513225037.49803-1-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add alias for on-SoC RTC
Lad Prabhakar [Wed, 6 May 2026 15:58:04 +0000 (16:58 +0100)] 
arm64: dts: renesas: r9a09g056n48-rzv2n-evk: Add alias for on-SoC RTC

The RZ/V2N SoC provides an internal RTC, which is enabled in the DT.
The RZ/V2N EVK board also includes an external RTC in the RAA215300
PMIC.

Add an "rtc0" alias pointing to the on-SoC RTC node to ensure a stable
device numbering.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260506155804.3984418-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add alias for on-SoC RTC
Lad Prabhakar [Wed, 6 May 2026 15:58:03 +0000 (16:58 +0100)] 
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add alias for on-SoC RTC

The RZ/V2H SoC provides an internal RTC, which is enabled in the DT.
The RZ/V2H EVK board also includes an external RTC in the RAA215300
PMIC.

Add an "rtc0" alias pointing to the on-SoC RTC node to ensure a stable
device numbering.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260506155804.3984418-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a08g046: Add audio clock nodes
Biju Das [Tue, 5 May 2026 12:37:01 +0000 (13:37 +0100)] 
arm64: dts: renesas: r9a08g046: Add audio clock nodes

Add audio_clk1 and audio_clk2 fixed-clock nodes to the RZ/G3L (r9a08g046)
SoC DTSI. These clocks are external to the SoC and their frequencies are
board-dependent, so they are defined with clock-frequency = <0> as
placeholders that must be overridden in board-level DTS files.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260505123708.134069-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a08g046: Add SSI support
Biju Das [Tue, 5 May 2026 12:37:00 +0000 (13:37 +0100)] 
arm64: dts: renesas: r9a08g046: Add SSI support

Add SSI{0,1,2,3} nodes to RZ/G3L SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260505123708.134069-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a08g046: Add DMAC node
Biju Das [Tue, 5 May 2026 12:36:59 +0000 (13:36 +0100)] 
arm64: dts: renesas: r9a08g046: Add DMAC node

Add the DMA controller device tree node for the RZ/G3L (r9a08g046) SoC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260505123708.134069-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a08g046: Add i2c{0..3} device nodes
Biju Das [Tue, 5 May 2026 07:01:55 +0000 (08:01 +0100)] 
arm64: dts: renesas: r9a08g046: Add i2c{0..3} device nodes

Add i2c{0..3} device nodes to RZ/G3L ("R9A08G046") SoC DTSI.
As the place holders for i2c0 is removed, add the pincontrol
device nodes to make it functional on the board DTS.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260505070206.7932-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agoarm64: dts: renesas: r9a08g046: Add scif{1..5} device nodes
Biju Das [Tue, 5 May 2026 07:01:54 +0000 (08:01 +0100)] 
arm64: dts: renesas: r9a08g046: Add scif{1..5} device nodes

Add scif{1..5} device nodes to RZ/G3L ("R9A08G046") SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260505070206.7932-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
3 weeks agomedia: qcom: camss: vfe-340: Proper client handling
Loic Poulain [Tue, 14 Apr 2026 18:52:01 +0000 (20:52 +0200)] 
media: qcom: camss: vfe-340: Proper client handling

We need to properly map camss WM index to our internal WM client
instance. Today we only support RDI interfaces with the RDI_WM
macro, introduce a __wm_to_client helper to support any interface.

Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
3 weeks agomedia: qcom: camss: csid-340: Enable PIX interface routing
Loic Poulain [Tue, 14 Apr 2026 18:52:00 +0000 (20:52 +0200)] 
media: qcom: camss: csid-340: Enable PIX interface routing

Add PIX path support to the CSID-340 driver. The hardware exposes a
dedicated PIX interface in addition to the existing RDI paths, but
the driver only supported RDI stream configuration so far.

The PIX path is configured similarly to RDI but requires decode-format
to be specified.

The PIX pipeline can subsequently perform further processing,
including scaling, cropping, and statistics.

Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
3 weeks agomedia: qcom: camss: csid-340: Add port-to-interface mapping
Loic Poulain [Tue, 14 Apr 2026 18:51:59 +0000 (20:51 +0200)] 
media: qcom: camss: csid-340: Add port-to-interface mapping

The CSID-340 block uses different register offsets for the PIX and RDI
interfaces, but the driver previously indexed these registers directly
with the camss port number. This happened to work for RDI because the
port index matches the RDI register layout, but this assumption breaks
with upcoming PIX interface support

Introduce an explicit port-to-interface mapping and use the mapped iface
index when programming CSID_CFG0 and CSID_CTRL. This replaces the
standalone __csid_ctrl_rdi() helper and simplifies the RDI stream setup
path.

Also correct the CSID_CFG0/CTRL base offsets and clean up the code in
preparation for full PIX path support.

Like RDI, PIX outputs Bayer frames but can also achieve some image
processing such as scaling, cropping and generating statitics (e.g.
histogram), it also offer more flexebility in term of image alignment
and stride. All of that can then later be leveraged to improve
software or hardware frames post-processing.

Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
3 weeks agomedia: qcom: camss: csid-340: Switch to generic CSID_CFG/CTRL registers
Loic Poulain [Tue, 14 Apr 2026 18:51:58 +0000 (20:51 +0200)] 
media: qcom: camss: csid-340: Switch to generic CSID_CFG/CTRL registers

The former RDI-specific register definitions (CSID_RDI_CFG0/CTRL) are
renamed to unified CSID_CFG0/CSID_CTRL variants, as their layout is
interface agnostic. This refactoring provides the foundation for
extending csid-340 with missing PIX interface/path support.

Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>