Icenowy Zheng [Sat, 21 Mar 2026 09:20:28 +0000 (17:20 +0800)]
LoongArch: Override arch_dynirq_lower_bound to reserve LPC IRQs
Loongson 7A PCH chips all contain a LPC controller, which is used in
some devices to connect legacy ISA devices (e.g. 8259 PS/2 controller).
The LPC irqchip driver will register LPC interrupts at the fixed range
0~15, and the PCH PIC irqchip driver uses dynamic allocation. However the
LPC interrupt numbers are currently not exempted from dynamic allocation.
The current setup work by accident because the LPC interrupt controller is
the first consumer of PIC interrupt controller, and the PIC interrupt
number is allocated after LPC interrupts are registered. Such setup is
fragile and will stop to work when the LPC irqchip driver is reworked.
Override arch_dynirq_lower_bound() to reserve LPC interrupts from dynamic
allocation, to prevent interrupt number collision and allow rework of the
LPC irqchip driver.
Icenowy Zheng [Sat, 21 Mar 2026 09:20:27 +0000 (17:20 +0800)]
MIPS: loongson64: Override arch_dynirq_lower_bound to reserve LPC IRQs
On some Loongson 3A devices, a LPC bus is present and some legacy devices
(e.g. 8259) on it expect hardcoded low interrupt numbers. However currently
the expected low range interrupt numbers are not exempted from the dynamic
allocation, which leads to conflicts when registering LPC interrupts in the
fixed range.
Override arch_dynirq_lower_bound() to reserve these low range interrupt
numbers and prevent them from being dynamically allocated.
Hao-Yu Yang [Fri, 13 Mar 2026 12:47:56 +0000 (20:47 +0800)]
futex: Fix UaF between futex_key_to_node_opt() and vma_replace_policy()
During futex_key_to_node_opt() execution, vma->vm_policy is read under
speculative mmap lock and RCU. Concurrently, mbind() may call
vma_replace_policy() which frees the old mempolicy immediately via
kmem_cache_free().
This creates a race where __futex_key_to_node() dereferences a freed
mempolicy pointer, causing a use-after-free read of mpol->mode.
[ 151.412631] BUG: KASAN: slab-use-after-free in __futex_key_to_node (kernel/futex/core.c:349)
[ 151.414046] Read of size 2 at addr ffff888001c49634 by task e/87
Peter Zijlstra [Thu, 26 Mar 2026 12:35:53 +0000 (13:35 +0100)]
futex: Require sys_futex_requeue() to have identical flags
Nicholas reported that his LLM found it was possible to create a UaF
when sys_futex_requeue() is used with different flags. The initial
motivation for allowing different flags was the variable sized futex,
but since that hasn't been merged (yet), simply mandate the flags are
identical, as is the case for the old style sys_futex() requeue
operations.
Fixes: 0f4b5f972216 ("futex: Add sys_futex_requeue()") Reported-by: Nicholas Carlini <npc@anthropic.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Claudio Imbrenda [Thu, 26 Mar 2026 13:17:19 +0000 (14:17 +0100)]
KVM: s390: Fix KVM_S390_VCPU_FAULT ioctl
A previous commit changed the behaviour of the KVM_S390_VCPU_FAULT
ioctl. The current (wrong) implementation will trigger a guest
addressing exception if the requested address lies outside of a
memslot, unless the VM is UCONTROL.
Restore the previous behaviour by open coding the fault-in logic.
Fixes: 3762e905ec2e ("KVM: s390: use __kvm_faultin_pfn()") Acked-by: Christian Borntraeger <borntraeger@linux.ibm.com> Reviewed-by: Steffen Eiden <seiden@linux.ibm.com> Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Claudio Imbrenda [Thu, 26 Mar 2026 13:17:18 +0000 (14:17 +0100)]
KVM: s390: vsie: Fix guest page tables protection
When shadowing, the guest page tables are write-protected, in order to
trap changes and properly unshadow the shadow mapping for the nested
guest. Already shadowed levels are skipped, so that only the needed
levels are write protected.
Currently the levels that get write protected are exactly one level too
deep: the last level (nested guest memory) gets protected in the wrong
way, and will be protected again correctly a few lines afterwards; most
importantly, the highest non-shadowed level does *not* get write
protected.
Moreover, if the nested guest is running in a real address space, there
are no DAT tables to shadow.
Write protect the correct levels, so that all the levels that need to
be protected are protected, and avoid double protecting the last level;
skip attempting to shadow the DAT tables when the nested guest is
running in a real address space.
Fixes: e38c884df921 ("KVM: s390: Switch to new gmap") Tested-by: Christian Borntraeger <borntraeger@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Claudio Imbrenda [Thu, 26 Mar 2026 13:17:17 +0000 (14:17 +0100)]
KVM: s390: vsie: Fix unshadowing while shadowing
If shadowing causes the shadow gmap to get unshadowed, exit early to
prevent an attempt to dereference the parent pointer, which at this
point is NULL.
Opportunistically add some more checks to prevent NULL parents.
Fixes: a2c17f9270cc ("KVM: s390: New gmap code") Fixes: e5f98a6899bd ("KVM: s390: Add some helper functions needed for vSIE") Fixes: e38c884df921 ("KVM: s390: Switch to new gmap") Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Claudio Imbrenda [Thu, 26 Mar 2026 13:17:14 +0000 (14:17 +0100)]
KVM: s390: Correctly handle guest mappings without struct page
Introduce a new special softbit for large pages, like already presend
for normal pages, and use it to mark guest mappings that do not have
struct pages.
Whenever a leaf DAT entry becomes dirty, check the special softbit and
only call SetPageDirty() if there is an actual struct page.
Move the logic to mark pages dirty inside _gmap_ptep_xchg() and
_gmap_crstep_xchg_atomic(), to avoid needlessly duplicating the code.
Fixes: 5a74e3d93417 ("KVM: s390: KVM-specific bitfields and helper functions") Fixes: a2c17f9270cc ("KVM: s390: New gmap code") Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com> Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Claudio Imbrenda [Thu, 26 Mar 2026 13:17:13 +0000 (14:17 +0100)]
KVM: s390: Fix gmap_link()
The slow path of the fault handler ultimately called gmap_link(), which
assumed the fault was a major fault, and blindly called dat_link().
In case of minor faults, things were not always handled properly; in
particular the prefix and vsie marker bits were ignored.
Move dat_link() into gmap.c, renaming it accordingly. Once moved, the
new _gmap_link() function will be able to correctly honour the prefix
and vsie markers.
This will cause spurious unshadows in some uncommon cases.
Claudio Imbrenda [Thu, 26 Mar 2026 13:17:12 +0000 (14:17 +0100)]
KVM: s390: vsie: Fix check for pre-existing shadow mapping
When shadowing a nested guest, a check is performed and no shadowing is
attempted if the nested guest is already shadowed.
The existing check was incomplete; fix it by also checking whether the
leaf DAT table entry in the existing shadow gmap has the same protection
as the one specified in the guest DAT entry.
Fixes: e38c884df921 ("KVM: s390: Switch to new gmap") Reviewed-by: Steffen Eiden <seiden@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
Biju Das [Mon, 23 Mar 2026 12:49:14 +0000 (12:49 +0000)]
irqchip/renesas-rzv2h: Fix error path in rzv2h_icu_probe_common()
Replace pm_runtime_put() with pm_runtime_put_sync() when
irq_domain_create_hierarchy() fails to ensure the device suspends
synchronously before devres cleanup disables runtime PM via
pm_runtime_disable().
Claudio Imbrenda [Thu, 26 Mar 2026 13:17:10 +0000 (14:17 +0100)]
KVM: s390: vsie: Fix dat_split_ste()
If the guest misbehaves and puts the page tables for its nested guest
inside the memory of the nested guest itself, and the guest and nested
guest are being mapped with large pages, the shadow mapping will
lose synchronization with the actual mapping, since this will cause the
large page with the vsie notification bit to be split, but the
vsie notification bit will not be propagated to the resulting small
pages.
Fix this by propagating the vsie_notif bit from large pages to normal
pages when splitting a large page.
The mbox_client for qcom-mpm sends NULL doorbell messages via
mbox_send_message() but never signals TX completion.
Set knows_txdone=true and call mbox_client_txdone() after a successful
send, matching the pattern used by other Qualcomm mailbox clients (smp2p,
smsm, qcom_aoss etc).
Fixes: a6199bb514d8a6 "irqchip: Add Qualcomm MPM controller driver" Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Cc: stable@vger.kernel.org Link: https://patch.msgid.link/20260322171533.608436-1-jassisinghbrar@gmail.com
Nate DeSimone [Tue, 24 Mar 2026 23:14:54 +0000 (16:14 -0700)]
ACPI: FPDT: expose FBPT and S3PT subtables via sysfs
Add sysfs files at /sys/firmware/acpi/fpdt/FBPT and
/sys/firmware/acpi/fpdt/S3PT that expose the raw contents of the
FPDT subtables.
Note that /sys/firmware/acpi/tables/FPDT only provides the top level
table, not the subtables. Adding access to the subtables enables a
usage model similar to /sys/firmware/dmi/tables/DMI, allowing
userspace tools to interpret newer record types (e.g. String Event
Records, Microcontroller Boot Performance Data Records, etc.) defined
in recent ACPI specifications [1] without requiring kernel changes.
Thomas Weißschuh [Thu, 26 Mar 2026 11:42:31 +0000 (12:42 +0100)]
timens: Remove dependency on the vDSO
Previously, missing time namespace support in the vDSO meant that time
namespaces needed to be disabled globally. This was expressed in a hard
dependency on the generic vDSO library. This also meant that architectures
without any vDSO or only a stub vDSO could not enable time namespaces.
Now that all architectures using a real vDSO are using the generic library,
that dependency is not necessary anymore.
Remove the dependency and let all architectures enable time namespaces.
Abel Vesa [Tue, 24 Mar 2026 15:29:43 +0000 (17:29 +0200)]
arm64: dts: qcom: eliza: Add missing msi-parent for UFS
Wire up the UFS controller to the GIC ITS by specifying the
msi-parent property. The UFS host uses MSI and requires a valid
ITS mapping in order to allocate and receive interrupts.
Add the ITS reference along with the device ID to match the SMMU
stream ID.
Fixes: db7fe6963466 ("arm64: dts: qcom: Introduce Eliza Soc base dtsi") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260324-eliza-base-dt-fixes-v3-3-3a4a03e72f8f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Abel Vesa [Tue, 24 Mar 2026 15:29:42 +0000 (17:29 +0200)]
arm64: dts: qcom: eliza: Add missing CX power domain to GCC
Unless CX is declared the power-domain of GCC votes (power and
performance) on the GDSCs provided by GCC will not propagate to the CX,
which might result in under-voltage conditions.
Add the missing power-domains property to associate GCC with RPMHPD_CX.
Fixes: db7fe6963466 ("arm64: dts: qcom: Introduce Eliza Soc base dtsi") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260324-eliza-base-dt-fixes-v3-2-3a4a03e72f8f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Dmitry Baryshkov [Fri, 20 Mar 2026 02:51:00 +0000 (04:51 +0200)]
arm64: dts: qcom: patch mahua thermal zones by label
Updating DT nodes by the full path is fragile and frowned upon, it's
easy to miss the rename of the node in the main tree. Add necessary
labels and patch thermal zones for Mahua using those labels.
Dmitry Baryshkov [Fri, 20 Mar 2026 02:33:15 +0000 (04:33 +0200)]
arm64: dts: qcom: purwa: deduplicate thermal sensors with Hamoa
Hamoa and Purwa have pretty close thermal zones definitions. The major
difference is that several zones are absent (because of the lack of the
CPU cluster) and several zones use tsens2 instead of tsens3.
Instead of completely duplicating thermal zones for Purwa, reuse themal
zones from Hamoa, patching them where required.
arm64: dts: qcom: sm8750: Enable TSENS and thermal zones
The sm8750 includes four TSENS instances, with a total of 47 thermal
sensors distributed across various locations on the SoC.
The TSENS max/reset threshold is configured to 130°C in the hardware.
Enable all TSENS instances, and define the thermal zones with a hot trip
at 120°C and critical trip at 125°C.
Fix GIC_SPI interrupt numbers for QUPv3 SE6 nodes on Lemans SoC.
Using incorrect interrupt lines can prevent IRQs from triggering
and break I2C, SPI, and UART operation.
arm64: dts: qcom: qrb5165-rb5: Drop redundant non-controllable supplies
Drop completely redundant non-controllable chain of "regulator-fixed"
supplies, which serve no purpose except growing DTS and kernel boot
time. They represent no added value and because of being completely
transparent for any users of DTS (except the bloat), they should not be
represented in DTS, just like we do not represent every transistor
there.
For the few regulators being actively used and supplied by removed
dummies, change the supply to match the actual final source without
these dummy intermediaries.
arm64: dts: qcom: qrb4210-rb2: Drop redundant non-controllable supplies
Drop completely redundant non-controllable chain of "regulator-fixed"
supplies, which serve no purpose except growing DTS and kernel boot
time. They represent no added value and because of being completely
transparent for any users of DTS (except the bloat), they should not be
represented in DTS, just like we do not represent every transistor
there.
arm64: dts: qcom: qrb2210-rb1: Drop redundant non-controllable supplies
Drop completely redundant non-controllable chain of "regulator-fixed"
supplies, which serve no purpose except growing DTS and kernel boot
time. They represent no added value and because of being completely
transparent for any users of DTS (except the bloat), they should not be
represented in DTS, just like we do not represent every transistor
there.
arm64: dts: qcom: qcs615-ride: Drop redundant non-controllable supplies
Drop completely redundant non-controllable chain of "regulator-fixed"
supplies, which serve no purpose except growing DTS and kernel boot
time. They represent no added value and because of being completely
transparent for any users of DTS (except the bloat), they should not be
represented in DTS, just like we do not represent every transistor
there.
arm64: dts: qcom: lemans-ride: Drop redundant non-controllable supplies
Drop completely redundant non-controllable chain of "regulator-fixed"
supplies, which serve no purpose except growing DTS and kernel boot
time. They represent no added value and because of being completely
transparent for any users of DTS (except the bloat), they should not be
represented in DTS, just like we do not represent every transistor
there.
Md Sadre Alam [Fri, 6 Mar 2026 11:39:39 +0000 (17:09 +0530)]
arm64: dts: qcom: ipq5424-rdp466: Enable QPIC SPI NAND support
Enable QPIC SPI NAND flash controller support on the IPQ5424 RDP466
reference design platform.
The RDP466 board features a SPI NAND flash device connected to the QPIC
controller for primary storage. This patch enables the QPIC BAM DMA
controller and SPI NAND interface of QPIC, and configures the necessary
pin control settings for proper operation.
Md Sadre Alam [Fri, 6 Mar 2026 11:39:38 +0000 (17:09 +0530)]
arm64: dts: qcom: ipq5332: Add QPIC SPI NAND controller support
Add device tree nodes for QPIC SPI NAND flash controller support
on IPQ5332 SoC.
The IPQ5332 SoC includes a QPIC controller that supports SPI NAND flash
devices with hardware ECC capabilities and DMA support through BAM
(Bus Access Manager).
Md Sadre Alam [Fri, 6 Mar 2026 11:39:37 +0000 (17:09 +0530)]
arm64: dts: qcom: ipq5424: Add QPIC SPI NAND controller support
Add device tree nodes for QPIC SPI NAND flash controller support
on IPQ5424 SoC.
The IPQ5424 SoC includes a QPIC controller that supports SPI NAND flash
devices with hardware ECC capabilities and DMA support through BAM
(Bus Access Manager).
Enable PCA9538 expander as interrupt controller on Lemans EVK and configure
the corresponding TLMM pins via pinctrl to operate as GPIO inputs with
internal pull-ups.
Umang Chheda [Wed, 4 Mar 2026 16:59:25 +0000 (22:29 +0530)]
arm64: dts: qcom: lemans-evk: Add IFP Mezzanine
The Interface Plus [IFP] Mezzanine is an hardware expansion add-on
board designed to be stacked on top of Lemans EVK.
It has following peripherals :
- 4x Type A USB ports in host mode.
- TC9563 PCIe switch, which has following three downstream ports (DSP) :
- 1st DSP is routed to an M.2 E-key connector, intended for
WLAN modules.
- 2nd DSP is routed to an M.2 B-key connector, intended for
cellular modems.
- 3rd DSP with support for Dual Ethernet ports.
- eMMC.
- Additional 2.5GbE Ethernet PHY connected to native EMAC with support for
MAC Address configuration via NVMEM.
- EEPROM.
- LVDS Display.
- 2*mini DP.
Add support for following peripherals :
- TC9563 PCIe Switch.
- Additional 2.5GbE Ethernet Port.
- EEPROM.
Enable support for USB hub, LVDS display and mini-DP later once
dependent changes are available in lemans-evk core-kit.
Written with inputs from :
Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com> - Ethernet.
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> - PCIe
Monish Chunara <monish.chunara@oss.qualcomm.com> - EEPROM.
Umang Chheda [Tue, 3 Mar 2026 16:43:14 +0000 (22:13 +0530)]
arm64: dts: qcom: monaco-evk: Add IFP Mezzanine
The IFP Mezzanine is an hardware expansion add-on board designed
to be stacked on top of Monaco EVK.
It has following peripherals :
- 4x Type A USB ports in host mode.
- TC9563 PCIe switch, which has following three downstream ports (DSP) :
- 1st DSP is routed to an M.2 E-Key connector, intended for
WLAN modules.
- 2nd DSP is routed to an M.2 B-key connector, intended for
cellular modems.
- 3rd DSP with support for Dual Ethernet ports.
- EEPROM.
- LVDS Display.
- 2*mini DP.
Add support for following peripherals :
- TC9563 PCIe Switch.
- EEPROM.
Enable support for USB hub, LVDS display and mini-DP later once dependent
changes are available in monaco-evk core-kit.
Written with inputs from :
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> - PCIe
Monish Chunara <monish.chunara@oss.qualcomm.com> - EEPROM.
Iris driver doesn't support non-PAS/TZ setup for setting up the Iris
core. It's expected that the ABI that is going to be used in a long-term
would be different from the defined venus-firmware subnode.
Granted that the SC7280 Chromebooks were cancelled before reaching wide
audience and granted the feature ABI changes, drop venus configuration
for SC7280 ChromeOS devices.
Suggested-by: Stephan Gerhold <stephan.gerhold@linaro.org> Cc: Douglas Anderson <dianders@chromium.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Acked-by: Douglas Anderson <dianders@chromium.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260131-venus-iris-flip-switch-v4-1-e10b886771e1@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
There are variants from MSM8917 wingtech xiaomis what
are using goodix touch controller instead of focaltech.
Add goodix node for make it able to use touch on all
variants.
Barnabás Czémán [Sun, 15 Mar 2026 16:26:20 +0000 (17:26 +0100)]
arm64: dts: qcom: Make a common base from Redmi 5A
Redmi 5A was made by wingtech like Redmi 4A (rolex) and Redmi GO (tiare).
They are very similar, make a common base from riva for avoid
unnecessary code duplications.
Barnabás Czémán [Sun, 15 Mar 2026 16:26:19 +0000 (17:26 +0100)]
arm64: dts: qcom: msm8917-xiaomi-riva: Fix board-id for all bootloader
Redmi 5A comes with multiple bootloader versions where the expected
board-id is different.
Change the board-id to unified form what works on both bootloader
version.
Neil Armstrong [Thu, 19 Mar 2026 08:55:10 +0000 (09:55 +0100)]
arm64: dts: qcom: sm8650: Add sound DAI prefix for DP
Sound DAI devices exposing same set of mixers, e.g. each DisplayPort
controller, need to add dedicated prefix for these mixers to avoid
conflicts and to allow ALSA to properly configure given instance.
David Heidelberg [Fri, 20 Mar 2026 17:33:11 +0000 (18:33 +0100)]
arm64: dts: qcom: sdm845-xiaomi-beryllium: Mark l1a regulator as powered during boot
The regulator must be on, since it provides the display subsystem and
therefore the bootloader had turned it on before Linux booted.
Fixes: 77809cf74a8c ("arm64: dts: qcom: Add support for Xiaomi Poco F1 (Beryllium)") Signed-off-by: David Heidelberg <david@ixit.cz> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260320-beryllium-booton-v2-1-931d1be21eae@ixit.cz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krishna Kurapati [Mon, 23 Mar 2026 10:31:19 +0000 (16:01 +0530)]
arm64: dts: qcom: hamoa/purwa: Flatten usb controller nodes
Flatten usb controller nodes and update to using latest bindings and
flattened driver approach.
Tested this patch on CRD platform. For testing purpose, modified dr_mode
property and added usb-role-switch property to the 3 super speed capable
DRD controllers and valdiated both host and device mode. Also validated
host mode on the multiport controller.
The pinctrl nodes from sm6350.dtsi already contain a bias-* property, so
that needs to be deleted, otherwise the dtb will contain two conflicting
bias-* properties.
Vishnu Saini [Wed, 18 Mar 2026 19:08:19 +0000 (00:38 +0530)]
arm64: dts: qcom: monaco-evk: add lt8713sx bridge with displayport
Monaco-evk has LT8713sx which act as DP to 3 DP output
converter. Edp PHY from monaco soc is connected to lt8713sx
as input and output of lt8713sx is connected to 3 mini DP ports.
Two ports are available in mainboard and one port
is available on Mezz board.
lt8713sx is connected to soc over i2c0 and with reset gpio
connected to pin6 of ioexpander5.
Enable the edp nodes from monaco and enable lontium lt8713sx
bridge node.
Change the uart instances:
- uart6 is for bluetooth
- uart9 is for serial console (available on the uSD pinout)
Most OSes assume serial0 is for console UART. Bluetooth interface uses
UART interface. uart6 is standard debug console and uart9 bluetooth on
SDM845 devices.
The alert-slider is a tri-state sound profile switch found on the
OnePlus 6, Android maps the states to "silent", "vibrate" and "ring".
Expose them as ABS_SND_PROFILE events.
The previous GPIO numbers were wrong. Update them to the correct ones.
Abel Vesa [Fri, 20 Mar 2026 11:16:44 +0000 (13:16 +0200)]
arm64: dts: qcom: glymur-crd: Enable eDP display support
Enable the MDSS (Mobile Display SubSystem), the third DisplayPort
controller, and its PHY to drive the onboard eDP panel on the Glymur
CRD platform. Also describe the regulator supplying panel power.
The MDSS (Mobile Display SubSystem) on Glymur provides four DisplayPort
controllers. Describe them together with the display controller and eDP
PHY. Also add the combo PHY link and vco_div clocks to the display clock
controller, and connect the PHYs and DP endpoints in the graph.
Wesley Cheng [Fri, 20 Mar 2026 10:56:53 +0000 (12:56 +0200)]
arm64: dts: qcom: glymur-crd: Enable USB support
The Qualcomm Glymur Compute Reference Device comes with two Type-C ports,
one USB Type-A port, and a fingerprint reader connected over USB. Each
Type-C port is connected to one USB combo PHY and one M31 eUSB2 PHY. The
Type-A port is connected to the USB multi-port controller through one M31
eUSB2 PHY and one USB3 UNI PHY. The fingerprint reader is connected to the
USB_2 controller.
All M31 eUSB2 PHYs have associated eUSB2-to-USB 2.0 repeaters, which are
either integrated in SMB2370 PMICs or provided by dedicated NXP PTN3222
devices.
Enable all required controllers, PHYs, and repeaters, while specifying
their supplies. Also describe the PMIC GLINK graph for the Type-C
connectors.
Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> Co-developed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Tested-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260320-dts-qcom-glymur-add-usb-support-v7-2-ba367eda6010@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Wesley Cheng [Fri, 20 Mar 2026 10:56:52 +0000 (12:56 +0200)]
arm64: dts: qcom: glymur: Add USB related nodes
The Glymur USB subsystem contains three USB 3.2 Gen 2 controllers,
one USB 3.2 multi-port controller, and one USB 2.0-only controller.
This includes five SS USB QMP PHYs (three combo and two UNI) and six M31
eUSB2 PHYs.
All controllers are based on SNPS DWC3, so describe them as Qualcomm
flattened DWC3 nodes.
Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> Co-developed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Tested-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260320-dts-qcom-glymur-add-usb-support-v7-1-ba367eda6010@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
projects / thirdparty / kernel / stable.git / log
