Jonas Jelonek [Wed, 18 Mar 2026 22:58:56 +0000 (23:58 +0100)]
realtek: pcs: rtl930x: move writes to config
Move a few register writes from the ANA_10G patch sequences to the
configuration function. Those write are targeted at digital pages and do
not fully apply for *SGMII modes. To make the ANA_10G sequence really
just deal with analog pages and make it usable for *SGMII modes too,
move out the digital page writes.
Jonas Jelonek [Tue, 17 Mar 2026 22:23:08 +0000 (22:23 +0000)]
realtek: pcs: rtl930x: break up fiber config sequences
The patch/config sequences we took over from the SDK are partially
redundant, i.e. they share common parts which can be separated per
speed. For example, the config for 10GR contains the one for 2500Base-X
but we have a dedicated one for 2500Base-X. This is a first step to
modularize and reverse-engineer those sequences, and decrease the size
they claim.
The sequences are nearly exclusive ordered by ascending pages. This
suggests that those register/writes do not have a hidden function of
performing inline resets but rather are just configuration values.
Likely, they may be applied in rather arbitrary order. Splitting up the
sequences here assumes this is true and does some minor order changes.
Testing shows no behavioral change. Looking at [1] there are no relevant
reset or trigger bits affected by that. Suspiciously ordered writes have
mostly been kept though.
USXGMII setup needs to be adjusted too due to shared sequence parts.
Jonas Jelonek [Wed, 18 Mar 2026 21:02:55 +0000 (22:02 +0100)]
realtek: pcs: rtl930x: move EEE to USXGMII configuration
The patch/config sequences for USXGMII modes contain a register write
which is explicitly labelled as "enable eee". To clean the sequences and
reduce duplication, move this specific write to the USXGMII
configuration function.
While at it, demystify this register write. From [1] we can see that
only a single bit needs to be set for controlling EEE instead of the
whole register. From testing it was seen that the register has a default
value of 0x445C after reset. Thus, there is no other operation hidden in
this write and we're safe to reduce it to setting just the EEE enable
bit.
USXGMII configuration is currently only performed via the patching
sequences although there's a dedicated function which configures several
parameters and assigns meaningful names to some register fields. It was
introduced in dca20f91ea12 ("realtek: add serdes patch for 10G_QXGMII")
but somewhat abandoned later due to a partial revert.
To improve the situation, prioritize usage of the function for USXGMII
variants and remove some parts from the patch sequences which seem to be
exclusive for USXGMII and thus can be covered by this function. Writes
to registers [0x6, 0xE], [0x6, 0x13] and [0x6, 0x14] can be dropped
completely because they are redundant. The bits really affected by
these writes (compared to the default register values aquired from a
dump) are overwritten below again. Testing on real hardware and USXGMII
supports this.
While at it, improve the style a bit and add comments explaining some of
the fields a bit more. Additionally, fix the call situation which
currently is dead code due to early exit. Provide two calls to the
mentioned functions but comment one of them to remain current
functionality. Names and meaning of fields is inferred from [1].
Jonas Jelonek [Wed, 18 Mar 2026 20:20:31 +0000 (21:20 +0100)]
realtek: pcs: rtl930x: carve out common writes
Start deconstructing the patch/config sequences by carving out two
specific writes which are common for non-USXGMII and are special because
they are not in analog SerDes pages.
Jonas Jelonek [Sat, 21 Mar 2026 23:52:09 +0000 (00:52 +0100)]
realtek: pcs: rtl930x: handle QSGMII config early
Handle QSGMII config earlier within the configuration function as a
preparation for subsequent patches in this area. Those will target
splitting up the config sequences and 5G-QSGMII is special there.
Jonas Jelonek [Tue, 17 Mar 2026 21:29:15 +0000 (21:29 +0000)]
realtek: pcs: rtl930x: rename patching function
Rename the function that currently "applies patches" so that it covers
everything it does (and will do). It doesn't only apply patches but in
general performs configuration of a SerDes for a particular hardware
mode.
While at it, remove a print above that call because it is both placed
wrong and redundant due to what the generic pcs_config prints.
Change how patches are applied to reduce redundancy and make the code
more readable. Define a generic function that applies any patch. Within
the RTL930x patch application, define a local macro that helps to get
rid of repeated even/odd checks. While making the code cleaner, it is
also a preparation for further refactoring here.
This adds a local helper macro intended to be only temporary but keeps
the style of the code clean by avoiding a lot of if-else clauses.
Anthony Sepa [Wed, 25 Mar 2026 20:13:43 +0000 (21:13 +0100)]
ipq40xx: fix art partition name WHW03 V1
In the blamed commit, the wrong partition name for ART was used.
It was later discovered that the partition table uses "0:ART" instead of
"art" for the ART partition name thus breaking caldata extraction.
So, fix the partition name.
Fixes: ee5999cf78d8 ("treewide: linksys: use nvmem MAC for hw_mac_addr") Signed-off-by: Anthony Sepa <protectivedad@gmail.com> Signed-off-by: Robert Marko <robimarko@gmail.com>
Allow to configure the LM75 alert pin to active-high instead
of its default active-low. This patch is needed for the D-Link
DGS-1250 series where the alert pin steers the fan speed
between low and high.
Sven Eckelmann [Wed, 11 Mar 2026 17:49:44 +0000 (18:49 +0100)]
realtek: dsa: rtl93xx: avoid LAG transmission on down link
When the link goes down on the other end of a bond, it was noticed that the
switch was still trying to send data over this link.
Problem here is that net_lag_port_dev_txable() uses
bond_is_active_slave_dev() to look the state up. But this is actually
showing if a link is a NOT a backup - not if the link should be really be
TX enabled or not.
As a DSA driver, it is important to consume the DSA information.
dp->lag_tx_enabled must therefore be used for DSA .port_lag_change events.
This variable contains two information from the
struct netdev_lag_lower_state_info:
Damien Dejean [Tue, 24 Mar 2026 20:43:06 +0000 (21:43 +0100)]
realtek: phy: backport pair/polarity order support
Backport four patches merged in netdev-next/main to add pair order [1,2]
and pair polarity [3,4] configuration support for the RTL8224. The
configuration is required when the bootloader doesn't set it up.
Bee Cadorna [Thu, 9 Jan 2025 22:58:22 +0000 (16:58 -0600)]
ipq40xx: enable LP5521 driver for TP-Link Deco M5
TP-Link Deco M5 v1 and v2 models use a separate LP5521 controller to
control the LEDs on the device.
Signed-off-by: Bee Cadorna <r3usrlnd@gmail.com> Tested-by: Tan Li Boon <undisputed.seraphim@gmail.com> Link: https://github.com/openwrt/openwrt/pull/17537 Signed-off-by: Robert Marko <robimarko@gmail.com>
MAC Addresses
-------------
Label : OPAQUE partition @ 0x0008
LAN : Label
WAN : Label + 1
WLAN 2G : Label + 2
WLAN 5G : Label + 3
Installation
------------
1. Install TFTP server software
2. Rename the factory image to 'M5v1_tp_recovery.bin' and copy it into
the TFTP folder
3. Connect an interface configured to 192.168.0.66/24 to the LAN port
- Note: The LAN port is the ethernet port that is furthest away from
the power plug
4. Press the 'reset' button down before powering up the device, holding
for at least 10 seconds
5. Router should download the factory image, install it, and then reboot
6. Router will start up with address 192.168.1.1
Known Issues
------------
- Some devices (including some V1 and V2 devices) may have flash chips
that are not detected, supported by, or have broken SFDP support
The RTL93xx based D-Link DGS-1250 series is currently being
prepared for OpenWrt support. These devices have some extras
that are not yet supported by the existing configuration.
Add the following items to the kernel configuration:
- CONFIG_SENSORS_GPIO_FAN: The devices have a simple gpio
controlled fan (0/1 aka off/on).
- CONFIG_I2C_GPIO_SHARED: The busses of the SFP+ slots are
not controlled by the built-in SOC I2C controller. Instead
they are realized by shared SCL bit banged GPIOs.
- CONFIG_EEPROM_AT24: The MAC address and other device data
is storend in an Atmel EEPROM.
The i2c-shared-gpio driver is designed to emulate up to four
i2c busses with distinct sda lines and a a shared scl line.
For some reason the check for the number of allowed busses
is one off and the driver can only allocate three busses.
Fix that.
Fixes: acd7ecc9ed8 ("realtek: add new i2c-gpio-shared driver") Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/22543 Signed-off-by: Robert Marko <robimarko@gmail.com>
A generic function must not call a device specific function directly.
Make hw_en_rxtx() a config member and call that instead of the
functions directly.
With this change another optimization can take place. hw_init()
currently calls device specific hw_en_rxtx() functions at the start
of the function. This is wrong. Initialize the hardware first before
activating the network rx/tx. Take out the multiple calls and place
the rx/tx setup just before the hw_init() call.
The RTL839x notify ring buffer setup is the last consumer
of family_id. Convert it to a device specific callback and
drop family_id from the configuration structure.
RTL93xx sets up the ring counters twice. One location is
inside rteth_93xx_hw_en_rxtx() and the other one is inside
rteth_93xx_hw_reset(). There are slight differences (e.g.
the ring size that is set or how the counters are cleared).
It is currently unclear where to place it best. For now
align this to RTL83xx and remove the coding from function
rteth_93xx_hw_en_rxtx(). Provide a complete & proper setup
in rteth_93xx_hw_reset().
Looking at the different old implementations one can see
that one initialized the ring counters with offset "-2".
This headroom is not needed. The old comment " Some SoCs
have issues with missing underflow protection" was only
regarding the way the counters are being resetted and not
how large they are setup.
The hw_en_rxtx() functions still use the old prefix. Rename
them to align with the rest of the code. This refactoring
makes clear that there is a bug in rteth_tx_timeout(). A
generic function should not call a device specific function
directly. The bug will be fixed separately.
Fixes: c63433acd ("add support for XikeStor SKS8300-8T") Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/22593 Signed-off-by: Robert Marko <robimarko@gmail.com>
Fixes: 4a73f72a2 ("add monitor IC node for XikeStor SKS8310-8X") Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/22593 Signed-off-by: Robert Marko <robimarko@gmail.com>
ath79: fix initramfs boot for Huawei AP5030DN and AP6010DN
Fix execution of initramfs image on Huawei AP5030DN and AP6010DN by
increasing available memory for LZMA extraction by the loader.
The default leaves only ~23.6 MB between the decompression target
and the running loader code. Extracting images with built-in
packages lead to overwriting the loader code. This causes
the decompression to produce garbage output and hang.
Fix this by overwriting LZMA_TEXT_START to increase the
available memory for LZMA extraction to ~39.6 MB.
realtek: dts: add Netgear GS110TPP serdes for port 9/10
The Netgear GS110TPP uses an RTL8214C to drive ports 9 and 10. The
DTS is missing the corresponding serdes assignment. From looking at
[1] it seems to be connected to pins 82-85 (serdes 2). Add that
definition. With that the last improper use of SWITCH_PORT() macro
is sorted out.
Remark: I do not own this device. The patch just resembles what
the picture [1] shows.
kernel: backport crypto selftests for some ciphersuites
FIPS 140-3 recommends that all crypto implementations should be tested
before first use. Testmanager performs initial tests based on existing
test vectors. Not all algorithms have defined test vectors, so to improve
this situation, this commit backports recently added test vectors for
following cipher suites:
* authenc(hmac(md5),cbc(des))
* authenc(hmac(md5),cbc(aes))
* authenc(hmac(sha1),rfc3686(ctr(aes)))
* authenc(hmac(sha224),rfc3686(ctr(aes)))
* authenc(hmac(sha256),rfc3686(ctr(aes)))
* authenc(hmac(sha384),rfc3686(ctr(aes)))
* authenc(hmac(sha512),rfc3686(ctr(aes)))
These vectors were calculated using a software implementation and then
double-checked on Mediatek MT7981/MT7986 (safexcel) and NXP P2020 (talitos).
Both platforms passed self-tests.
kernel: add support for authenc(hmac(md5),*) on safexcel
This patch adds support for the following AEAD ciphersuites:
- authenc(hmac(md5),cbc(aes))
- authenc(hmac(md5),cbc(des)))
- authenc(hmac(md5),cbc(des3_ede))
- authenc(hmac(md5),rfc3686(ctr(aes)))
These algorithms are used mainly for backward compatibility with some
older equipment. This is enhanced version of the patch found in the
mtk-openwrt-feeds repo.
All cipher suites were tested using test vectors on the MediaTek MT7981,
MT7986, and MT7988.
Harden the mdio driver probing by checking for duplicate port
definitions. Now that the driver has a valid_port mask this
is just a simple bit check. This is the same as upstream does.
realtek: mdio: add valid_port bitmask to structure
Until now the driver determines the validity of a phy (or port)
by checking "smi_bus[] < 0". That is somehow confusing. Align
with upstream and add a valid_port bitmask that can be used for
this check with common kernel bit operations.
The mdio driver has come a long way. The code is
quite stable now and whenever bugs are analyzed
one can look at the registers with devmem from
command line. Drop unneeded debugging information.
Felix Fietkau [Mon, 23 Mar 2026 09:52:46 +0000 (09:52 +0000)]
mt76: update to Git HEAD (2026-03-21)
a665659dee50 wifi: mt76: fix beacon monitor for MBSSID nontransmitted BSS 1b26f5f63d42 wifi: mt76: mt7996: Decrement sta counter removing the link in mt7996_mac_reset_sta_iter() 0c1dedac48c3 wifi: mt76: mt7996: Switch deflink to seclink only if link lookup does not fail 7fa21be01b97 wifi: mt76: mt7996: Rely on msta_link link_id in mt7996_vif_link_remove() 492a407111c3 wifi: mt76: mt7996: Account active links in valid_links fields ade83e44eda0 wifi: mt76: mt7996: Move mlink deallocation in mt7996_vif_link_remove() efebeea5c058 wifi: mt76: mt7996: Destroy vif active links in mt7996_remove_interface() a4c790aef40d wifi: mt76: mt7996: Add mcu APIs to enable/disable vif links. 018f60316d4d wifi: mt76: mt7996: Destroy active sta links in mt7996_mac_sta_remove()
Hauke Mehrtens [Mon, 23 Mar 2026 01:07:43 +0000 (02:07 +0100)]
github: pin claude-code-action to v1.0.49
Version 1.0.49 added support for PRs from forked repositories.
This feature was reverted in v1.0.50, see:
https://github.com/anthropics/claude-code-action/pull/937
v1.0.49 broke commits made by Claude, but we do not use that
feature. Pin to v1.0.49 until
https://github.com/anthropics/claude-code-action/pull/963 is merged
and released.
Fixes: c0e75c9de6f2 ("github: add Claude code review workflow triggered by /claude comment") Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Shiji Yang [Fri, 20 Mar 2026 11:32:03 +0000 (19:32 +0800)]
ramips: fix kernel decompress error for ELECOM WRC-X1800GS
The bootloader reads the compressed kernel to 0x82000000. We need
to decompress kernel to a different address far from 0x82000000 to
avoid memory overlap.
Shiji Yang [Sun, 22 Mar 2026 12:12:11 +0000 (20:12 +0800)]
ramips: fix initramfs kernel loadaddr for EAP615-Wall v1
The kernel load address was changed in commit e2d823d06830 ("ramips:
fix LZMA decompression error for TP-Link EAP615-Wall"). We also need
to relocate the load address for initramfs image so that it can be
booted correctly.
Hauke Mehrtens [Tue, 17 Mar 2026 00:06:24 +0000 (01:06 +0100)]
uboot-lantiq: fix C-style comments in AWK scripts
Modern gawk rejects C-style /* ... */ comments in AWK code, treating
them as regex patterns where '*' has nothing to quantify. Replace all
such comments with AWK-style '#' comments in lantiq_bdi_conf.awk and
lantiq_ram_init_uart.awk.
Also replace the pattern 'if (x) /* comment */ else action' which used
a C comment as a null statement with the equivalent 'if (!x) action'.
Fixes build error:
awk: error: ? * + or {interval} not preceded by valid subpattern
Hauke Mehrtens [Sun, 22 Mar 2026 23:59:06 +0000 (00:59 +0100)]
github: fix claude-code-review running in tag mode for issue_comment
Without a prompt the action auto-detected mode: tag instead of agent
when triggered via issue_comment, resulting in no review being posted.
Remove the prompt so the action can correctly use its built-in agent
mode with full PR context.
Fixes: c0e75c9de6f2 ("github: add Claude code review workflow triggered by /claude comment") Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Benjamin Levine [Fri, 20 Mar 2026 06:07:31 +0000 (06:07 +0000)]
lantiq: xrx200: autoload lantiq_gswip and tag_gswip to fix failsafe mode
lantiq_gswip and tag_gswip were not loaded during failsafe, leaving the
switch uninitialised. This caused LAN1 port to show no link, making
SSH-based recovery impossible.
Add the autoload flag and include tag_gswip (which was also missing from
the autoload list) so the switch initialises correctly in failsafe mode.
Hauke Mehrtens [Sun, 22 Mar 2026 20:31:41 +0000 (21:31 +0100)]
github: add actions: read permission for CI status in claude-code-review
The claude-code-action uses mcp__github_ci__get_ci_status and related
tools to check workflow run status as part of the review. Without
actions: read the GitHub API calls for CI status are rejected.
Fixes: c0e75c9de6f2 ("github: add Claude code review workflow triggered by /claude comment") Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Hauke Mehrtens [Sun, 22 Mar 2026 20:28:54 +0000 (21:28 +0100)]
github: remove allowedTools restriction from claude-code-review
The whitelist was too restrictive, causing permission denials when
Claude tried to use basic tools like Read or Grep to analyse the diff.
Remove it and let the action use its default toolset.
Fixes: c0e75c9de6f2 ("github: add Claude code review workflow triggered by /claude comment") Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Hauke Mehrtens [Sun, 22 Mar 2026 03:00:51 +0000 (04:00 +0100)]
github: add Claude code review workflow triggered by /claude comment
Add claude-code-review.yml using anthropics/claude-code-action@v1.
The review runs when a PR comment containing "/claude" is posted,
avoiding unnecessary API usage on every push.
Uses issue_comment trigger restricted to PR comments only. Only
triggers for users with write access (OWNER, MEMBER, COLLABORATOR)
and when the comment body contains "/claude", preventing any runner
from being allocated for unrelated comments. A short domain hint
steers the review toward OpenWrt embedded Linux conventions.
Rustam Adilov [Tue, 10 Mar 2026 17:07:18 +0000 (22:07 +0500)]
realtek: gpio: backport rtl9607c gpio support patches
This commit backports 2 patches that add gpio controller support
to RTL9607C SoCs. It enables us to make use of anything that
can be controlled by GPIO on RTL9607C, like LEDs, buttons and such.
Zoltan HERPAI [Sun, 1 Jun 2025 21:31:52 +0000 (21:31 +0000)]
starfive: add uEnv script on VF2 boards
Certain versions of the VF2 bootloader require the presence of a
vf2_uEnv.txt in the boot partition to properly load a non-SDK kernel.
Add this file during the SD-card generation.
Known VF2 bootloader versions exhibiting this behaviour are:
Zoltan HERPAI [Sun, 1 Jun 2025 21:34:50 +0000 (21:34 +0000)]
starfive: add ubootenv support
The VF2 boards store their ubootenv on /dev/mtd1 which is a SPI flash
partition. Add support for reading this partition in uboot-envtools,
and add the package into the VF2 image.
Co-authored-by: Shiji Yang <yangshiji66@outlook.com> Signed-off-by: John Audia <therealgraysky@proton.me> Link: https://github.com/openwrt/openwrt/pull/22276 Signed-off-by: Robert Marko <robimarko@gmail.com>
Co-authored-by: Shiji Yang <yangshiji66@outlook.com> Signed-off-by: John Audia <therealgraysky@proton.me> Link: https://github.com/openwrt/openwrt/pull/22276 Signed-off-by: Robert Marko <robimarko@gmail.com>
John Audia [Fri, 6 Mar 2026 13:09:32 +0000 (08:09 -0500)]
generic: config-6.12: update with new symbols
Upstream 2b81db8a7f4475e141a8ffd7cc745ed9f15962df introduced several new
symbols. This commit adds them and also applies alphabetical order via
./scripts/kconfig.pl target/linux/generic/config-6.12
RTL93xx devices can no longer find the switch node in the DTS.
Commit 4c92254 ("relocate/retype switch node") refactored the
switch node definition to better align with upstream. Sadly
the redefinition for RTL93xx devices failed.
- RTL83xx: use "switch0: ethernet-switch"
- RTL93xx: use "switch0: switch@1b000000"
Follow up commit 8b969f7 ("drop realtek,smi-address property)
changed the dts lookup sequence for mdio initialization. On
RTL93xx devices it cannot find the switchnode via
of_get_child_by_name(dev->of_node->parent, "ethernet-switch")
Fix the switch node type for RTL93xx
Fixes: 8b969f7 ("drop realtek,smi-address property) Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/22557 Signed-off-by: Robert Marko <robimarko@gmail.com>
Jonas Jelonek [Wed, 18 Mar 2026 10:24:19 +0000 (11:24 +0100)]
realtek: pcs: rtl930x: adjust initial vth_min value
During RX calibration we use a vth_min value of 0 while the SDK always
uses a value of 1 [1]. While we do not know right now which effect this
really has, sync this to the SDK. In worst case we might have an
insufficient calibration result at the moment which usually might be
fine.
Suggested-by: Bevan Weiss <bevan.weiss@gmail.com> Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Link: https://github.com/openwrt/openwrt/pull/22450 Signed-off-by: Robert Marko <robimarko@gmail.com>
Jonas Jelonek [Wed, 18 Mar 2026 09:26:16 +0000 (10:26 +0100)]
realtek: pcs: rtl930x: reorder FGCAL code
The order within the FGCAL code is not optimal. Right now, there's
output printed even in successful cases (which doesn't really help) and
a value is read although it isn't used if the run succeeds. To fix both,
move that below the success loop exit so it's just printed in
non-success case where the information might be helpful.
Suggested-by: Bevan Weiss <bevan.weiss@gmail.com> Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Link: https://github.com/openwrt/openwrt/pull/22450 Signed-off-by: Robert Marko <robimarko@gmail.com>
Jonas Jelonek [Tue, 17 Mar 2026 20:17:12 +0000 (20:17 +0000)]
realtek: pcs: rtl930x: simplify even/odd writes
Simplify some register writes being different for even and odd SerDes by
removing if-else and use ternary operator instead. This makes code
shorter and more readable.
Jonas Jelonek [Mon, 16 Mar 2026 15:22:55 +0000 (15:22 +0000)]
realtek: pcs: rtl930x: fix calibration check
Comparing our calibration check with the one in the SDK ([1]), one can
see some discrepancies for which there are no apparent reasons. SGMII
and 1000Base-X are handled equal to XSGMII although they aren't in the
SDK and have different symbol error registers. USXGMII and 10GBase-R are
fine, but other modes are explicitly handled with failure then.
Restructure this by keeping XSGMII alone with its dedicated check (as
the SDK does) and handle all other modes differently. Though the SDK
just skips symbol error check for modes like SGMII, 1000Base-X,
2500Base-X, it was found to be ok to perform a simple check for them
too. Since we have also a default case in the symbol error read
implementation now, we can cover all other modes with default case here
too. As a side-effect, this removes the confusing and probably wrong
failure stating calibration has failed although just the checks were
insufficient.
Jonas Jelonek [Mon, 16 Mar 2026 12:10:14 +0000 (13:10 +0100)]
realtek: pcs: rtl930x: fix 10g RX idle waiting
Our implementation waiting for RX idle signal of a 10G SerDes deviates
from what the SDK does. While we timeout after 100 reads and thus cannot
really control the real time, the SDK times out after 10ms. Adjust that
accordingly by switching the timeout to ktime_* functions with a 10ms
timeout as per the SDK.
While at it, improve the overall style of the function a bit.
Suggested-by: Markus Stockhausen <markus.stockhausen@gmx.de> Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Link: https://github.com/openwrt/openwrt/pull/22450 Signed-off-by: Robert Marko <robimarko@gmail.com>
Jonas Jelonek [Thu, 5 Mar 2026 21:59:55 +0000 (21:59 +0000)]
realtek: pcs: rtl930x: fix symbol error read
Fix the symbol error read implementation to be usable for other modes
too. While we handle other modes as 'not supported', the SDK has a
generic read used in the 'default' case. Do the same so we can have
proper 2500Base-X support here and avoid confusing error messages.
Jonas Jelonek [Thu, 5 Mar 2026 22:01:19 +0000 (22:01 +0000)]
realtek: pcs: rtl930x: use param instead of register read
Instead of performing a dedicated register read we can rely on the mode
that is passed via a parameter to the function. The code flow ensures
that this is the same value in this place.
Jonas Jelonek [Thu, 5 Mar 2026 21:34:46 +0000 (21:34 +0000)]
realtek: pcs: rtl930x: fix some harebrained piece of code
Part of the calibration procedure contains some weird and harebrained
piece of code where a specific register write is guarded by a check for
the SerDes mode, otherwise an error is printed. But right after this
if-else block, the exact same write is applied anyway. Remove this
brain-dead piece of code with something meaningful, i.e. reference code
from the SDK [1]. Over there, more writes are applied and a proper check
is in place.
While at it, add some another comment to the code. While it is
honourable to have code developed by someone quite some time ago that
works, it's discouraged to just have code without any explanation
especially if it differs from the SDK.
Jonas Jelonek [Thu, 5 Mar 2026 21:21:39 +0000 (21:21 +0000)]
realtek: pcs: rtl930x: limit loop iterations
Calibration for RTL930x uses multiple iterations for several checks.
While this is fine and needed, it shouldn't be allowed to run forever in
trust that at some point there will always be a "valid" value causing a
loop exit. This has occured a couple of times, causing the driver to
loop forever in case something doesn't run as expected.
To avoid this (and in general as a good practice) limit the affected
loop to a rough estimate of 10 iterations instead of running possibly
forever. The estimate is based on the fact that under normal conditions
it usually takes 1 or 2 to iterations to succeed, more is likely never
to succeed but 10 gives some reasonable headroom.
Jonas Jelonek [Thu, 5 Mar 2026 21:17:30 +0000 (21:17 +0000)]
realtek: pcs: rtl930x: cleanup code comments and output
Cleanup some comments in the code by reducing them to the essential and
putting them behind a line in favor of above. Also simplify some output
prints for the same purpose.
Pawel Dembicki [Tue, 24 Feb 2026 08:35:49 +0000 (09:35 +0100)]
mpc85xx: p2020: switch P2020RDB to DSA
Convert the P2020RDB DTS to DSA for the VSC7385 switch, add port
labels and fixed-link. Update board network defaults, preinit iface,
and compat version, and include the DSA switch kmod in the image.
- reg: the (overall) address of the phy
- realtek,smi-address: the address of the phy on its bus
This notation does not align with upstream. reg should be the address
of the phy on its bus. But where to get the overall address that is
needed for register writes to the hardware?
Luckily the mdio driver and the hardware design sync the ports and
phys (overall) addresses. Thus derive missing data from the dts port
nodes (below ethernet-ports). To realize this
- carve out the port mapping into a separate function to align with
the upstream driver.
- do more sanity checks and catch more inconsistencies
- raise more/better errors via dev_err_probe()
With this commit all dts files must be rewritten as follows:
- if phy has no realtek,smi-address leave it as is
- if phy has realtek,smi-address, write that value into the reg
property and drop realtek,smi-address.
Remark: This commit might bring some confusion about the phyXX and
phy@YY and <reg=YY> naming convention. To be somehow consistent with
the current port/phy identifiers from now on the dts will have:
- phyXX: where XX matches the port number
- phy@YY: where YY is the phy address on the mdio bus
- <reg=YY>: where YY is the phy address on the mdio bus
The switch node is currently located outside of the switchcore@1b000000
tree. This makes it hard to find when referencing from other nodes in
this tree. Make it a subnode of switchcore and "retype" it to
ethernet-switch like upstream does.
This is not perfectly aligned as upstream just mixes the switchcore and
the ethernet-switch node into one. But this will be future work for
downstream.
The Zyxel XGS1x10 DTS overzealously tries to avoid redundancies. For
this the phy24/phy25 definitions were split into a common and a device
specific part. Understanding how these phys are defined is therefore
a little bit tricky. Add a little bit of redundancy to make the
definitions easier to read and understand in a single location.
Install via UART:
1. Download the initramfs image, rename it to
initramfs.itb, host it with the tftp server.
2. Interrupt U-Boot and run these commands:
tftpboot initramfs.itb
bootm
3. After openwrt boots up, use scp or luci web
to upload sysupgrade.bin to upgrade.
Install via Uboot WebUI:
- Only work when you flash a custom uboot with webui
- Push the reset button for 5 seconds, then use broswer to
access http://192.168.1.1/, then upload factory.bin.
Rosen Penev [Sat, 21 Mar 2026 00:45:39 +0000 (17:45 -0700)]
ipq40xx: add CONFIG_NVMEM_BLOCK
NVMEM on MMC was added in dts but the corresponding option was not added
to the config.
Fixes: ee5999c ("treewide: linksys: use nvmem MAC for hw_mac_addr") Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://github.com/openwrt/openwrt/pull/22539 Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Shiji Yang [Fri, 20 Mar 2026 11:05:33 +0000 (19:05 +0800)]
ramips: mt76x8: disable ICPlus PHY driver
The initial mt76x8 kernel config file was inherited from mt7620
sub-target. However, This SoC series doesn't support any external
PHY. We can disable CONFIG_ICPLUS_PHY symbol to reduce kernel size.
generic: backport new field_prep()/get() helper for non-const bitmask
Backport new field_prep()/get() particularly useful to handle case where a
bitmask is not const and FIELD_PREP can't be used. This permit to replace
manual shift with these macro. (also needed to permit backport of some
patch without modification)
Backport reworked patch that drop the local field_prep()/get() macro in
favor of the global one.
Andrew Sim [Fri, 20 Mar 2026 05:21:26 +0000 (06:21 +0100)]
wifi-scripts: ucode: use correct antenna count for SU beamformee
The hostapd configuration for SU-BEAMFORMEE was incorrectly using the
beamformer antenna count instead of the beamformee antenna count for the
[BF-ANTENNA-N] capability string.
Fix this by using config.beamformee_antennas instead.
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