]> git.ipfire.org Git - thirdparty/qemu.git/log
thirdparty/qemu.git
3 months agoMAINTAINERS: Remove Mahmoud Mandour
Peter Maydell [Thu, 16 Apr 2026 09:16:38 +0000 (10:16 +0100)] 
MAINTAINERS: Remove Mahmoud Mandour

Mahmoud Mandour has not posted to qemu-devel in some years and did not
respond to a query about whether they still wished to be listed in
our MAINTAINERS file.  Remove them, on the assumption that they are
no longer active in QEMU.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260416091654.316158-13-peter.maydell@linaro.org

3 months agoMAINTAINERS: Remove Bastian Koppelmann
Peter Maydell [Thu, 16 Apr 2026 09:16:37 +0000 (10:16 +0100)] 
MAINTAINERS: Remove Bastian Koppelmann

Bastian Koppelmann has not posted to qemu-devel in some years and did not
respond to a query about whether they still wished to be listed in
our MAINTAINERS file.  Remove them, on the assumption that they are
no longer active in QEMU.

This makes the Tricore TCG CPUs orphan.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260416091654.316158-12-peter.maydell@linaro.org

3 months agoMAINTAINERS: Remove Huai-Cheng Kuo
Peter Maydell [Thu, 16 Apr 2026 09:16:36 +0000 (10:16 +0100)] 
MAINTAINERS: Remove Huai-Cheng Kuo

Huai-Cheng Kuo has not posted to qemu-devel in some years and did not
respond to a query about whether they still wished to be listed in
our MAINTAINERS file.  Remove them, on the assumption that they are
no longer active in QEMU.

This makes "PCIE DOE" orphan.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260416091654.316158-11-peter.maydell@linaro.org

3 months agoMAINTAINERS: Remove Dongjiu Geng
Peter Maydell [Thu, 16 Apr 2026 09:16:34 +0000 (10:16 +0100)] 
MAINTAINERS: Remove Dongjiu Geng

Dongjiu Geng has not posted to qemu-devel in some years and did not
respond to a query about whether they still wished to be listed in
our MAINTAINERS file.  Remove them, on the assumption that they are
no longer active in QEMU.

This makes the "ACPI/HEST/GHES" section orphan.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260416091654.316158-9-peter.maydell@linaro.org

3 months agoMAINTAINERS: Remove Ed Maste
Peter Maydell [Thu, 16 Apr 2026 09:16:33 +0000 (10:16 +0100)] 
MAINTAINERS: Remove Ed Maste

Ed Maste has not posted to qemu-devel in some years and did not
respond to a query about whether they still wished to be listed in
our MAINTAINERS file.  Remove them, on the assumption that they are
no longer active in QEMU.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260416091654.316158-8-peter.maydell@linaro.org

3 months agoMAINTAINERS: Remove Damien Hedde
Peter Maydell [Thu, 16 Apr 2026 09:16:32 +0000 (10:16 +0100)] 
MAINTAINERS: Remove Damien Hedde

Damien Hedde has not posted to qemu-devel in some years and did not
respond to a query about whether they still wished to be listed in
our MAINTAINERS file.  Remove them, on the assumption that they are
no longer active in QEMU.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260416091654.316158-7-peter.maydell@linaro.org

3 months agoMAINTAINERS: Remove Coiby Xu
Peter Maydell [Thu, 16 Apr 2026 09:16:31 +0000 (10:16 +0100)] 
MAINTAINERS: Remove Coiby Xu

Coiby Xu has not posted to qemu-devel in some years and did not
respond to a query about whether they still wished to be listed in
our MAINTAINERS file.  Remove them, on the assumption that they are
no longer active in QEMU.

This makes the "Vhost-user block device backend server" orphan.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260416091654.316158-6-peter.maydell@linaro.org

3 months agoMAINTAINERS: Remove Jeff Cody
Peter Maydell [Thu, 16 Apr 2026 09:16:30 +0000 (10:16 +0100)] 
MAINTAINERS: Remove Jeff Cody

Jeff Cody has not posted to qemu-devel in some years and did not
respond to a query about whether they still wished to be listed in
our MAINTAINERS file.  Remove them, on the assumption that they are
no longer active in QEMU.

This makes the "VHDX" block driver orphan.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260416091654.316158-5-peter.maydell@linaro.org

3 months agoMAINTAINERS: Remove Beniamino Galvani
Peter Maydell [Thu, 16 Apr 2026 09:16:29 +0000 (10:16 +0100)] 
MAINTAINERS: Remove Beniamino Galvani

Beniamino Galvani has not posted to qemu-devel in some years and did not
respond to a query about whether they still wished to be listed in
our MAINTAINERS file.  Remove them, on the assumption that they are
no longer active in QEMU.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260416091654.316158-4-peter.maydell@linaro.org

3 months agoMAINTAINERS: Remove Anup Patel
Peter Maydell [Thu, 16 Apr 2026 09:16:28 +0000 (10:16 +0100)] 
MAINTAINERS: Remove Anup Patel

Anup Patel has not posted to qemu-devel in some years and did not
respond to a query about whether they still wished to be listed in
our MAINTAINERS file.  Remove them, on the assumption that they are
no longer active in QEMU.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260416091654.316158-3-peter.maydell@linaro.org

3 months agoMAINTAINERS: Remove Ahmed Karaman
Peter Maydell [Thu, 16 Apr 2026 09:16:27 +0000 (10:16 +0100)] 
MAINTAINERS: Remove Ahmed Karaman

Ahmed Karaman has not posted to qemu-devel in some years and did not
respond to a query about whether they still wished to be listed in
our MAINTAINERS file.  Remove them, on the assumption that they are
no longer active in QEMU.

This makes the "Performance Tools and Tests" orphan.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260416091654.316158-2-peter.maydell@linaro.org

3 months agotarget/arm: Remove target_ulong use in hvf_handle_psci_call()
Philippe Mathieu-Daudé [Thu, 23 Apr 2026 09:24:11 +0000 (10:24 +0100)] 
target/arm: Remove target_ulong use in hvf_handle_psci_call()

Similarly to commit 3580aa03547 ("target/arm/tcg/psci.c: make
compilation unit common") which replaced the target_ulong use in
arm_handle_psci_call(), replace the one in hvf_handle_psci_call.

This could be vaddr, because entry is the start pc for the on-lining
cpu, but we prefer uint64_t because this is what we get in param[]
and pass to arm_set_cpu_on().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20260410194227.16357-1-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm: Replace target_ulong -> vaddr in guarded_page_br()
Philippe Mathieu-Daudé [Thu, 23 Apr 2026 09:24:11 +0000 (10:24 +0100)] 
target/arm: Replace target_ulong -> vaddr in guarded_page_br()

Following commit 15500df3b3b ("target/arm/tcg/translate.h: replace
target_ulong with vaddr") change, adapt guarded_page_br().

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20260401143456.79843-1-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/translate.c: make compilation unit common
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:11 +0000 (10:24 +0100)] 
target/arm/tcg/translate.c: make compilation unit common

We removed all target specifics, and can finally compile this file only
once.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-22-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/translate.c: remove target_ulong
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:11 +0000 (10:24 +0100)] 
target/arm/tcg/translate.c: remove target_ulong

We can replace it with uint32_t, because we know it's limited to 32-bit
target.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-21-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/cpu.c: simplify endianness handling in arm_disas_set_info
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:11 +0000 (10:24 +0100)] 
target/arm/cpu.c: simplify endianness handling in arm_disas_set_info

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20260407222208.271838-20-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/translate.c: replace translator_ldl_swap with translator_ldl_end
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:11 +0000 (10:24 +0100)] 
target/arm/tcg/translate.c: replace translator_ldl_swap with translator_ldl_end

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20260407222208.271838-19-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/arm_ldst.h: merge in translate.c
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm/tcg/arm_ldst.h: merge in translate.c

Only translate.c uses those functions, thus move them back to this file.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20260407222208.271838-18-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/translate-a64.c: use translator_ldl_end instead of arm_ldl_code
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm/tcg/translate-a64.c: use translator_ldl_end instead of arm_ldl_code

Allows to reduce scope of target/arm/tcg/arm_ldst.h to aarch32 only.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-17-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/translate.c: replace TCGv with TCGv_va
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm/tcg/translate.c: replace TCGv with TCGv_va

We know this file is for 32-bit runtime target, so we can set
TCG_ADDRESS_BITS. TCG_TYPE_VA is derived accordingly and is already
passed to translator_loop.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20260407222208.271838-16-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotcg/translator: add parameter to translator_loop for current addr type
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
tcg/translator: add parameter to translator_loop for current addr type

With TCG_ADDRESS_BITS mechanism, it's now possible to specify which
variant every source file is written for. Compared to before, it means
that addr_type will now vary per tb translation, where it was constant
for a given target previously.

Thus, we add new a parameter to translator_loop().
This will allow us to convert targets one by one.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20260407222208.271838-15-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/translate.c: extract aarch64_translate_code()
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm/tcg/translate.c: extract aarch64_translate_code()

This allows to get rid of TARGET_AARCH64, and helps with next patch
which will define at runtime tcg address type, by adding a second entry
point in a different source file.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-14-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/translate.c: replace target_ulong with uint32_t
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm/tcg/translate.c: replace target_ulong with uint32_t

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-13-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/translate.c: remove MO_TE usage
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm/tcg/translate.c: remove MO_TE usage

dc->be_data is already set just above in the same function:
```
    dc->be_data = EX_TBFLAG_ANY(tb_flags, BE_DATA) ? MO_BE : MO_LE;
```

Cc: qemu-stable@nongnu.org
Fixes: a729a46b05a ("target/arm: Add wrapper macros for accessing tbflags")
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-12-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/gengvec.c: make compilation unit common
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm/tcg/gengvec.c: make compilation unit common

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-11-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/op_helper.c: make compilation unit common
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm/tcg/op_helper.c: make compilation unit common

Remove unused header accel/tcg/cpu-ldst.h that has target specifics.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-10-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/translate-m-nocp.c: make compilation unit common
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm/tcg/translate-m-nocp.c: make compilation unit common

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-9-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/translate-mve.c: make compilation unit common
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm/tcg/translate-mve.c: make compilation unit common

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-8-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/translate-neon.c: make compilation unit common
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm/tcg/translate-neon.c: make compilation unit common

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-7-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/translate-vfp.c: make compilation unit common
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm/tcg/translate-vfp.c: make compilation unit common

Generated decode files must be duplicated between user and system, as
they are generated in private folders per libs, and can't be included
otherwise, as meson does not give control on output folder.
Indeed, meson generator is a different approach than custom_target, and
this is a limitation by design.

They were already duplicated between arch variants anyway, so nothing
new here. They will now be compiled once for system binaries, and still
per target for user binaries.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-6-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/translate.h: remove TARGET_AARCH64
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm/tcg/translate.h: remove TARGET_AARCH64

We need to stub a64_translate_init and gen_a64_update_pc.
At this point, we don't need to do anything for aarch64_translator_ops
since it's just an external symbol.

We can now include target/arm/tcg/translate.h from common code, since
all target specific bits have been removed, or can be specialized with
specific defines.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-5-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg/translate.h: remove tcg-op-gvec.h include
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm/tcg/translate.h: remove tcg-op-gvec.h include

Include tcg-op-gvec-common.h instead.
No target/arm code rely on target specifics for gvec ops.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-4-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/translate.h: remove tcg-op.h include
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm/translate.h: remove tcg-op.h include

Include tcg-op-common.h instead, and include target specific tcg-op.h in
files needing it. This intermediate step allows to clean up every file
(TCGv, tcg_gen.*_tl.*) in separate commits.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-3-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agoinclude/tcg/tcg-op: extract memory operations to tcg-op-mem.h
Pierrick Bouvier [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
include/tcg/tcg-op: extract memory operations to tcg-op-mem.h

This new header defines a new type for target virtual address,
independent from TCGv and is parameterized by a new define
TCG_ADDRESS_BITS (name was suggested by Paolo instead of
TARGET_ADDRESS_BITS).

By default, tcg-op.h include set this define to TARGET_LONG_BITS, but
it's also possible to include only tcg-op-common.h and tcg-op-mem.h and
set TCG_ADDRESS_BITS manually, which is what next commits will do.

We preserve existing MIT license when extracting this new header.

Implemented from:
https://lore.kernel.org/qemu-devel/a68321f0-3d54-4909-864c-9793cda05b2a@linaro.org/

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260407222208.271838-2-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm: Move OMAP CP15 register definitions to cpregs-omap.c
Alessandro Ratti [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
target/arm: Move OMAP CP15 register definitions to cpregs-omap.c

The OMAP CP15 registers are only relevant to system-mode emulation
of OMAP SoCs. Move them out of the monolithic helper.c into a
dedicated file, following the pattern of cpregs-pmu.c and
cpregs-gcs.c. This reduces the size of helper.c and compiles
the OMAP-specific code out of CONFIG_USER_ONLY builds.

Suggested-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Alessandro Ratti <alessandro@0x65c.net>
Message-id: 20260405180826.729652-1-alessandro@0x65c.net
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agoUpdate the ACPI tables based on new aml-build.c
Alireza Sanaee [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
Update the ACPI tables based on new aml-build.c

The disassembled differences between actual and expected PPTT based on
the following cache topology representation:

- l1d and l1i shared at cluster level
- l2 shared at cluster level
- l3 shared at cluster level

 /*
  * Intel ACPI Component Architecture
  * AML/ASL+ Disassembler version 20230628 (64-bit version)
  * Copyright (c) 2000 - 2023 Intel Corporation
  *
- * Disassembly of tests/data/acpi/aarch64/virt/PPTT.topology, Fri Aug  8 16:50:38 2025
+ * Disassembly of /tmp/aml-JGBZA3, Fri Aug  8 16:50:38 2025
  *
  * ACPI Data Table [PPTT]
  *
  * Format: [HexOffset DecimalOffset ByteLength]  FieldName : FieldValue (in hex)
  */

 [000h 0000 004h]                   Signature : "PPTT"    [Processor Properties Topology Table]
-[004h 0004 004h]                Table Length : 00000164
+[004h 0004 004h]                Table Length : 00000204
 [008h 0008 001h]                    Revision : 02
-[009h 0009 001h]                    Checksum : 97
+[009h 0009 001h]                    Checksum : B8
 [00Ah 0010 006h]                      Oem ID : "BOCHS "
 [010h 0016 008h]                Oem Table ID : "BXPC    "
 [018h 0024 004h]                Oem Revision : 00000001
 [01Ch 0028 004h]             Asl Compiler ID : "BXPC"
 [020h 0032 004h]       Asl Compiler Revision : 00000001

 [024h 0036 001h]               Subtable Type : 00 [Processor Hierarchy Node]
 [025h 0037 001h]                      Length : 14
 [026h 0038 002h]                    Reserved : 0000
 [028h 0040 004h]       Flags (decoded below) : 00000011
                             Physical package : 1
                      ACPI Processor ID valid : 0
                        Processor is a thread : 0
                               Node is a leaf : 0
                     Identical Implementation : 1
@@ -34,223 +34,369 @@
 [030h 0048 004h]           ACPI Processor ID : 00000000
 [034h 0052 004h]     Private Resource Number : 00000000

 [038h 0056 001h]               Subtable Type : 00 [Processor Hierarchy Node]
 [039h 0057 001h]                      Length : 14
 [03Ah 0058 002h]                    Reserved : 0000
 [03Ch 0060 004h]       Flags (decoded below) : 00000011
                             Physical package : 1
                      ACPI Processor ID valid : 0
                        Processor is a thread : 0
                               Node is a leaf : 0
                     Identical Implementation : 1
 [040h 0064 004h]                      Parent : 00000024
 [044h 0068 004h]           ACPI Processor ID : 00000000
 [048h 0072 004h]     Private Resource Number : 00000000

-[04Ch 0076 001h]               Subtable Type : 00 [Processor Hierarchy Node]
-[04Dh 0077 001h]                      Length : 14
+[04Ch 0076 001h]               Subtable Type : 01 [Cache Type]
+[04Dh 0077 001h]                      Length : 18
 [04Eh 0078 002h]                    Reserved : 0000
-[050h 0080 004h]       Flags (decoded below) : 00000010
+[050h 0080 004h]       Flags (decoded below) : 0000007F
+                                  Size valid : 1
+                        Number of Sets valid : 1
+                         Associativity valid : 1
+                       Allocation Type valid : 1
+                            Cache Type valid : 1
+                          Write Policy valid : 1
+                             Line Size valid : 1
+                              Cache ID valid : 0
+[054h 0084 004h]         Next Level of Cache : 00000000
+[058h 0088 004h]                        Size : 00200000
+[05Ch 0092 004h]              Number of Sets : 00000800
+[060h 0096 001h]               Associativity : 10
+[061h 0097 001h]                  Attributes : 0F
+                             Allocation Type : 3
+                                  Cache Type : 3
+                                Write Policy : 0
+[062h 0098 002h]                   Line Size : 0040
+
+[064h 0100 001h]               Subtable Type : 01 [Cache Type]
+[065h 0101 001h]                      Length : 18
+[066h 0102 002h]                    Reserved : 0000
+[068h 0104 004h]       Flags (decoded below) : 0000007F
+                                  Size valid : 1
+                        Number of Sets valid : 1
+                         Associativity valid : 1
+                       Allocation Type valid : 1
+                            Cache Type valid : 1
+                          Write Policy valid : 1
+                             Line Size valid : 1
+                              Cache ID valid : 0
+[06Ch 0108 004h]         Next Level of Cache : 0000004C
+[070h 0112 004h]                        Size : 00008000
+[074h 0116 004h]              Number of Sets : 00000080
+[078h 0120 001h]               Associativity : 04
+[079h 0121 001h]                  Attributes : 03
+                             Allocation Type : 3
+                                  Cache Type : 0
+                                Write Policy : 0
+[07Ah 0122 002h]                   Line Size : 0040
+
+[07Ch 0124 001h]               Subtable Type : 01 [Cache Type]
+[07Dh 0125 001h]                      Length : 18
+[07Eh 0126 002h]                    Reserved : 0000
+[080h 0128 004h]       Flags (decoded below) : 0000007F
+                                  Size valid : 1
+                        Number of Sets valid : 1
+                         Associativity valid : 1
+                       Allocation Type valid : 1
+                            Cache Type valid : 1
+                          Write Policy valid : 1
+                             Line Size valid : 1
+                              Cache ID valid : 0
+[084h 0132 004h]         Next Level of Cache : 0000004C
+[088h 0136 004h]                        Size : 0000C000
+[08Ch 0140 004h]              Number of Sets : 00000100
+[090h 0144 001h]               Associativity : 03
+[091h 0145 001h]                  Attributes : 07
+                             Allocation Type : 3
+                                  Cache Type : 1
+                                Write Policy : 0
+[092h 0146 002h]                   Line Size : 0040
+
+[094h 0148 001h]               Subtable Type : 00 [Processor Hierarchy Node]
+[095h 0149 001h]                      Length : 1C
+[096h 0150 002h]                    Reserved : 0000
+[098h 0152 004h]       Flags (decoded below) : 00000010
                             Physical package : 0
                      ACPI Processor ID valid : 0
                        Processor is a thread : 0
                               Node is a leaf : 0
                     Identical Implementation : 1
-[054h 0084 004h]                      Parent : 00000038
-[058h 0088 004h]           ACPI Processor ID : 00000000
-[05Ch 0092 004h]     Private Resource Number : 00000000
-
-[060h 0096 001h]               Subtable Type : 00 [Processor Hierarchy Node]
-[061h 0097 001h]                      Length : 14
-[062h 0098 002h]                    Reserved : 0000
-[064h 0100 004h]       Flags (decoded below) : 00000010
-                            Physical package : 0
-                     ACPI Processor ID valid : 0
-                       Processor is a thread : 0
-                              Node is a leaf : 0
-                    Identical Implementation : 1
-[068h 0104 004h]                      Parent : 0000004C
-[06Ch 0108 004h]           ACPI Processor ID : 00000000
-[070h 0112 004h]     Private Resource Number : 00000000
-
-[074h 0116 001h]               Subtable Type : 00 [Processor Hierarchy Node]
-[075h 0117 001h]                      Length : 14
-[076h 0118 002h]                    Reserved : 0000
-[078h 0120 004h]       Flags (decoded below) : 0000000E
-                            Physical package : 0
-                     ACPI Processor ID valid : 1
-                       Processor is a thread : 1
-                              Node is a leaf : 1
-                    Identical Implementation : 0
-[07Ch 0124 004h]                      Parent : 00000060
-[080h 0128 004h]           ACPI Processor ID : 00000000
-[084h 0132 004h]     Private Resource Number : 00000000
-
-[088h 0136 001h]               Subtable Type : 00 [Processor Hierarchy Node]
-[089h 0137 001h]                      Length : 14
-[08Ah 0138 002h]                    Reserved : 0000
-[08Ch 0140 004h]       Flags (decoded below) : 0000000E
-                            Physical package : 0
-                     ACPI Processor ID valid : 1
-                       Processor is a thread : 1
-                              Node is a leaf : 1
-                    Identical Implementation : 0
-[090h 0144 004h]                      Parent : 00000060
-[094h 0148 004h]           ACPI Processor ID : 00000001
-[098h 0152 004h]     Private Resource Number : 00000000
-
-[09Ch 0156 001h]               Subtable Type : 00 [Processor Hierarchy Node]
-[09Dh 0157 001h]                      Length : 14
-[09Eh 0158 002h]                    Reserved : 0000
-[0A0h 0160 004h]       Flags (decoded below) : 00000010
-                            Physical package : 0
-                     ACPI Processor ID valid : 0
-                       Processor is a thread : 0
-                              Node is a leaf : 0
-                    Identical Implementation : 1
-[0A4h 0164 004h]                      Parent : 0000004C
-[0A8h 0168 004h]           ACPI Processor ID : 00000001
-[0ACh 0172 004h]     Private Resource Number : 00000000
+[09Ch 0156 004h]                      Parent : 00000038
+[0A0h 0160 004h]           ACPI Processor ID : 00000000
+[0A4h 0164 004h]     Private Resource Number : 00000002
+[0A8h 0168 004h]            Private Resource : 0000007C
+[0ACh 0172 004h]            Private Resource : 00000064

 [0B0h 0176 001h]               Subtable Type : 00 [Processor Hierarchy Node]
 [0B1h 0177 001h]                      Length : 14
 [0B2h 0178 002h]                    Reserved : 0000
-[0B4h 0180 004h]       Flags (decoded below) : 0000000E
+[0B4h 0180 004h]       Flags (decoded below) : 00000010
                             Physical package : 0
-                     ACPI Processor ID valid : 1
-                       Processor is a thread : 1
-                              Node is a leaf : 1
-                    Identical Implementation : 0
-[0B8h 0184 004h]                      Parent : 0000009C
-[0BCh 0188 004h]           ACPI Processor ID : 00000002
+                     ACPI Processor ID valid : 0
+                       Processor is a thread : 0
+                              Node is a leaf : 0
+                    Identical Implementation : 1
+[0B8h 0184 004h]                      Parent : 00000094
+[0BCh 0188 004h]           ACPI Processor ID : 00000000
 [0C0h 0192 004h]     Private Resource Number : 00000000

 [0C4h 0196 001h]               Subtable Type : 00 [Processor Hierarchy Node]
 [0C5h 0197 001h]                      Length : 14
 [0C6h 0198 002h]                    Reserved : 0000
 [0C8h 0200 004h]       Flags (decoded below) : 0000000E
                             Physical package : 0
                      ACPI Processor ID valid : 1
                        Processor is a thread : 1
                               Node is a leaf : 1
                     Identical Implementation : 0
-[0CCh 0204 004h]                      Parent : 0000009C
-[0D0h 0208 004h]           ACPI Processor ID : 00000003
+[0CCh 0204 004h]                      Parent : 000000B0
+[0D0h 0208 004h]           ACPI Processor ID : 00000000
 [0D4h 0212 004h]     Private Resource Number : 00000000

 [0D8h 0216 001h]               Subtable Type : 00 [Processor Hierarchy Node]
 [0D9h 0217 001h]                      Length : 14
 [0DAh 0218 002h]                    Reserved : 0000
-[0DCh 0220 004h]       Flags (decoded below) : 00000010
+[0DCh 0220 004h]       Flags (decoded below) : 0000000E
                             Physical package : 0
-                     ACPI Processor ID valid : 0
-                       Processor is a thread : 0
-                              Node is a leaf : 0
-                    Identical Implementation : 1
-[0E0h 0224 004h]                      Parent : 00000038
+                     ACPI Processor ID valid : 1
+                       Processor is a thread : 1
+                              Node is a leaf : 1
+                    Identical Implementation : 0
+[0E0h 0224 004h]                      Parent : 000000B0
 [0E4h 0228 004h]           ACPI Processor ID : 00000001
 [0E8h 0232 004h]     Private Resource Number : 00000000

 [0ECh 0236 001h]               Subtable Type : 00 [Processor Hierarchy Node]
 [0EDh 0237 001h]                      Length : 14
 [0EEh 0238 002h]                    Reserved : 0000
 [0F0h 0240 004h]       Flags (decoded below) : 00000010
                             Physical package : 0
                      ACPI Processor ID valid : 0
                        Processor is a thread : 0
                               Node is a leaf : 0
                     Identical Implementation : 1
-[0F4h 0244 004h]                      Parent : 000000D8
-[0F8h 0248 004h]           ACPI Processor ID : 00000000
+[0F4h 0244 004h]                      Parent : 00000094
+[0F8h 0248 004h]           ACPI Processor ID : 00000001
 [0FCh 0252 004h]     Private Resource Number : 00000000

 [100h 0256 001h]               Subtable Type : 00 [Processor Hierarchy Node]
 [101h 0257 001h]                      Length : 14
 [102h 0258 002h]                    Reserved : 0000
 [104h 0260 004h]       Flags (decoded below) : 0000000E
                             Physical package : 0
                      ACPI Processor ID valid : 1
                        Processor is a thread : 1
                               Node is a leaf : 1
                     Identical Implementation : 0
 [108h 0264 004h]                      Parent : 000000EC
-[10Ch 0268 004h]           ACPI Processor ID : 00000004
+[10Ch 0268 004h]           ACPI Processor ID : 00000002
 [110h 0272 004h]     Private Resource Number : 00000000

 [114h 0276 001h]               Subtable Type : 00 [Processor Hierarchy Node]
 [115h 0277 001h]                      Length : 14
 [116h 0278 002h]                    Reserved : 0000
 [118h 0280 004h]       Flags (decoded below) : 0000000E
                             Physical package : 0
                      ACPI Processor ID valid : 1
                        Processor is a thread : 1
                               Node is a leaf : 1
                     Identical Implementation : 0
 [11Ch 0284 004h]                      Parent : 000000EC
-[120h 0288 004h]           ACPI Processor ID : 00000005
+[120h 0288 004h]           ACPI Processor ID : 00000003
 [124h 0292 004h]     Private Resource Number : 00000000

-[128h 0296 001h]               Subtable Type : 00 [Processor Hierarchy Node]
-[129h 0297 001h]                      Length : 14
+[128h 0296 001h]               Subtable Type : 01 [Cache Type]
+[129h 0297 001h]                      Length : 18
 [12Ah 0298 002h]                    Reserved : 0000
-[12Ch 0300 004h]       Flags (decoded below) : 00000010
+[12Ch 0300 004h]       Flags (decoded below) : 0000007F
+                                  Size valid : 1
+                        Number of Sets valid : 1
+                         Associativity valid : 1
+                       Allocation Type valid : 1
+                            Cache Type valid : 1
+                          Write Policy valid : 1
+                             Line Size valid : 1
+                              Cache ID valid : 0
+[130h 0304 004h]         Next Level of Cache : 00000000
+[134h 0308 004h]                        Size : 00200000
+[138h 0312 004h]              Number of Sets : 00000800
+[13Ch 0316 001h]               Associativity : 10
+[13Dh 0317 001h]                  Attributes : 0F
+                             Allocation Type : 3
+                                  Cache Type : 3
+                                Write Policy : 0
+[13Eh 0318 002h]                   Line Size : 0040
+
+[140h 0320 001h]               Subtable Type : 01 [Cache Type]
+[141h 0321 001h]                      Length : 18
+[142h 0322 002h]                    Reserved : 0000
+[144h 0324 004h]       Flags (decoded below) : 0000007F
+                                  Size valid : 1
+                        Number of Sets valid : 1
+                         Associativity valid : 1
+                       Allocation Type valid : 1
+                            Cache Type valid : 1
+                          Write Policy valid : 1
+                             Line Size valid : 1
+                              Cache ID valid : 0
+[148h 0328 004h]         Next Level of Cache : 00000128
+[14Ch 0332 004h]                        Size : 00008000
+[150h 0336 004h]              Number of Sets : 00000080
+[154h 0340 001h]               Associativity : 04
+[155h 0341 001h]                  Attributes : 03
+                             Allocation Type : 3
+                                  Cache Type : 0
+                                Write Policy : 0
+[156h 0342 002h]                   Line Size : 0040
+
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-Raw Table Data: Length 356 (0x164)
+Raw Table Data: Length 516 (0x204)

-    0000: 50 50 54 54 64 01 00 00 02 97 42 4F 43 48 53 20  // PPTTd.....BOCHS
+    0000: 50 50 54 54 04 02 00 00 02 B8 42 4F 43 48 53 20  // PPTT......BOCHS
     0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43  // BXPC    ....BXPC
     0020: 01 00 00 00 00 14 00 00 11 00 00 00 00 00 00 00  // ................
     0030: 00 00 00 00 00 00 00 00 00 14 00 00 11 00 00 00  // ................
-    0040: 24 00 00 00 00 00 00 00 00 00 00 00 00 14 00 00  // $...............
-    0050: 10 00 00 00 38 00 00 00 00 00 00 00 00 00 00 00  // ....8...........
-    0060: 00 14 00 00 10 00 00 00 4C 00 00 00 00 00 00 00  // ........L.......
-    0070: 00 00 00 00 00 14 00 00 0E 00 00 00 60 00 00 00  // ............`...
-    0080: 00 00 00 00 00 00 00 00 00 14 00 00 0E 00 00 00  // ................
-    0090: 60 00 00 00 01 00 00 00 00 00 00 00 00 14 00 00  // `...............
-    00A0: 10 00 00 00 4C 00 00 00 01 00 00 00 00 00 00 00  // ....L...........
-    00B0: 00 14 00 00 0E 00 00 00 9C 00 00 00 02 00 00 00  // ................
-    00C0: 00 00 00 00 00 14 00 00 0E 00 00 00 9C 00 00 00  // ................
-    00D0: 03 00 00 00 00 00 00 00 00 14 00 00 10 00 00 00  // ................
-    00E0: 38 00 00 00 01 00 00 00 00 00 00 00 00 14 00 00  // 8...............
-    00F0: 10 00 00 00 D8 00 00 00 00 00 00 00 00 00 00 00  // ................
-    0100: 00 14 00 00 0E 00 00 00 EC 00 00 00 04 00 00 00  // ................
+    0040: 24 00 00 00 00 00 00 00 00 00 00 00 01 18 00 00  // $...............
+    0050: 7F 00 00 00 00 00 00 00 00 00 20 00 00 08 00 00  // .......... .....
+    0060: 10 0F 40 00 01 18 00 00 7F 00 00 00 4C 00 00 00  // ..@.........L...
+    0070: 00 80 00 00 80 00 00 00 04 03 40 00 01 18 00 00  // ..........@.....
+    0080: 7F 00 00 00 4C 00 00 00 00 C0 00 00 00 01 00 00  // ....L...........
+    0090: 03 07 40 00 00 1C 00 00 10 00 00 00 38 00 00 00  // ..@.........8...
+    00A0: 00 00 00 00 02 00 00 00 7C 00 00 00 64 00 00 00  // ........|...d...
+    00B0: 00 14 00 00 10 00 00 00 94 00 00 00 00 00 00 00  // ................
+    00C0: 00 00 00 00 00 14 00 00 0E 00 00 00 B0 00 00 00  // ................
+    00D0: 00 00 00 00 00 00 00 00 00 14 00 00 0E 00 00 00  // ................
+    00E0: B0 00 00 00 01 00 00 00 00 00 00 00 00 14 00 00  // ................
+    00F0: 10 00 00 00 94 00 00 00 01 00 00 00 00 00 00 00  // ................
+    0100: 00 14 00 00 0E 00 00 00 EC 00 00 00 02 00 00 00  // ................
     0110: 00 00 00 00 00 14 00 00 0E 00 00 00 EC 00 00 00  // ................
-    0120: 05 00 00 00 00 00 00 00 00 14 00 00 10 00 00 00  // ................
-    0130: D8 00 00 00 01 00 00 00 00 00 00 00 00 14 00 00  // ................
-    0140: 0E 00 00 00 28 01 00 00 06 00 00 00 00 00 00 00  // ....(...........
-    0150: 00 14 00 00 0E 00 00 00 28 01 00 00 07 00 00 00  // ........(.......
-    0160: 00 00 00 00                                      // ....
+    0120: 03 00 00 00 00 00 00 00 01 18 00 00 7F 00 00 00  // ................
+    0130: 00 00 00 00 00 00 20 00 00 08 00 00 10 0F 40 00  // ...... .......@.
+    0140: 01 18 00 00 7F 00 00 00 28 01 00 00 00 80 00 00  // ........(.......
+    0150: 80 00 00 00 04 03 40 00 01 18 00 00 7F 00 00 00  // ......@.........
+    0160: 28 01 00 00 00 C0 00 00 00 01 00 00 03 07 40 00  // (.............@.
+    0170: 00 1C 00 00 10 00 00 00 38 00 00 00 01 00 00 00  // ........8.......
+    0180: 02 00 00 00 58 01 00 00 40 01 00 00 00 14 00 00  // ....X...@.......
+    0190: 10 00 00 00 70 01 00 00 00 00 00 00 00 00 00 00  // ....p...........
+    01A0: 00 14 00 00 0E 00 00 00 8C 01 00 00 04 00 00 00  // ................
+    01B0: 00 00 00 00 00 14 00 00 0E 00 00 00 8C 01 00 00  // ................
+    01C0: 05 00 00 00 00 00 00 00 00 14 00 00 10 00 00 00  // ................
+    01D0: 70 01 00 00 01 00 00 00 00 00 00 00 00 14 00 00  // p...............
+    01E0: 0E 00 00 00 C8 01 00 00 06 00 00 00 00 00 00 00  // ................
+    01F0: 00 14 00 00 0E 00 00 00 C8 01 00 00 07 00 00 00  // ................
+    0200: 00 00 00 00                                      // ....

Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
Message-id: 20260311160609.358-9-alireza.sanaee@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotests/qtest/bios-table-test: testing new ARM ACPI PPTT topology
Alireza Sanaee [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
tests/qtest/bios-table-test: testing new ARM ACPI PPTT topology

Test new PPTT topolopy with cache representation.

Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
Message-id: 20260311160609.358-8-alireza.sanaee@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agohw/acpi: add cache hierarchy to pptt table
Alireza Sanaee [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
hw/acpi: add cache hierarchy to pptt table

Add cache topology to PPTT table.

Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Message-id: 20260311160609.358-7-alireza.sanaee@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agoacpi: Add parameters to pass cache descriptions to ACPI build_pptt()
Alireza Sanaee [Thu, 23 Apr 2026 09:24:10 +0000 (10:24 +0100)] 
acpi: Add parameters to pass cache descriptions to ACPI build_pptt()

Add optional parameters to pass cache descriptions to build_pptt().
Update ARM and Loongarch callers to pass none for now.

Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
Message-id: 20260311160609.358-6-alireza.sanaee@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agobios-tables-test: prepare to change ARM ACPI virt PPTT
Alireza Sanaee [Thu, 23 Apr 2026 09:24:09 +0000 (10:24 +0100)] 
bios-tables-test: prepare to change ARM ACPI virt PPTT

Prepare to update `build_pptt` function to add cache description
functionalities, thus add binaries in this patch.

Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Message-id: 20260311160609.358-5-alireza.sanaee@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agohw/arm/virt: add cache hierarchy to device tree
Alireza Sanaee [Thu, 23 Apr 2026 09:24:09 +0000 (10:24 +0100)] 
hw/arm/virt: add cache hierarchy to device tree

Specify which level (core/cluster/socket) caches found at in the CPU
topology. Updating cache topology to device tree (spec v0.4).
Example:

For example, 2 sockets (packages), and 2 clusters, 4 cores and 2 threads
created, in aggregate 2*2*4*2 logical cores. In the smp-cache object,
cores will have L1d and L1i.  However, extending this is not difficult.
The clusters will share a unified L2 level cache, and finally sockets
will share L3. In this patch, threads will share L1 caches by default,
but this can be adjusted if case required.

Only three levels of caches are supported.  The patch does not
allow partial declaration of caches. In other words, the topology level
of every cache must be specified if that of any level is.

./qemu-system-aarch64 \
    -machine virt,\
         smp-cache.0.cache=l1i,smp-cache.0.topology=core,\
         smp-cache.1.cache=l1d,smp-cache.1.topology=core,\
         smp-cache.2.cache=l2,smp-cache.2.topology=cluster,\
         smp-cache.3.cache=l3,smp-cache.3.topology=socket\
    -cpu max \
    -m 2048 \
    -smp sockets=2,clusters=2,cores=4,threads=1 \
    -kernel ./Image.gz \
    -append "console=ttyAMA0 root=/dev/ram rdinit=/init acpi=force" \
    -initrd rootfs.cpio.gz \
    -bios ./edk2-aarch64-code.fd \
    -nographic

For instance, following device tree will be generated for a scenario
where we have 2 sockets, 2 clusters, 2 cores and 2 threads, in total 16
PEs. L1i and L1d are private to each thread, and L2 and L3 are shared at
socket level as an example.

Limitation: SMT cores cannot share L1 cache for now. This
problem does not exist in PPTT tables.

Co-developed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Message-id: 20260311160609.358-4-alireza.sanaee@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agohw/core/machine: topology functions capabilities added
Alireza Sanaee [Thu, 23 Apr 2026 09:24:09 +0000 (10:24 +0100)] 
hw/core/machine: topology functions capabilities added

Add two functions one of which finds the lowest cache level defined in
the cache description input, and the other checks if a given cache
topology is defined at a particular cache level

Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Message-id: 20260311160609.358-3-alireza.sanaee@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agotarget/arm/tcg: increase cache level for cpu=max
Alireza Sanaee [Thu, 23 Apr 2026 09:24:09 +0000 (10:24 +0100)] 
target/arm/tcg: increase cache level for cpu=max

This patch addresses cache description in the `aarch64_max_tcg_initfn`
function for cpu=max. It introduces three levels of caches and modifies
the cache description registers accordingly.

Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
Message-id: 20260311160609.358-2-alireza.sanaee@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
3 months agoMerge tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging
Stefan Hajnoczi [Wed, 22 Apr 2026 18:30:03 +0000 (14:30 -0400)] 
Merge tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging

UI-related fixes and cleanups

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# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 22 Apr 2026 06:33:19 EDT
# gpg:                using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5
# gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full]
# gpg:                 aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full]
# Primary key fingerprint: 87A9 BD93 3F87 C606 D276  F62D DAE8 E109 7596 9CE5

* tag 'ui-pull-request' of https://gitlab.com/marcandre.lureau/qemu: (40 commits)
  tests: rename the dbus-daemon helper script
  ui/vnc: explicitly link with png
  ui/vnc: remove left-over dead code
  ui/vnc: make vnc_disconnect_finish() private
  ui/vnc: fix vnc_display_init() leak on failure
  ui/keymaps: introduce kbd_layout_free()
  ui/vnc: VncDisplay.id is not const
  ui/vnc: simplify vnc_init_func error handling
  ui/vnc: assert preconditions instead of silently returning
  system: make qemu_del_vm_change_state_handler accept NULL
  util: move datadir.c from system/
  ui/vgafont: add SPDX license header
  ui: avoid duplicating vgafont16 in each translation unit
  ui/console-vc: unify the write path
  ui/console-vc: move vc_put_lf() to VT100 layer as vt100_put_lf()
  ui/console-vc: refactor text_console_resize() into vt100_set_image()
  ui/console-vc: console_scroll() -> vt100_scroll()
  ui/console-vc: move cursor blinking logic into VT100 layer
  ui/console-vc: console_refresh() -> vt100_refresh()
  ui/console-vc: decouple VT100 display updates via function pointer
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
3 months agoMerge tag 'pull-vfio-20260421' of https://github.com/legoater/qemu into staging
Stefan Hajnoczi [Wed, 22 Apr 2026 18:28:47 +0000 (14:28 -0400)] 
Merge tag 'pull-vfio-20260421' of https://github.com/legoater/qemu into staging

vfio queue:

* Refactors vfio code to remove CONFIG_KVM, CONFIG_IOMMU and
  CONFIG_VFIO_IGD, enabling vfio files to be common files
* Extracts KVM-specific helpers and SPAPR KVM code into separate files
* Improves iommufd with dirty tracking support for nesting parent
  HWPT and variable naming cleanup
* Adds VFIO I/O backend capability flags for feature support
* Enhances vfio-user with DEVICE_FEATURE support and DMA protocol fixes

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# gpg: Signature made Tue 21 Apr 2026 12:33:49 EDT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full]
# gpg:                 aka "Cédric Le Goater <clg@kaod.org>" [full]
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* tag 'pull-vfio-20260421' of https://github.com/legoater/qemu:
  vfio-user: fix DMA write reply
  vfio-user: correct protocol for DMA reads/writes
  vfio-user: support VFIO_USER_DEVICE_FEATURE
  vfio: Add VFIO I/O backend capability flags for feature support
  hw/vfio/iommufd: Control dirty tracking for nesting parent HWPT
  iommufd: Rename all the idev and idevc variables to hiod and hiodc
  hw/vfio: all vfio files can now be common files
  hw/vfio/spapr.c: extract vfio_spapr_kvm_attach_tce to hw/vfio/kvm-spapr.c
  hw/vfio/ap.c: use full path for target specific header
  hw/vfio/pci.c: eradicate CONFIG_KVM
  hw/vfio: eradicate CONFIG_IOMMU from sources
  hw/vfio/pci-quirks.c: remove CONFIG_VFIO_IGD
  hw/vfio/helpers.c: extract kvm helpers in kvm-helpers.c
  hw/vfio/listener.c: remove CONFIG_KVM

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
3 months agoMerge tag 'pr-email_update-20260416' of https://gitlab.com/p-b-o/qemu into staging
Stefan Hajnoczi [Wed, 22 Apr 2026 18:26:59 +0000 (14:26 -0400)] 
Merge tag 'pr-email_update-20260416' of https://gitlab.com/p-b-o/qemu into staging

Changes:
- [PATCH v2 0/2] MAINTAINERS: update address and add Hexagon reviewer (Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>)
Link: https://lore.kernel.org/qemu-devel/20260416231455.346504-1-pierrick.bouvier@oss.qualcomm.com
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# gpg: Signature made Thu 16 Apr 2026 19:18:16 EDT
# gpg:                using RSA key 37C15694D8BA9764B1973FDBB44437D19C2862DF
# gpg: Good signature from "Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 37C1 5694 D8BA 9764 B197  3FDB B444 37D1 9C28 62DF

* tag 'pr-email_update-20260416' of https://gitlab.com/p-b-o/qemu:
  MAINTAINERS: add new reviewer for Hexagon target
  MAINTAINERS: update address

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
3 months agoOpen 11.1 development tree
Stefan Hajnoczi [Wed, 22 Apr 2026 18:19:37 +0000 (14:19 -0400)] 
Open 11.1 development tree

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
3 months agotests: rename the dbus-daemon helper script
Marc-André Lureau [Mon, 16 Mar 2026 19:28:28 +0000 (23:28 +0400)] 
tests: rename the dbus-daemon helper script

The following patches are going to use it for qemu-vnc.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/vnc: explicitly link with png
Marc-André Lureau [Mon, 23 Feb 2026 15:25:54 +0000 (16:25 +0100)] 
ui/vnc: explicitly link with png

The VNC code uses PNG directly.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/vnc: remove left-over dead code
Marc-André Lureau [Tue, 7 Apr 2026 12:57:15 +0000 (16:57 +0400)] 
ui/vnc: remove left-over dead code

Since commit 5994dcb8d85 ("ui, monitor: remove deprecated VNC ACL option
and HMP commands"), this field is no longer used.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/vnc: make vnc_disconnect_finish() private
Marc-André Lureau [Tue, 7 Apr 2026 11:23:17 +0000 (15:23 +0400)] 
ui/vnc: make vnc_disconnect_finish() private

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/vnc: fix vnc_display_init() leak on failure
Marc-André Lureau [Tue, 24 Feb 2026 15:05:58 +0000 (16:05 +0100)] 
ui/vnc: fix vnc_display_init() leak on failure

Do not add the display state to the vnc list, if the initialization
failed. Add vnc_display_free(), to free the display state and associated
data in such case. The function is meant to be public and reused in the
following changes.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/keymaps: introduce kbd_layout_free()
Marc-André Lureau [Sat, 4 Apr 2026 14:09:01 +0000 (18:09 +0400)] 
ui/keymaps: introduce kbd_layout_free()

Enable callers to properly tear down keyboard layouts.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/vnc: VncDisplay.id is not const
Marc-André Lureau [Tue, 24 Feb 2026 14:53:57 +0000 (15:53 +0100)] 
ui/vnc: VncDisplay.id is not const

s/strdup/g_strdup to highlight the issue and be consistent with other
allocations.

The next patch is going to introduce vnc_display_free() to take care of
deallocating it.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/vnc: simplify vnc_init_func error handling
Marc-André Lureau [Tue, 24 Feb 2026 14:43:32 +0000 (15:43 +0100)] 
ui/vnc: simplify vnc_init_func error handling

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/vnc: assert preconditions instead of silently returning
Marc-André Lureau [Tue, 24 Feb 2026 15:40:42 +0000 (16:40 +0100)] 
ui/vnc: assert preconditions instead of silently returning

Replace defensive NULL guards with assert() in vnc_display_close()
and vnc_display_open(). These are internal functions whose callers
guarantee non-NULL arguments, so a NULL value would indicate a
programming error rather than a runtime condition.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agosystem: make qemu_del_vm_change_state_handler accept NULL
Marc-André Lureau [Wed, 25 Feb 2026 13:28:33 +0000 (14:28 +0100)] 
system: make qemu_del_vm_change_state_handler accept NULL

For convenience.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoutil: move datadir.c from system/
Marc-André Lureau [Wed, 18 Feb 2026 17:40:50 +0000 (18:40 +0100)] 
util: move datadir.c from system/

The datadir module provides general-purpose data file lookup
utilities that are not specific to system emulation. Move it
to util/ so it can be reused more broadly.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/vgafont: add SPDX license header
Marc-André Lureau [Thu, 12 Mar 2026 14:37:35 +0000 (18:37 +0400)] 
ui/vgafont: add SPDX license header

The vgafont was added without source origin, but it can be traced back
to Linux kernel, which used
GPL-2 (https://github.com/mpe/linux-fullhistory/blob/master/lib/fonts/font_8x16.c).

commit c6f37d0e4feeb264a699eda289d3cc69405100b0
Author: Fabrice Bellard <fabrice@bellard.org>
Date:   Wed Jul 14 17:39:50 2004 +0000

    virtual console

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui: avoid duplicating vgafont16 in each translation unit
Marc-André Lureau [Mon, 23 Feb 2026 14:39:21 +0000 (15:39 +0100)] 
ui: avoid duplicating vgafont16 in each translation unit

vgafont.h defined vgafont16 as a static const array, so every .c file
that included it (via console-priv.h) got its own 4 KiB copy, that
the linker may or not deduplicate?

Move the array definition into a new vgafont.c compilation unit and
turn the header into a proper extern declaration with an include guard.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console-vc: unify the write path
Marc-André Lureau [Thu, 19 Feb 2026 14:07:09 +0000 (15:07 +0100)] 
ui/console-vc: unify the write path

VT100 escape responses (DSR) used qemu_chr_be_write() to write directly
to the chardev backend, bypassing the output FIFO, while keyboard input
went through the FIFO and flush path. This inconsistency could lead to
out-of-order delivery when both paths are active.

Introduce qemu_text_console_write() that pushes data into the output
FIFO and flushes it, and use it for both keyboard input and VT100
responses. Remove the now-unnecessary vc_respond_str() helper. Rename
kbd_send_chars() to qemu_text_console_flush() to better reflect its
purpose.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console-vc: move vc_put_lf() to VT100 layer as vt100_put_lf()
Marc-André Lureau [Thu, 19 Feb 2026 12:50:22 +0000 (13:50 +0100)] 
ui/console-vc: move vc_put_lf() to VT100 layer as vt100_put_lf()

Decouple the line-feed handling from VCChardev by operating on
QemuVT100 directly. The function no longer needs the chardev or
console pointers — callers pass &s->vt instead. This continues the
effort to make the VT100 terminal emulation self-contained.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console-vc: refactor text_console_resize() into vt100_set_image()
Marc-André Lureau [Sun, 22 Feb 2026 18:23:35 +0000 (19:23 +0100)] 
ui/console-vc: refactor text_console_resize() into vt100_set_image()

Decouple the resize logic from QemuTextConsole by operating on
QemuVT100 and taking a pixman_image_t directly, instead of reaching
into the console's scanout surface. The callers now pass the image
explicitly, which makes the VT100 layer independent of the console
object hierarchy.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console-vc: console_scroll() -> vt100_scroll()
Marc-André Lureau [Thu, 19 Feb 2026 11:46:57 +0000 (12:46 +0100)] 
ui/console-vc: console_scroll() -> vt100_scroll()

This decouples glyph rendering from the console object, continuing the
QemuVT100 abstraction introduced in the previous commits.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console-vc: move cursor blinking logic into VT100 layer
Marc-André Lureau [Thu, 19 Feb 2026 21:03:58 +0000 (22:03 +0100)] 
ui/console-vc: move cursor blinking logic into VT100 layer

Maintain a list of QemuVT100 instances so the cursor timer can directly
iterate over them and call vt100_refresh(), instead of going through
qemu_invalidate_text_consoles() which iterated over all consoles
(including graphic ones) and called back into the generic display layer.

This removes the qemu_invalidate_text_consoles() function from
console.c, further decoupling VT100 text rendering from the console
core.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console-vc: console_refresh() -> vt100_refresh()
Marc-André Lureau [Thu, 19 Feb 2026 11:08:13 +0000 (12:08 +0100)] 
ui/console-vc: console_refresh() -> vt100_refresh()

This decouples glyph rendering from the console object, continuing the
QemuVT100 abstraction introduced in the previous commits.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console-vc: decouple VT100 display updates via function pointer
Marc-André Lureau [Thu, 19 Feb 2026 11:39:04 +0000 (12:39 +0100)] 
ui/console-vc: decouple VT100 display updates via function pointer

Replace direct dpy_gfx_update() calls from the VT100 emulation code
with an indirect call through a new image_update function pointer in
QemuVT100. This decouples the VT100 terminal emulation from the
QEMU display layer, allowing different backends to provide their own
image update implementation.

The QemuVT100 typedef is changed to a forward-declared struct so the
function pointer signature can reference QemuVT100 itself.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console-vc: make show_cursor() take vt100
Marc-André Lureau [Thu, 19 Feb 2026 10:59:41 +0000 (11:59 +0100)] 
ui/console-vc: make show_cursor() take vt100

Decouples glyph rendering from the console object,
continuing the QemuVT100 abstraction introduced in the previous commits.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console-vc: make invalidate_xy() take vt100
Marc-André Lureau [Thu, 19 Feb 2026 10:57:14 +0000 (11:57 +0100)] 
ui/console-vc: make invalidate_xy() take vt100

This decouples glyph rendering from the console object, continuing the
QemuVT100 abstraction introduced in the previous commits.

Style fixes.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console-vc: vga_putcharxy()->vt100_putcharxy()
Marc-André Lureau [Thu, 19 Feb 2026 10:40:34 +0000 (11:40 +0100)] 
ui/console-vc: vga_putcharxy()->vt100_putcharxy()

Have the character rendering function operate on QemuVT100 directly
instead of taking a QemuConsole and extracting the VT100 state
internally. This decouples glyph rendering from the console object,
continuing the QemuVT100 abstraction introduced in the previous commits.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console-vc: set vt100 associated pixman image
Marc-André Lureau [Thu, 19 Feb 2026 10:37:59 +0000 (11:37 +0100)] 
ui/console-vc: set vt100 associated pixman image

Start removing dependency on DisplaySurface for vt100 handling.

Note that before, the rendering is done on the current DisplaySurface.
It's not obvious the QemuTextConsole associated surface isn't changed
over time, in particular if it was doing resize. But
qemu_console_resize() is only implemented for QemuGraphicConsole.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console-vc: introduce QemuVT100
Marc-André Lureau [Wed, 18 Feb 2026 22:49:46 +0000 (23:49 +0100)] 
ui/console-vc: introduce QemuVT100

Start moving VT100 emulation specific code in a different structure.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console: dispatch get_label() through QOM virtual method
Marc-André Lureau [Fri, 20 Feb 2026 10:50:50 +0000 (11:50 +0100)] 
ui/console: dispatch get_label() through QOM virtual method

Replace the type-checking chain in qemu_console_get_label() (using
QEMU_IS_GRAPHIC_CONSOLE/QEMU_IS_TEXT_CONSOLE) with a QemuConsoleClass
virtual method, allowing each console subclass to provide its own
get_label implementation.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console-vc: fix comment shift-out/in comments
Marc-André Lureau [Sun, 22 Feb 2026 22:57:41 +0000 (23:57 +0100)] 
ui/console-vc: fix comment shift-out/in comments

14 is shift-out
15 is shift-in

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console-vc: ignore string-type escape sequences
Marc-André Lureau [Thu, 12 Mar 2026 13:35:49 +0000 (17:35 +0400)] 
ui/console-vc: ignore string-type escape sequences

Modern terminals and applications emit OSC (Operating System Command),
DCS, SOS, PM, and APC escape sequences (e.g. for setting window
titles).  The text console currently does not recognise these
string-type introducers, so each byte of the payload is interpreted as
a normal character or a new escape, producing garbage on screen.

Add a TTY_STATE_OSC state that silently consumes all bytes until the
sequence is terminated by BEL or ST (ESC \).

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/console-vc: fix off-by-one in CSI J 2 (clear entire screen)
Marc-André Lureau [Sun, 22 Feb 2026 22:24:16 +0000 (23:24 +0100)] 
ui/console-vc: fix off-by-one in CSI J 2 (clear entire screen)

The loop condition used `y <= s->height` instead of `y < s->height`,
causing vc_clear_xy() to be called with y == s->height. This clears
a row in the scrollback buffer beyond the visible screen.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/vnc-jobs: drop redundant (and needless) qemu_thread_get_self()
Marc-André Lureau [Fri, 13 Mar 2026 19:48:24 +0000 (23:48 +0400)] 
ui/vnc-jobs: drop redundant (and needless) qemu_thread_get_self()

The call is unnecessary, since "thread" is already set at creation time.
Furthermore, the "thread" field is mostly useless as the thread is
created DETACHED and isn't used for anything but perhaps debugging.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/vnc-jobs: narrow taking the queue lock
Marc-André Lureau [Fri, 13 Mar 2026 19:43:39 +0000 (23:43 +0400)] 
ui/vnc-jobs: narrow taking the queue lock

It's not needed unless manipulating the queue.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/vnc-jobs: remove vnc_queue_clear()
Marc-André Lureau [Fri, 13 Mar 2026 19:33:37 +0000 (23:33 +0400)] 
ui/vnc-jobs: remove vnc_queue_clear()

The function was never called, since the worker thread was never
exiting. Also it was incomplete (not clearing pending job list) and
mixing global queue and argument. Let's remove it.

Note: maybe the worker thread could be torn down when vnc_jobs_join()
realizes there is no job left.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/vnc-jobs: remove dead VncJobQueue.exit
Marc-André Lureau [Fri, 13 Mar 2026 19:18:28 +0000 (23:18 +0400)] 
ui/vnc-jobs: remove dead VncJobQueue.exit

Since commit 09526058d0a5 ("ui/vnc: Remove vnc_stop_worker_thread()"),
it's not used anymore. It seems stopping worker thread hasn't been
supported ever.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/vnc-jobs: vnc_has_job_locked() argument cannot be NULL
Marc-André Lureau [Fri, 13 Mar 2026 19:09:08 +0000 (23:09 +0400)] 
ui/vnc-jobs: vnc_has_job_locked() argument cannot be NULL

The only caller, vnc_jobs_join() cannot take vs == NULL argument, or it
would later crash.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/vnc: clarify intent using buffer_empty() function
Marc-André Lureau [Fri, 13 Mar 2026 19:01:39 +0000 (23:01 +0400)] 
ui/vnc: clarify intent using buffer_empty() function

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/vnc-jobs: remove needless buffer_reset() before end
Marc-André Lureau [Fri, 13 Mar 2026 18:56:45 +0000 (22:56 +0400)] 
ui/vnc-jobs: remove needless buffer_reset() before end

vnc_async_encoding_end() does buffer_free() next.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
3 months agoui/clipboard: clear deferred serial reset flag on resume
GuoHan Zhao [Thu, 16 Apr 2026 07:04:03 +0000 (15:04 +0800)] 
ui/clipboard: clear deferred serial reset flag on resume

cb_reset_serial_on_resume defers a clipboard serial reset until the
machine runs again. qemu_clipboard_change_state() performs that reset
on resume, but leaves the flag set.

As a result, every later transition back to RUNNING triggers another
QEMU_CLIPBOARD_RESET_SERIAL notification even when no reset is pending.
That causes unnecessary reset handling in clipboard backends such as
vdagent and dbus.

Clear the deferred flag before resetting so the reset is performed only
once for each deferred request.

Fixes: c967ff606b99 ("ui/clipboard: delay clipboard update when not running")
Signed-off-by: GuoHan Zhao <zhaoguohan@kylinos.cn>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-ID: <20260416070403.1683648-1-zhaoguohan@kylinos.cn>

3 months agoserial COM: windows serial COM PollingFunc don't sleep
Werner de Carne [Mon, 7 Aug 2023 20:14:43 +0000 (22:14 +0200)] 
serial COM: windows serial COM PollingFunc don't sleep

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1802
Signed-off-by: Werner de Carne <werner@carne.de>
[ Marc-André - indentation fixes ]
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-ID: <20230807201443.2668-1-werner@carne.de>

3 months agoui/spice-app: detect runtime directory creation failures
GuoHan Zhao [Wed, 8 Apr 2026 03:17:25 +0000 (11:17 +0800)] 
ui/spice-app: detect runtime directory creation failures

spice_app_display_early_init() creates the per-VM runtime directory
with g_mkdir_with_parents() before setting up the Spice socket. The
code checks for "< -1", but g_mkdir_with_parents() returns -1 on
failure, so the error path is never taken.

This lets spice-app continue after a directory creation failure and
defers the problem to later setup steps.

Check for "< 0" instead so the failure is reported immediately and
spice-app exits before using an invalid runtime directory.

Fixes: d8aec9d9f129 ("display: add -display spice-app launching a Spice client")
Signed-off-by: GuoHan Zhao <zhaoguohan@kylinos.cn>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-ID: <20260408031725.641417-1-zhaoguohan@kylinos.cn>

3 months agoui/input-linux: close evdev fd when qemu_set_blocking fails
GuoHan Zhao [Wed, 8 Apr 2026 02:40:24 +0000 (10:40 +0800)] 
ui/input-linux: close evdev fd when qemu_set_blocking fails

input_linux_complete() opens the evdev node before switching it to
non-blocking mode. If qemu_set_blocking() fails, the function returns
without closing the file descriptor.

The finalize path only closes initialized devices, so this leaks the fd
on an error path.

Jump to err_close when qemu_set_blocking() fails so the descriptor is
released before returning.

Fixes: c7b1172026a0 ("ui: replace qemu_set_nonblock()")
Signed-off-by: GuoHan Zhao <zhaoguohan@kylinos.cn>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-ID: <20260408024024.606222-1-zhaoguohan@kylinos.cn>

3 months agovfio-user: fix DMA write reply
John Levon [Fri, 10 Apr 2026 08:57:16 +0000 (09:57 +0100)] 
vfio-user: fix DMA write reply

The protocol specifies that DMA write replies should include
address+count, but the client code was only doing so for read. Fix that
up.

In addition, add a protocol clarification over how short writes may be
reported in that reply. QEMU never reports a short write via the
count field.

Reported-by: Patrick Mooney <patrick@matx.com>
Signed-off-by: John Levon <john.levon@nutanix.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260410085716.877185-4-john.levon@nutanix.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
3 months agovfio-user: correct protocol for DMA reads/writes
John Levon [Fri, 10 Apr 2026 08:57:15 +0000 (09:57 +0100)] 
vfio-user: correct protocol for DMA reads/writes

The "count" parameter in the DMA write reply should be 8 bytes in size.

Reported-by: Patrick Mooney <patrick@matx.com>
Signed-off-by: John Levon <john.levon@nutanix.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260410085716.877185-3-john.levon@nutanix.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
3 months agovfio-user: support VFIO_USER_DEVICE_FEATURE
John Levon [Fri, 10 Apr 2026 08:57:14 +0000 (09:57 +0100)] 
vfio-user: support VFIO_USER_DEVICE_FEATURE

Plumb through vfio_device_get_feature to the vfio-user server. Note that
we translate EINVAL into ENOTTY, as the existing generic vfio code is
expecting the latter to mean "unsupported".

As part of adding a trace point, clean up the trace file.

Signed-off-by: John Levon <john.levon@nutanix.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260410085716.877185-2-john.levon@nutanix.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
3 months agovfio: Add VFIO I/O backend capability flags for feature support
Cédric Le Goater [Thu, 9 Apr 2026 11:43:12 +0000 (13:43 +0200)] 
vfio: Add VFIO I/O backend capability flags for feature support

Different VFIO I/O backends support different features. For example,
the kernel VFIO backend supports DMA-BUF creation, while vfio-user
does not. Currently, this is handled by attempting the operation and
checking for -ENOTTY, which can lead to misleading warnings when a
feature is simply not supported by a particular backend.

Introduce a capability flags mechanism in VFIODeviceIOOps that allows
backends to explicitly advertise which features they support. Callers
can check these capabilities before attempting operations, avoiding
spurious errors and warnings.

Cc: John Levon <john.levon@nutanix.com>
Reviewed-by: John Levon <john.levon@nutanix.com>
Link: https://lore.kernel.org/qemu-devel/20260409114312.1704062-1-clg@redhat.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
3 months agohw/vfio/iommufd: Control dirty tracking for nesting parent HWPT
Shameer Kolothum [Wed, 1 Apr 2026 08:41:33 +0000 (09:41 +0100)] 
hw/vfio/iommufd: Control dirty tracking for nesting parent HWPT

QEMU smmuv3 accel does not support live migration yet, so dirty
tracking for the nesting parent HWPT is not useful.

Also, nested vIOMMU use cases can break on some platforms. For
example, SMMUv3 with HTTU may advertise dirty tracking capability,
but the kernel supports it only for stage-1. Requesting dirty
tracking for a nesting parent HWPT (stage-2) can fail.

Add a vIOMMU flag to explicitly request dirty tracking for the
nesting parent HWPT. For nested cases, dirty tracking is enabled
only when requested by the vIOMMU.

Non-nested cases and Intel vIOMMU keep the existing behavior.

Fixes: fc6dafb98cec ("hw/arm/smmuv3: Implement get_viommu_cap() callback")
Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com>
Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Link: https://lore.kernel.org/qemu-devel/20260401084133.56266-1-skolothumtho@nvidia.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
3 months agoiommufd: Rename all the idev and idevc variables to hiod and hiodc
Zhenzhong Duan [Wed, 1 Apr 2026 08:03:53 +0000 (04:03 -0400)] 
iommufd: Rename all the idev and idevc variables to hiod and hiodc

We used idev and idevc naming for HostIOMMUDeviceIOMMUFD and corresponding
class variables which followed the iommufd_device naming in linux kernel.

This is mixed with the hiod naming for base type HostIOMMUDevice. Rename
HostIOMMUDeviceIOMMUFD* to hiodi* for consistency in QEMU.

No functional change intended.

Suggested-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260401080354.1347212-1-zhenzhong.duan@intel.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
3 months agohw/vfio: all vfio files can now be common files
Pierrick Bouvier [Wed, 18 Mar 2026 17:47:33 +0000 (10:47 -0700)] 
hw/vfio: all vfio files can now be common files

Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Tested-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20260318174733.1717643-9-pierrick.bouvier@linaro.org
Signed-off-by: Cédric Le Goater <clg@redhat.com>
3 months agohw/vfio/spapr.c: extract vfio_spapr_kvm_attach_tce to hw/vfio/kvm-spapr.c
Pierrick Bouvier [Wed, 18 Mar 2026 17:47:32 +0000 (10:47 -0700)] 
hw/vfio/spapr.c: extract vfio_spapr_kvm_attach_tce to hw/vfio/kvm-spapr.c

Since this function needs kvm specific types, we need to extract in
another file and link it only for KVM builds.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/qemu-devel/20260318174733.1717643-8-pierrick.bouvier@linaro.org
Signed-off-by: Cédric Le Goater <clg@redhat.com>
3 months agohw/vfio/ap.c: use full path for target specific header
Pierrick Bouvier [Wed, 18 Mar 2026 17:47:31 +0000 (10:47 -0700)] 
hw/vfio/ap.c: use full path for target specific header

In addition, we fix target/s390x/kvm/kvm_s390x.h cpu-qom include also.

Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Tested-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/qemu-devel/20260318174733.1717643-7-pierrick.bouvier@linaro.org
Signed-off-by: Cédric Le Goater <clg@redhat.com>
3 months agohw/vfio/pci.c: eradicate CONFIG_KVM
Pierrick Bouvier [Wed, 18 Mar 2026 17:47:30 +0000 (10:47 -0700)] 
hw/vfio/pci.c: eradicate CONFIG_KVM

We just need to add kvm_enabled() guard when calling concerned
functions, but no need to extract those kvm functions since they are not
using any kvm specific types that would not be visible at compilation
time.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/qemu-devel/20260318174733.1717643-6-pierrick.bouvier@linaro.org
Signed-off-by: Cédric Le Goater <clg@redhat.com>
3 months agohw/vfio: eradicate CONFIG_IOMMU from sources
Pierrick Bouvier [Wed, 18 Mar 2026 17:47:29 +0000 (10:47 -0700)] 
hw/vfio: eradicate CONFIG_IOMMU from sources

This commit removes usage of CONFIG_IOMMU in hw/vfio sources, exposing
inconditionally iommufd related properties, which are declared
statically (in const arrays). The alternative to expose them dynamically
is more complex and requires boilerplate to set properties at runtime,
with set_* callbacks and added logic to check if iommufd backend is
available, with no obvious benefit.

One possible difference is that user may see a different error message
when trying to attach a vfio device with a QEMU not supporting iommufd,
without declaring iommufd object associated.

Instead of:
```
$ qemu-system-* -device vfio-pci,host=0000:01:00.0,iommufd=iommufd0
qemu-system-*: -device vfio-pci,host=0000:01:00.0,iommufd=iommufd0: Property 'vfio-pci.iommufd' not found
```
User will now see:
```
qemu-system-aarch64: -device vfio-pci,host=0000:01:00.0,iommufd=iommufd0: Device 'iommufd0' not found
```

However, since declaring the iommufd object is needed, error reported
before and after is still the same:
```
$ qemu-system-* -object iommufd,id=iommufd0 -device vfio-pci,host=0000:01:00.0,iommufd=iommufd0
qemu-system-*: invalid object type: iommufd
```

Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/qemu-devel/20260318174733.1717643-5-pierrick.bouvier@linaro.org
Signed-off-by: Cédric Le Goater <clg@redhat.com>
3 months agohw/vfio/pci-quirks.c: remove CONFIG_VFIO_IGD
Pierrick Bouvier [Wed, 18 Mar 2026 17:47:28 +0000 (10:47 -0700)] 
hw/vfio/pci-quirks.c: remove CONFIG_VFIO_IGD

Add stubs for needed functions.

vfio_pci_hot_reset_info must be forwarded declared on non linux platforms:
In file included from ../hw/vfio/igd-stubs.c:9:
../hw/vfio/pci.h:265:44: error: 'struct vfio_pci_hot_reset_info' declared inside parameter list will not be visible outside of this definition or declaration [-Werror]
  265 |                                     struct vfio_pci_hot_reset_info **info_p);
      |

Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Tested-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/qemu-devel/20260318174733.1717643-4-pierrick.bouvier@linaro.org
Signed-off-by: Cédric Le Goater <clg@redhat.com>
3 months agohw/vfio/helpers.c: extract kvm helpers in kvm-helpers.c
Pierrick Bouvier [Wed, 18 Mar 2026 17:47:27 +0000 (10:47 -0700)] 
hw/vfio/helpers.c: extract kvm helpers in kvm-helpers.c

Because those functions use kvm specific types, they need to be isolated
in another source file.
This allows us to link kvm-helpers only in configurations with
CONFIG_KVM.

Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Tested-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link: https://lore.kernel.org/qemu-devel/20260318174733.1717643-3-pierrick.bouvier@linaro.org
Signed-off-by: Cédric Le Goater <clg@redhat.com>