Alex Bennée [Thu, 26 Feb 2026 18:53:00 +0000 (18:53 +0000)]
tests/vm: fix interactive boot
For reasons still not clear to me passing the single dashed
-interactive would confuse the argument parsing enough we tried to
pass "nterative" as a string to the launch command causing failure and
head scratching.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20260226185303.1920021-6-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Alex Bennée [Thu, 26 Feb 2026 18:52:57 +0000 (18:52 +0000)]
tests/docker: migrate legacy-test-cross compilers to trixie
The bugs have evidently been fixed in the latest release so we can
migrate the laggards into how all-test-cross container and remove the
legacy hacks. They are also packaged for the main architectures so we
don't need to jump through the amd64 hoops.
Suggested-by: John Snow <jsnow@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20260226185303.1920021-3-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
John Snow [Thu, 26 Feb 2026 18:52:56 +0000 (18:52 +0000)]
tests/docker: upgrade most non-lcitool debian tests to debian 13
Debian 11 was EOL in 2024, and Debian 12 will be EOL this June. This
patch moves all but one of our tests, debian-legacy-test-cross, onto
Debian 13.
This patch does the bare minimum to upgrade these tests and doesn't make
any attempt at optimization or cleanup that may or may not be possible
with this upgrade.
Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
[AJB: tweak summary line]
Message-ID: <20260226185303.1920021-2-alex.bennee@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Alexander Graf [Wed, 25 Feb 2026 22:08:01 +0000 (22:08 +0000)]
target/arm/cpu64: Allow -host for nitro
The nitro accel does not actually make use of CPU emulation or details:
It always uses the host CPU regardless of configuration. Machines for
the nitro accel select the host CPU type as default to have a clear
statement of the above and to have a unified cpu type across all
supported architectures.
The arm64 logic on Linux currently only allows -cpu host for KVM based
virtual machines. Add a special case for nitro so that when the nitro
accel is active, it allows use of the host cpu type.
Nitro Enclaves expect the parent instance to host a vsock heartbeat listener
at port 9000. To host a Nitro Enclave with the nitro accel in QEMU, add
such a heartbeat listener as device model, so that the machine can
easily instantiate it.
Nitro Enclaves support a special "debug" mode. When in debug mode, the
Nitro Hypervisor provides a vsock port that the parent can connect to to
receive serial console output of the Enclave. Add a new nitro-serial-vsock
driver that implements short-circuit logic to establish the vsock
connection to that port and feed its data into a chardev, so that a machine
model can use it as serial device.
Alexander Graf [Wed, 25 Feb 2026 22:07:58 +0000 (22:07 +0000)]
accel: Add Nitro Enclaves accelerator
Nitro Enclaves are a confidential compute technology which
allows a parent instance to carve out resources from itself
and spawn a confidential sibling VM next to itself. Similar
to other confidential compute solutions, this sibling is
controlled by an underlying vmm, but still has a higher level
vmm (QEMU) to implement some of its I/O functionality and
lifecycle.
Add an accelerator to drive this interface. In combination with
follow-on patches to enhance the Nitro Enclaves machine model, this
will allow users to run a Nitro Enclave using QEMU.
Alexander Graf [Wed, 25 Feb 2026 22:07:57 +0000 (22:07 +0000)]
hw/nitro: Add Nitro Vsock Bus
Add a dedicated bus for Nitro Enclave vsock devices. In Nitro Enclaves,
communication between parent and enclave/hypervisor happens almost
exclusively through vsock. The nitro-vsock-bus models this dependency
in QEMU, which allows devices in this bus to implement individual services
on top of vsock.
The nitro machine spawns this bus by creating the included
nitro-vsock-bridge sysbus device.
The nitro accel then advertises the Enclave's CID to the bus by calling
nitro_vsock_bridge_start_enclave() on the bridge device as soon as it
knows the CID.
Nitro vsock devices can listen to that event and learn the Enclave's CID
when it is available to perform actions, such as connect to the debug
serial vsock port.
Alexander Graf [Wed, 25 Feb 2026 22:07:56 +0000 (22:07 +0000)]
linux-headers: Add nitro_enclaves.h
QEMU is learning to drive the /dev/nitro_enclaves device node. Include
its UAPI header into our local copy of kernel headers so it has all
defines we need to drive it.
We want to enable QEMU to drive the /dev/nitro_enclaves device node. Add
its UAPI header into our kernel sync so we have all defines we need to
drive it.
Maxim Levitsky [Mon, 23 Feb 2026 22:19:08 +0000 (17:19 -0500)]
accel/kvm: Don't clear pending #SMI in kvm_get_vcpu_events
The kvm_get_vcpu_events propogates the state of the pending smi
from the kernel to the cpu->interrupt_request, with the intention
of having un up to date migration state.
Later the opposite is done, the kvm_put_vcpu_events restores the state
of the pending #SMI from the 'cs->interrupt_request'
The only problem is that kvm_get_vcpu_events also resets the SMI
in cpu->interrupt_request when there is no pending #SMI indicated by the kernel,
and that is wrong as the SMI might be still raised by qemu.
While at it, also fix a similar but more theoretical bug with regard to a
latched #INIT while in SMM.
A simple reproducer for this bug is to read an EFI variable in a loop
from within a guest, while at the same time run 'info registers' on
the qemu HMP monitor.
The reads will, once in a while, fail with an 'Invalid argument' error.
Mohamed Mediouni [Mon, 23 Feb 2026 23:39:41 +0000 (00:39 +0100)]
target/i386: emulate, hvf, mshv: rework MMU code
target/i386/emulate doesn't currently properly emulate instructions
which might cause a page fault during their execution. Notably, REP STOS/MOVS
from MMIO to an address which is unmapped until a page fault exception is raised
causes an abort() in vmx_write_mem.
Change the interface between the HW accel backend and target/i386/emulate as a first step towards addressing that.
Adapt the page table walker code to give actionable errors,
while leaving a possibility for backends to provide their own walker.
This removes the usage of the Hyper-V page walker in the mshv backend.
Bernhard Beschow [Mon, 23 Feb 2026 23:39:25 +0000 (00:39 +0100)]
target/i386/emulate/x86_decode: Actually use stream in decode_instruction_stream()
Compared to decode_instruction(), decode_instruction_stream() has an additional
stream parameter which avoids some guest memory accesses during instruction
decoding. Both functions defer the actual work to decode_opcode() which would
set the stream pointer to zero such that decode_instruction_stream() essentially
behaved like decode_instruction(). Given that all callers of
decode_instruction_stream() properly zero-initialize the decode parameter, the
memset() call can be moved into decode_instruction() which is the only other
user of decode_opcode(). This preserves the non-zero stream pointer which
avoids extra guest memory accesses.
Fixes: 1e25327b244a ("target/i386/emulate: Allow instruction decoding from stream")
cc: qemu-stable Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Mohamed Mediouni <mohamed@unpredictable.fr> Reviewed-by: Wei Liu (Microsoft) <wei.liu@kernel.org> Tested-by: Magnus Kulke <magnuskulke@linux.microsoft.com> Link: https://lore.kernel.org/r/20260223233950.96076-4-mohamed@unpredictable.fr Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Bernhard Beschow [Mon, 23 Feb 2026 23:39:24 +0000 (00:39 +0100)]
target/i386/hvf/x86_mmu: Fix compiler warning
When reusing the code in WHPX, GCC emits the following warning when compiling
for i386-softmmu under MSYS2:
In file included from ../src/target/i386/emulate/x86_mmu.c:20:
../src/target/i386/emulate/x86_mmu.c: In function 'vmx_write_mem':
../src/target/i386/emulate/x86_mmu.c:251:25: error: format '%llx' expects argument of type 'long long unsigned int', but argument 3 has type 'target_ulong' {aka 'unsigned int'} [-Werror=format=]
251 | VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~
| |
| target_ulong {aka unsigned int}
../src/target/i386/emulate/panic.h:34:12: note: in definition of macro 'VM_PANIC_EX'
34 | printf(__VA_ARGS__); \
| ^~~~~~~~~~~
../src/target/i386/emulate/x86_mmu.c:251:48: note: format string is defined here
251 | VM_PANIC_EX("%s: mmu_gva_to_gpa %llx failed\n", __func__, gva);
| ~~~^
| |
| long long unsigned int
| %x
Fix the warning by reusing the target-specific macro TARGET_FMT_lx which exists
for this exact purpose.
Fixes: c97d6d2cdf97 ("i386: hvf: add code base from Google's QEMU repository")
cc: qemu-stable Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Mohamed Mediouni <mohamed@unpredictable.fr> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Wei Liu (Microsoft) <wei.liu@kernel.org> Link: https://lore.kernel.org/r/20260223233950.96076-3-mohamed@unpredictable.fr Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
When compiling for i386-softmmu under MSYS2, GCC emits the following warning:
In function 'get_reg_val',
inlined from 'calc_modrm_operand64' at ../src/target/i386/emulate/x86_decode.c:1796:15:
../src/target/i386/emulate/x86_decode.c:1703:5: error: 'memcpy' forming offset [4, 7] is out of the bounds [0, 4] of object 'val' with type 'target_ulong' {aka 'unsigned int'} [-Werror=array-bounds=]
1703 | memcpy(&val,
| ^~~~~~~~~~~~
1704 | get_reg_ref(env, reg, rex_present, is_extended, size),
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1705 | size);
| ~~~~~
../src/target/i386/emulate/x86_decode.c: In function 'calc_modrm_operand64':
../src/target/i386/emulate/x86_decode.c:1702:18: note: 'val' declared here
1702 | target_ulong val = 0;
| ^~~
In the calc_modrm_operand64() case the compiler sees size == 8 to be mem-copied
to a target_ulong variable which is only 4 bytes wide in case of i386-softmmu.
Note that when size != 1, get_reg_ref() always returns a pointer to an 8 byte
register, regardless of the target_ulong size. Fix the compiler warning by
always providing 8 bytes of storage by means of uint64_t.
Fixes: 77a2dba45cc9 ("target/i386/emulate: stop overloading decode->op[N].ptr")
cc: qemu-stable Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Mohamed Mediouni <mohamed@unpredictable.fr> Reviewed-by: Wei Liu (Microsoft) <wei.liu@kernel.org> Link: https://lore.kernel.org/r/20260223233950.96076-2-mohamed@unpredictable.fr Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reading the kernel disassembly shows that RDI should contain the value
of a valid kernel stack address here (0xff5eeb3240003e54). Instead it
contains 0x40003e54, suggesting the hypervisor cleared the upper 32
bits.
And indeed, Alexey discovered that QEMU's vmmouse_get_data() and
vmmouse_set_data() are only saving/restoring the lower 32 bits, while
clearing the upper 32. Fix that by changing the type of the saved data
array from uint32_t to uint64_t.
Fixes: 548df2acc6fc ("VMMouse Emulation, by Anthony Liguori.") Reported-by: Justin Forbes <jforbes@fedoraproject.org> Debugged-by: Alexey Makhalov <alexey.makhalov@broadcom.com> Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Link: https://lore.kernel.org/r/c508fc1d4a4ccd8c9fb1e51b71df089e31115a53.1770309998.git.jpoimboe@kernel.org Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3293 Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Peter Maydell [Thu, 26 Feb 2026 16:00:07 +0000 (16:00 +0000)]
Merge tag 'pull-target-arm-20260226' of https://gitlab.com/pm215/qemu into staging
target-arm queue:
* target/arm: set the correct TI bits for WFIT traps
* target/arm: Refactorings preparatory to KVM SME support
* target/arm/kvm: Don't free migration-blocker reason on failure
* target/arm/kvm: add kvm-psci-version vcpu property
* Revert "target/arm/hvf: Sync CNTV_CTL_EL0 & CNTV_CVAL_EL0"
* hw/arm/virt: Add virtio-mmio-transports property
* hw/arm/virt: Update error message for bad gic-version option
* hw/cpu: Build a15mpcore.c once as common object
* hw/misc/allwinner-cpucfg: Remove use of ARM_CPU() cast macro
* hw/ssi/xilinx_spips: Reset TX FIFO in reset
* hw/char/pl011: Only log "data written to disabled UART" once
* tests/functional: Make sure test case .py files are executable
* tag 'pull-target-arm-20260226' of https://gitlab.com/pm215/qemu:
hw/char/pl011: Only log "data written to disabled UART" once
target/arm/kvm: Don't free migration-blocker reason on failure
target/arm: Add have_ffr argument to kvm_arch_{get, put}_sve
target/arm: Add vq argument to kvm_arch_{get, put}_sve
target/arm: Drop kvm_arm_pmu_supported
target/arm: Remove kvm test in arm_set_pmu
target/arm: Drop kvm_arm_sve_supported
target/arm: Move kvm test out of cpu_arm_set_sve
target/arm: Init sve_vq in kvm_arm_set_cpu_features_from_host
target/arm: Move kvm_arm_sve_get_vls within kvm.c
target/arm: Remove aarch64 test for kvm
hw/misc/allwinner-cpucfg: Remove use of ARM_CPU() cast macro
hw/cpu: Build a15mpcore.c once as common object
Revert "target/arm/hvf: Sync CNTV_CTL_EL0 & CNTV_CVAL_EL0"
target/arm/kvm: add kvm-psci-version vcpu property
tests/functional: Make sure test case .py files are executable
hw/arm/virt: Update error message for bad gic-version option
hw/arm/virt: Add virtio-mmio-transports property
target/arm: set the correct TI bits for WFIT traps
hw/ssi/xilinx_spips: Reset TX FIFO in reset
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 26 Feb 2026 11:10:01 +0000 (11:10 +0000)]
scripts/coverity: Drop --enable-libnfs from configure
The environment we do our coverity build in (amd64-fedora-container)
has just upgraded to Fedora 43. This ships with libnfs version
16.2.0. We can't currently build against that: in commit e2d98f257138 we added a requirement to meson.build that libnfs be <
6.0.0, because of an upstream API change that we haven't yet updated
block/nfs.c to handle.
The result is that the coverity CI job currently fails in
configure:
Dependency libnfs found: NO. Found 16.2.0 but need: '<6.0.0' ;
matched: '>=1.9.3'
Run-time dependency libnfs found: NO
../meson.build:1150:11: ERROR: Dependency lookup for libnfs with
method 'pkgconfig' failed: Invalid version, need 'libnfs' ['<6.0.0']
found '16.2.0'.
Fix the coverity builds by dropping --enable-libnfs. This means we
will no longer have coverage of block/nfs.c until/unless we do
that update to handle the new libnfs API.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20260226111001.1021810-1-peter.maydell@linaro.org
John Snow [Wed, 25 Feb 2026 19:12:55 +0000 (14:12 -0500)]
configure: allow PyPI access for python 'tooling' dependencies
We actually do not allow our meson requirements to be fetched online
because we strictly prefer the vendored version. Move the tooling group
installation to a different invocation that does allow PyPI to be
accessed when configure is run without explicitly disabling PyPI access.
This will allow QEMU to download and install python3-wheel for you if
you don't have it in your host environment.
Reported-by: Kevin Wolf <kwolf@redhat.com> Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Tested-by: Thomas Huth <thuth@redhat.com>
Message-id: 20260225191255.955585-1-jsnow@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 26 Feb 2026 11:27:19 +0000 (11:27 +0000)]
hw/char/pl011: Only log "data written to disabled UART" once
We log a GUEST_ERROR message "PL011 data written to disabled UART" if
the guest writes data to the TX FIFO when it has not set the enable
bit in the UART. The idea is to note that the guest has done
something dubious but let it work anyway. However, since we print
this message for every output character, it floods the logs when
running a guest that does this.
Keep a note of whether we've printed the log message or not, so we
only output it once. If the guest actively disables the UART, we
re-arm the log message.
Notably, the Linux kernel does not bother to enable the UART if it is
used for earlycon, relying on the firmware having already done that.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Mohamed Mediouni <mohamed@unpredictable.fr>
Message-id: 20260210101702.3980804-1-peter.maydell@linaro.org
Peter Maydell [Thu, 26 Feb 2026 11:27:19 +0000 (11:27 +0000)]
target/arm/kvm: Don't free migration-blocker reason on failure
The migrate_add_blocker() function documents that if it fails it will
free the Error it is passed via its reasonp argument and set reasonp
to NULL. That means that in kvm_arm_enable_mte() we don't need to
call error_free(mte_migration_blocker) in the failure codepath.
Doing so is harmless because error_free(NULL) is permitted and does
nothing, but we can remove the unnecessary code.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-id: 20260223173232.453165-1-peter.maydell@linaro.org
target/arm: Add have_ffr argument to kvm_arch_{get, put}_sve
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-12-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm: Add vq argument to kvm_arch_{get, put}_sve
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-11-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This function has only one use, so inline it and drop the stubs.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-9-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
In kvm_arm_get_host_cpu_features, we only set ARM_FEATURE_PMU if
kvm_arm_pmu_supported. In arm_cpu_post_init we only register the
"pmu" property if ARM_FEATURE_PMU. Therefore, if kvm is enabled,
we can only arrive in arm_set_pmu if kvm_arm_pmu_supported.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-8-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This function has only one real use, so inline it and
drop the stubs.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-7-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Introduce a set of stub property callbacks for when we really
don't want to be able to enable SVE. Register the real or stub
funtions in aarch64_add_sve_properties depending on whether or
not SVE is available.
Adjust aarch64_a64fx_initfn to initialize the set of supported
vector sizes before calling aarch64_add_sve_properties.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-6-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm: Init sve_vq in kvm_arm_set_cpu_features_from_host
Probe for SVE vector sizes with the same scratch vm that
we use for probing other features. Remove a separate
initialization path in arm_cpu_sve_finalize.
Unexport kvm_arm_sve_get_vls.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Prepare to adjust the invocation point and visibility.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
We no longer support kvm for aarch32, therefore the aarch64
test is trivially true.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20260216034432.23912-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/misc/allwinner-cpucfg: Remove use of ARM_CPU() cast macro
allwinner_cpucfg_cpu_reset() doesn't access ARM CPU internal
fields: no need to cast, pass a generic CPU pointer along.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20260225034720.41495-1-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
a15mpcore.c doesn't need to include the target-specific 'kvm_arm.h'
header, it only lacks the qemu_get_cpu() declaration which comes
from 'hw/core/cpu.h'. Include the latter and build as common object.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20260225034451.41338-1-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Provide a kvm specific vcpu property to override the default
(as of kernel v6.13 that would be PSCI v1.3) PSCI version emulated
by kvm. Current valid values are: 0.1, 0.2, 1.0, 1.1, 1.2, and 1.3
Note: in order to support PSCI v0.1 we need to drop vcpu
initialization with KVM_CAP_ARM_PSCI_0_2 in that case.
Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Sebastian Ott <sebott@redhat.com>
Message-id: 20260220115656.4831-2-sebott@redhat.com
[PMM: adjust sscanf to not permit negative numbers] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 26 Feb 2026 11:27:18 +0000 (11:27 +0000)]
tests/functional: Make sure test case .py files are executable
The top-level test python scripts in tests/functional are supposed to
be marked executable; "make check-functional" doesn't care about
this, but it allows them to be run as standalone executables to
exercise a single test, as docs/devel/testing/functional.rst
describes.
A couple of files have got into the tree without the executable
bit set: fix them.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20260212151258.1750268-1-peter.maydell@linaro.org
Peter Maydell [Thu, 26 Feb 2026 11:27:18 +0000 (11:27 +0000)]
hw/arm/virt: Update error message for bad gic-version option
As we added different valid gic-version option settings,
we forgot to update the hint in the error message produced
when the user specifies an invalid value:
$ qemu-system-aarch64 -M virt,help | grep gic-version
gic-version=<string> - Set GIC version. Valid values are 2, 3, 4, host and max
$ qemu-system-aarch64 -M virt,gic-version=bang
qemu-system-aarch64: Invalid gic-version value
Valid values are 3, 2, host, max.
Update the error string to match the one we use in the help text
for the option.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Mohamed Mediouni <mohamed@unpredictable.fr> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20260219110228.3804482-1-peter.maydell@linaro.org
Windows ARM64 guests detect virtio-mmio devices declared in ACPI
tables even when no backend is attached. This causes "Unknown
devices" (ACPI\LNRO0005) to appear in Device Manager.
Until Windows fixes that by supporting, add a new machine
property 'virtio-mmio-transports' to control the number of
virtio-mmio transports instantiated. The default remains
NUM_VIRTIO_TRANSPORTS (32) for backward compatibility.
Setting it to 0 allows users to disable virtio-mmio entirely.
Usage: -machine virt,virtio-mmio-transports=0
Signed-off-by: Mohammadfaiz Bawa <mbawa@redhat.com>
Message-id: 20260219173256.152743-1-mbawa@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Weixie Cui [Thu, 26 Feb 2026 11:27:18 +0000 (11:27 +0000)]
hw/ssi/xilinx_spips: Reset TX FIFO in reset
In xilinx_spips_reset() and xlnx_zynqmp_qspips_reset() a cut and
paste error meant we reset the RX FIFO twice and the TX FIFO not at
all. Correct this to reset both FIFOs.
Cc: qemu-stable@nongnu.org Signed-off-by: Weixie Cui <cuiweixie@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20260223095905.67709-1-cuiweixie@gmail.com
[Rewrote commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Thu, 26 Feb 2026 09:33:12 +0000 (09:33 +0000)]
Merge tag 'single-binary-20260226' of https://github.com/philmd/qemu into staging
Various patches related to single binary effort:
- Remove TARGET_PHYS_ADDR_SPACE_BITS definition
- Remove MonitorDef register entries already provided by gdbstub XML
- Remove gdbstub ldtul*() macros
- Build various gdbstub.c files once
- Make qemu_arch_available() and page-vary common code
* tag 'single-binary-20260226' of https://github.com/philmd/qemu: (70 commits)
page-vary: Build migration_legacy_page_bits as common code
page-vary: Build finalize_target_page_bits as common code
page-vary: Build set_preferred_target_page_bits as common code
target-info: Move TARGET_PAGE_BITS sanity check
target-info: Add page_bits_{init,vary}
page-vary: Expose TARGET_PAGE_BITS_MIN definition
meson: don't access 'cxx' object without checking cpp lang
system: Reduce 'arch_init.h' scope
system: Make qemu_arch_available() common code
hw/scsi/disk: Prefer target_s390x() over qemu_arch_available()
qemu/target_info: Add target_s390x() helper
qemu: Document qemu_arch_available() method
target/m68k: clean-up includes in cpu.c
target/tricore: Build 'gdbstub.c' once for system single binary
target/s390x: Build 'gdbstub.c' once for system single binary
target/rx: Build 'gdbstub.c' once for system single binary
target/m68k: Build 'gdbstub.c' once for system single binary
target/loongarch: Build 'gdbstub.c' once for system single binary
target/avr: Build 'gdbstub.c' once for system single binary
target/alpha: Build 'gdbstub.c' once for system single binary
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
page-vary: Build migration_legacy_page_bits as common code
Use target_info->page_bits_init to implement
migration_legacy_page_bits. Because this is the last
function within the file, rename page-vary-target.c
to page-vary-system.c and build once for system mode.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260217095106.598486-7-richard.henderson@linaro.org>
[PMD: Update MAINTAINERS] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
page-vary: Build set_preferred_target_page_bits as common code
Use target_info->page_bits_vary to merge
set_preferred_target_page_bits_common into
set_preferred_target_page_bits in page-vary-common.c.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260217095106.598486-5-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Move the check from page-vary-target.c to target-info-stub.c,
in the process of removing page-vary-target.c entirely.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260217095106.598486-4-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Add two fields that will hold TARGET_PAGE_BITS,
TARGET_PAGE_BITS_VARY, TARGET_PAGE_BITS_LEGACY.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260217095106.598486-3-richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
meson: don't access 'cxx' object without checking cpp lang
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-ID: <20260210173355.776365-1-berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Remove the need of per-target QEMU_ARCH. Define the
QEMU_ARCH_* constants based on SYS_EMU_TARGET_* ones,
themselves already exposed via target_arch(), allowing
to check the current target is included in @arch_bitmask.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20260213175032.32121-5-philmd@linaro.org>
hw/scsi/disk: Prefer target_s390x() over qemu_arch_available()
qemu_arch_available() is used to check if a broadly available
feature should be exposed to a particular set of target
architectures. Here we only want to check something that is
specific to s390x: the target_s390x() helper is more adapted.
Besides, it will allow to reduce qemu_arch_available() scope.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20260213175032.32121-4-philmd@linaro.org>
Alex Bennée [Thu, 19 Feb 2026 17:17:57 +0000 (17:17 +0000)]
target/m68k: clean-up includes in cpu.c
We don't need translation-block.h as the TB flags are local and the
only bits needed come from cpu-ops.h. The vmstate is a system only
concerns so we can guard against including it for linux-user.
Finally tidy up the order to keep things together with the local cpu.h
kept at the end.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20260219171810.602667-2-alex.bennee@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
target/tricore: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-tricore binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-50-philmd@linaro.org>
target/s390x: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-s390x binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-49-philmd@linaro.org>
target/rx: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-rx binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-48-philmd@linaro.org>
target/m68k: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-m68k binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-47-philmd@linaro.org>
target/loongarch: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-loongarch64 binary, but by
moving 'gdbstub.c' in the target_common_system_arch[] source
set the resulting object can be linked into a single qemu-sytem
binary.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-46-philmd@linaro.org>
target/avr: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-avr binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-45-philmd@linaro.org>
target/alpha: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-alpha binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-44-philmd@linaro.org>
target/or1k: Build 'gdbstub.c' once for system single binary
There is a single qemu-system-or1k binary, but by moving
'gdbstub.c' in the target_common_system_arch[] source set
the resulting object can be linked into a single qemu-sytem
binary.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-43-philmd@linaro.org>
projects / thirdparty / qemu.git / log
