arm: mach-k3: common: fix compile warnings with PHYS_64BIT on 32bit
Use uintptr_t instead of phys_addr_t where appropriate, so passing the
addresses to writel() doesn't result in compile warnings when PHYS_64BIT
is set for 32bit builds (which is actually a useful configuration, as
the K3 SoC family boots from an R5 SPL, which may pass bank information
based on gd->bd->bi_dram to fdt_fixup_memory_banks() etc., so PHYS_64BIT
is needed for fixing up the upper bank).
Tom Rini [Thu, 21 Sep 2023 23:32:48 +0000 (19:32 -0400)]
exynos: Cleanup exynos_init
- None of the callers perform error checking and based on the non-empty
versions of this function, there's no checking to be done, so make
this a void.
- Add a default weak version of the function.
- Remove the empty versions of exynos_init now that we have a weak
version.
Tom Rini [Thu, 21 Sep 2023 23:32:47 +0000 (19:32 -0400)]
board: Remove essentially empty board files and Makefiles
As part of reviewing a new platform, Daniel Schwierzeck noted that we
can have an empty Makefile in the board directory and don't need an
empty board.c file as well. Further with further cleanup in the
Makefile we can now omit the Makefile entirely. Remove a number of now
unnecessary board.c and Makefiles.
Tom Rini [Thu, 21 Sep 2023 23:32:46 +0000 (19:32 -0400)]
Makefile: Allow for board directories to not have a Makefile
It is entirely possible at this point to have platforms in U-Boot that
do not have board-specific C code (just Kconfig or environment) and so
make it optional to have to descend in to and then build in the board
directory.
Allow for a proper configuration of CFI flash banks avaialble on the vexpress_ca9x4
board. Without this option, the CFI flash incorrectly detects that the board has two
banks of 32MB flash devices, while in reality, the board provides
two flash banks, each with 64MB size. As a result, it becomes impossible to e.g. to
save u-boot env in flash. According to device tree for this board and
its implementation in QEMU, the CFI width should be set to 32 bits.
After applying this fix, CFI flash will correctly detect both flash
banks each with a size of 64MB. As as result the functionality of e.g. saving u-boot
env will work correctly.
Tested on QEMU 6.2.0.
Cc: Kristian Amlie <kristian.amlie@northern.tech> Signed-off-by: Patryk Biel <pbiel7@gmail.com> Reviewed-by: Kristian Amlie <kristian.amlie@northern.tech>
Andrew Davis [Fri, 15 Sep 2023 14:43:23 +0000 (09:43 -0500)]
Makefile: Force regeneration of env.txt
If the source .env file changes to one that is also older than the
generated env.txt file then the .env file is not regenerated. This
means when switching board configs we do not regenerate the env.
This can be tested with:
$ make j721e_evm_a72_defconfig
$ make # this may fail to complete but that is okay for this test
$ make am64x_evm_a53_defconfig
$ make
$ vim include/generated/env.txt
Note this is still the J721e env not the AM64 config as expected.
As ENV_FILE is set based on configuration, regenerate anytime
autoconf.h changes.
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
The SelectMAP configuration interface provides an 8-bit,
16-bit or 32-bit bidirectional data bus interface to the Versal FPGA
configuration logic that can be used for both configuration and readback.
A connected microcontoller to the SelectMAP interface can load boot
image with bitstream, TF-A (ARM Trusted Firmware) and U-Boot.
This commit adds the missing identification of the SelectMAP mode.
Versal NET clock node should use "xlnx,versal-net-clk", "xlnx,versal-clk"
compatible string that's why it is not necessary to define Versal NET
specific compatible string if there is no any other change needed. It can
be get back if there is a need to differentiate clock support between
Versal and Versal NET.
Michal Simek [Wed, 27 Sep 2023 09:57:48 +0000 (11:57 +0200)]
arm64: zynqmp: Do not use '_' in DT node names
Using '_' is not recommended for node names. Use '-' instead.
Pretty much run seds below for node names.
s/heartbeat_led/heartbeat-led/
s/gtr_sel/gtr-sel/
s/zynqmp_ipi/zynqmp-ipi/
s/nvmem_firmware/nvmem-firmware/
s/soc_revision/soc-revision/
Xilinx was using in past is-dual property for QSPIs to reflect their
configurations. But handling for them never reached upstream code that's
why better to remove them.
Michal Simek [Wed, 27 Sep 2023 09:53:36 +0000 (11:53 +0200)]
arm64: zynqmp: Add support for zcu670-revA
The board is sharing a lot of components with zcu208 but it contains
differet silicon and also several components are done differently.
The board has 4GB memory connected to PS and additional 4GB connected to
PL. Compare to zcu208 sata support has been dropped and only USB3.0 is
using GTR (lane2). Others GTRs are routed to connectors.
MIO configuration is also shared with zcu111.
The board is using si5381 chip compare to si5341 which is normally used.
And as of now there is no Linux driver for this chip. PS reference clock is
generated out of si570 chip which is also new approach compare to zcu208.
Michal Simek [Wed, 27 Sep 2023 09:53:35 +0000 (11:53 +0200)]
arm64: zynqmp: Add support for VPXA2785
VPXA2785(vp-x-a2785-00) is evaluation board which contains two PCIe-Edge
fingers, one for PCIe-B(gen5x8) and one for CPM(dual gen5x8, gen5x16).
Each of the ports can operate in endpoint or root port mode. This allows
the single card to be used for both root port, endpoint, and switch modes.
The board is designed in the similar manner as others Versal boards. It
means board also have ZynqMP Zu4 System Controller which is described in a
separate file.
Michal Simek [Wed, 27 Sep 2023 09:53:34 +0000 (11:53 +0200)]
arm64: zynqmp: Describe i2c structures for SCs
Generic system controller (SC) covers connection defined by specification
but different boards have different i2c devices. That's why describe i2c
devices available on multiple boards.
Michal Simek [Wed, 27 Sep 2023 09:53:33 +0000 (11:53 +0200)]
arm64: zynqmp: Add support for SC revC
System controller revC is using ADI ethernet phy instead of TI because of
supply chain issues.
Describe reset assert and de-assert times to 10us and 5ms respectively
according to the datasheet. Also setup RGMII RX and TX delay values to
2400ps as per board bring up observations.
Michal Simek [Wed, 27 Sep 2023 09:53:32 +0000 (11:53 +0200)]
arm64: zynqmp: Create description for generic SC (vpk120-revB)
System controllers are pretty much the same on the all boards that's why
use autodetection based on i2c eeprom. This should end up with having only
one BSP for all SCs with only DT overlays to cover different i2c
structures.
All MIOs are fixed by the spec that's why not a problem to description
pinctrl setting.
Apart from eth phy reset, it also set proper phy delays.
The TI DP83867 PHY datasheet says:
T1: Post RESET stabilization time == 195us
T3: Hardware configuration pins transition to output drivers == 64us
T4: RESET pulse width == 1us
So with a little overhead set 'reset-assert-us' to 100us (T4) and
'reset-deassert-us' to 280us (T1+T3).
NOTE: The tuning of TI DP83867 phy reset delay is derived from linux
upstream commit: 5dbadc848259(arm64: dts: fsl: add support for Kontron
pitx-imx8m board).
i2c structure on Xilinx Versal evaluation platforms contain a lot of
devices but also connection to connectors like SFP. Because of this
complicated structure with also all level shifters, i2c muxes, etc. not all
devices are able to reliably work on 400kHz even if they are compatible
with this speed. That's why set i2c frequency to 100KHz to increase
reliability of the i2c bus.
Michal Simek [Wed, 27 Sep 2023 09:53:31 +0000 (11:53 +0200)]
arm64: zynqmp: Add support for vpk120-revA
Board contains two systems. The primary is Versal VP1202 ACAP device and
the secondary is ZynqMP zu4 which acts as system controller. The patch is
describing only ZynqMP system controller part.
Michal Simek [Fri, 22 Sep 2023 10:35:42 +0000 (12:35 +0200)]
ARM: zynq: Describe nand device in DT
Linux requires to describe nand structure under nand controller.
If it is not described nand device is not detected by Linux.
Error shown by Linux kernel:
pl35x-nand-controller e1000000.nand-controller: Incorrect number of NAND chips (0)
pl35x-nand-controller: probe of e1000000.nand-controller failed with error -22
Michal Simek [Fri, 22 Sep 2023 10:35:41 +0000 (12:35 +0200)]
arm64: zynqmp: Sync licenses with Linux kernel
There is difference between licenses in the Linux kernel and there
shouldn't be any diff because all changes are coming from the same source
at the same time. The difference is really in a time when they were
upstreamed. That's why sync it up.
Michal Simek [Fri, 22 Sep 2023 10:35:37 +0000 (12:35 +0200)]
arm64: xilinx: Remove address/size-cells from gem nodes
Some boards are using one mdio bus which holds multiple phys and also
boards are using mdio node for bus description. That's why there are cases
where address/size-cells are unnecessary which is also reported by make W=1
dtbs. That's why remove them from zynqmp.dtsi and let board DTSes to handle
it based on used description.
Error log:
/axi/ethernet@ff0e0000: unnecessary #address-cells/#size-cells without
"ranges" or child "reg" property
Michal Simek [Fri, 22 Sep 2023 10:35:36 +0000 (12:35 +0200)]
arm64: xilinx: Put ethernet phys to mdio node
All zynqmp boards have been already described via mdio node that's why also
convert the rest of the boards. With using mdio node there is an option to
add reset property for the whole mdio bus which is reflected by
's/phy-reset-gpios/reset-gpios/g' for some boards.
Michal Simek [Fri, 22 Sep 2023 10:35:33 +0000 (12:35 +0200)]
arm64: xilinx: Use lower case for partition address
Lower case should be used for register address.
Issue is reported as:
flash@0: partitions: Unevaluated properties are not allowed
('partition@22A0000' was unexpected)
Michal Simek [Mon, 18 Sep 2023 14:09:18 +0000 (16:09 +0200)]
arm64: zynqmp: Rename dt overlay file names from dts to dtso
Use dtso suffix instead of dts. Build option was introduced by
commit a0f9a77912b2 ("kbuild: Allow DTB overlays to built from .dtso named
source files").
For Xilinx ZynqMP SOC new parameter was added and now it can
set 7 parameters for its pins. Pinmux status command will
print the status of these parameters for each pin. But
current print buffer length is only 80 characters long, increase it
to 90 to print all the parameters without truncation.
net: zynq_gem: Update the MDC clock divisor in the probe function
MDC clock change needs to be done when the driver probe function
is called as mdio is enabled at probe and not when the ethernet starts.
Setup the MDC clock at the probe itself.
Tom Rini [Sun, 8 Oct 2023 13:58:55 +0000 (09:58 -0400)]
Merge tag 'u-boot-rockchip-20231007' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Add Board: rk3568 Bananapi R2Pro;
- Update pcie bifurcation support;
- dwc_eth_qos controller support for rk3568 and rk3588;
- Compressed binary support for U-Boot on rockchip platform;
- dts and config updates for different board and soc;
[ trini: Fix conflict on include/spl.h ] Signed-off-by: Tom Rini <trini@konsulko.com>
Jonas Karlman [Thu, 3 Aug 2023 21:11:54 +0000 (21:11 +0000)]
rockchip: rk356x-u-boot: Add bootph-all to i2c0_xfer pinctrl node
A RK8XX PMIC is typically using i2c0 on RK356x devices. Add bootph-all
to required pinctrl nodes to simplify use of the prevent booting on
power plug-in option in SPL.
With the following Kconfig options and nodes in u-boot.dtsi the prevent
booting on power plug-in option can work in SPL.
Jonas Karlman [Thu, 3 Aug 2023 21:02:42 +0000 (21:02 +0000)]
power: pmic: rk8xx: Fix power-on source check in SPL
The commit 30975fb73d51 ("rockchip: Add option to prevent booting on
power plug-in") introduce an option to prevent booting a device when the
device was powered on due to power plug-in instead of pressing a power
button.
This feature works by checking the power-on source during PMIC probe
and powers off the device if power-on source was power plug-in.
This check currently runs very late at PMIC probe in U-Boot proper.
Fix so that the power-on source check can work at probe time in SPL.
Also enable probe after bind and remove the PMIC banner in SPL.
With this we can use ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON and
SPL_PMIC_RK8XX to power off the device very quickly after TPL instead
of after TF-A and U-Boot proper has been loaded and run.
DDR V1.18 f366f69a7d typ 23/07/17-15:48:58
ln
LP4/4x derate en, other dram:1x trefi
ddrconfig:7
LPDDR4X, 324MHz
BW=32 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=16 Size=8192MB
change to: 324MHz
clk skew:0x64
change to: 528MHz
clk skew:0x58
change to: 780MHz
clk skew:0x58
change to: 1056MHz(final freq)
clk skew:0x40
out
Power Off due to plug-in event
Fixes: 30975fb73d51 ("rockchip: Add option to prevent booting on power plug-in") Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Jonas Karlman [Thu, 17 Aug 2023 05:45:04 +0000 (05:45 +0000)]
rockchip: rk356x: Enable poweroff command
With PMIC_RK8XX, SYSRESET and CMD_POWEROFF options enabled it is
possible to power down a board using the poweroff command and turn the
board back on using a power button.
Enable the poweroff command on RK356x boards that have a button wired
to PMIC pwron.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
configs: rockchip: rk3308: use CONFIG_DEFAULT_FDT_FILE
all rk3308 boards should use their own dtb file.
also, change fdt_addr_r to avoid following error:
"ERROR: Did not find a cmdline Flattened Device Tree"
it happens on Radxa ROCK Pi S (256MB/512MB) with kernel built from
Radxa BSP.
Massimo Pegorer [Sun, 1 Oct 2023 14:15:29 +0000 (16:15 +0200)]
configs: rockchip: add DOS_PARTITION to RK3308 boards defconfig
Without DOS_PARTITION support U-Boot is not able to boot an OS stored
into an SD card with MBR partitions table. This is still a quite common
case so add DOS_PARTITION (only for U-Boot proper build) to Rockchip
RK3308 EVB, Radxa ROCK Pi S and Firefly roc-rk3308-cc boards: they are
the only RK boards missing of DOS_PARTITION.
tested:
- sdcard
- both front usb-ports
- sata
- wan-port
lan-ports are connected to mt7531 switch where driver needs to be
separated from mtk ethernet-driver.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Jonas Karlman [Sun, 1 Oct 2023 19:17:22 +0000 (19:17 +0000)]
configs: rockchip: Enable ethernet driver on RK3588 boards
Enable DWC_ETH_QOS_ROCKCHIP and related PHY driver on RK3588 boards that
have an enabled gmac node and drop ETH_DESIGNWARE and GMAC_ROCKCHIP for
remaining RK3588 boards.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Sun, 1 Oct 2023 19:17:20 +0000 (19:17 +0000)]
net: dwc_eth_qos_rockchip: Add support for RK3588
Add rk_gmac_ops and other special handling that is needed for GMAC to
work on RK3588.
rk_gmac_ops was ported from linux commits: 2f2b60a0ec28 ("net: ethernet: stmmac: dwmac-rk: Add gmac support for rk3588") 88619e77b33d ("net: stmmac: rk3588: Allow multiple gmac controller")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Manoj Sai [Sun, 17 Sep 2023 19:26:28 +0000 (00:56 +0530)]
rockchip: Add support to generate LZMA compressed U-boot binary
Add support for generating a LZMA-compressed U-boot binary with the
help of binman, if CONFIG_SPL_LZMA is selected.
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Manoj Sai [Sun, 17 Sep 2023 19:26:27 +0000 (00:56 +0530)]
rockchip: Add support to generate GZIP compressed U-boot binary
Add support for generating a GZIP-compressed U-boot binary with the
help of binman, if CONFIG_SPL_GZIP is selected.
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Manoj Sai [Sun, 17 Sep 2023 19:26:26 +0000 (00:56 +0530)]
spl: fit: support for booting a LZMA-compressed U-boot binary
If LZMA Compression support is enabled, LZMA compressed U-Boot
binary will be placed at a specified RAM location which is
defined at CONFIG_SYS_LOAD_ADDR and will be assigned as the
source address.
image_decomp() function, will decompress the LZMA compressed
U-Boot binary which is placed at source address(CONFIG_SYS_LOAD_ADDR)
to the default CONFIG_SYS_TEXT_BASE location.
spl_load_fit_image function will load the decompressed U-Boot
binary, which is placed at the CONFIG_SYS_TEXT_BASE location.
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Manoj Sai [Sun, 17 Sep 2023 19:26:25 +0000 (00:56 +0530)]
spl: fit: support for booting a GZIP-compressed U-boot binary
If GZIP Compression support is enabled, GZIP compressed U-Boot binary
will be at a specified RAM location which is defined at
CONFIG_SYS_LOAD_ADDR and will be assign it as the source address.
gunzip function in spl_load_fit_image ,will decompress the GZIP
compressed U-Boot binary which is placed at
source address(CONFIG_SYS_LOAD_ADDR) to the default
CONFIG_SYS_TEXT_BASE location.
spl_load_fit_image function will load the decompressed U-Boot
binary, which is placed at the CONFIG_SYS_TEXT_BASE location.
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com> Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
doc: rockchip: Update and improve info on rk3308, TPL and TF-A
Update and improve documentation about build steps for SoCs that
require using TF-A and TPL binaries provided by Rockchip, such as
rk3308. Add rk3308 boards case to rST document. Add ROCK Pi S in
the list of supported boards. Minor page format improvements.
Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip: Kconfig: Enable external TPL binary for rk3308
There is no support to initialize DRAM on rk3308 SoC using U-Boot
TPL or SPL, and therefore an external TPL binary must be used to
package a bootable u-boot-rockchip.bin image.
Default ROCKCHIP_EXTERNAL_TPL to yes if ROCKCHIP_RK3308.
Remove useless TPL_SERIAL.
Add a minimal generic RK3566/RK3568 board that only have eMMC and SDMMC
enabled. This defconfig can be used to boot from eMMC or SD-card on most
RK3566/RK3568 boards that follow reference board design.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 21 Aug 2023 22:30:28 +0000 (22:30 +0000)]
rockchip: Port IO-domain driver for RK3568 from linux
Port the Rockchip IO-domain driver for RK3568 from linux.
The driver auto probe after bind to configure IO-domain based on the
regulator voltage. Compared to the linux driver this driver is not
notified about regulator voltage changes and only configure IO-domain
based on the initial voltage autoset by the regulator.
It is not recommended to enable MMC_IO_VOLTAGE or the mmc signal voltage
and IO-domain may end up out of sync.
Based on the linux commit 28b05a64e47c ("soc: rockchip: io-domain: add
rk3568 support").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Joseph Chen [Mon, 21 Aug 2023 22:30:25 +0000 (22:30 +0000)]
regulator: rk8xx: Return correct voltage for buck converters
Information from the first range group is always used to calculate the
voltage returned for buck converters. This may result in wrong voltage
reported back to the regulator_get_value caller.
Traverse all the possible BUCK ranges to fix this issue.
Fixes: addd062beacc ("power: pmic: rk816: support rk816 pmic") Fixes: b62280745e55 ("power: pmic: rk805: support rk805 pmic") Fixes: b4a35574b38d ("power: pmic: rk817: support rk817 pmic") Fixes: ee30068fa574 ("power: pmic: rk809: support rk809 pmic") Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
[jonas@kwiboo.se: fix checkpatch error, simplify buck get_value, update commit message] Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Mon, 21 Aug 2023 22:30:24 +0000 (22:30 +0000)]
power: regulator: Only run autoset once for each regulator
With the commit 4fcba5d556b4 ("regulator: implement basic reference
counter"), keeping regulator enablement in balance become more important.
Calling regulator_autoset multiple times on a fixed regulator increase
the enable count for each call, resulting in an unbalanced enable count.
Introduce a AUTOSET_DONE flag and use it to mark that autoset has run
for the regulator. Return -EALREADY on any subsequent call to autoset.
This fixes so that the enable count is only ever increased by one per
regulator for autoset.
Fixes: 4fcba5d556b4 ("regulator: implement basic reference counter") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Wed, 2 Aug 2023 19:59:33 +0000 (19:59 +0000)]
rockchip: rk3568-nanopi-r5: Enable PCIe on NanoPi R5C and R5S
Enable missing PCIe Kconfig options now that PCIe bifurcation is fixed
to make use of the two on-board RTL8125B and the M.2 slot on NanoPi R5C
and NanoPi R5S.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Jonas Karlman [Wed, 2 Aug 2023 19:41:22 +0000 (19:41 +0000)]
phy: rockchip: naneng-combphy: Use signal from comb PHY on RK3588
Route signal from comb PHY instead of PCIe3 PHY to PCIe1l0 and PCIe1l1.
Fixes use of pcie2x1l0 on ROCK 5B.
Code imported from mainline linux driver.
Fixes: c5b4a012bca8 ("phy: rockchip: naneng-combphy: Support rk3588") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
To quote the author:
This series tidies up SPL a little and adds some core ofnode functions
needed to support Universal Payload. It also includes a few minor
fix-ups for sandbox.
For SPL the changes include CONFIG naming, removing various #ifdefs and
tidying up the FIT code.
One notable piece of the ofnode improvements is support for flattening a
livetree. This should be useful in future as we move FDT fixups to use
the ofnode API.
Simon Glass [Tue, 26 Sep 2023 14:14:58 +0000 (08:14 -0600)]
pci: serial: Support reading PCI-register size with base
The PCI helpers read only the base address for a PCI region. In some cases
the size is needed as well, e.g. to pass along to a driver which needs to
know the size of its register area.
Update the functions to allow the size to be returned. For serial, record
the information and provided it with the serial_info() call.
A limitation still exists in that the size is not available when OF_LIVE
is enabled, so take account of that in the tests.
Simon Glass [Tue, 26 Sep 2023 14:14:57 +0000 (08:14 -0600)]
dm: core: Tweak device_is_on_pci_bus() for code size
This function cannot return true if PCI is not enabled, since no PCI
devices will have been bound. Add a check for this to reduce code size
where it is used.
Simon Glass [Tue, 26 Sep 2023 14:14:55 +0000 (08:14 -0600)]
spl: Add C-based runtime detection of SPL
The spl_phase() function indicates whether U-Boot is in SPL and before
or after relocation. But sometimes it is useful to check for SPL with
zero code-size impact. Since spl_phase() checks the global_data flags,
it does add a few bytes.
Add a new spl_in_proper() function to check if U-Boot proper is
running, regardless of the relocation status.
Simon Glass [Tue, 26 Sep 2023 14:14:51 +0000 (08:14 -0600)]
bloblist: Support initing from multiple places
Typically the bloblist is set up after the devicetree is present. This
makes sense because bloblist may use malloc() to allocate the space it
needs.
However sometimes the devicetree itself may be present in the bloblist.
In that case it is at a known location in memory so we can init the
bloblist very early, before devicetree.
Add a flag to indicate whether the bloblist has been inited. Add a
function to init it only if needed. Use that in the init sequence.
Simon Glass [Tue, 26 Sep 2023 14:14:48 +0000 (08:14 -0600)]
sandbox: Init the EC properly even if no state file is available
This currently relies on sandbox attempting to read a state file. At
present it always does, even when there is no state file, in which case it
fails, but still inits the EC.
That is a bug, so update this driver to set the current image always, even
if no state is read.
projects / thirdparty / u-boot.git / log
