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4 months agomtd: rawnand: sunxi_spl: use NFC_ECC_ERR_MSK and NFC_ECC_PAT_FOUND
Richard Genoud [Fri, 23 Jan 2026 11:44:52 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi_spl: use NFC_ECC_ERR_MSK and NFC_ECC_PAT_FOUND

Use defines instead of hardcoded values for NFC_ECC_{ERR_MSK,PAT_FOUND}

SPL is using hard coded values for ECC error detection and empty chunk
detection.
The H6/H616 registers for that have changed, the pattern found is no
more in the NFC_REG_ECC_ST register.

So, don't presume anymore that pattern_found is in NFC_REG_ECC_ST, and
read the pattern_found register to get this information.

Apart from an additional register reading, no functional change.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi: introduce reg_spare_area in sunxi_nfc_caps
Richard Genoud [Fri, 23 Jan 2026 11:44:51 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi: introduce reg_spare_area in sunxi_nfc_caps

Introduce NDFC Spare Area Register offset in SoC capabilities

The H6/H616 spare area register is not at the same offset as the
A10/A23 one, so move its offset into sunxi_nfc_caps.

No functional change.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi: move NFC_RANDOM_EN register offset in SoC caps
Richard Genoud [Fri, 23 Jan 2026 11:44:50 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi: move NFC_RANDOM_EN register offset in SoC caps

NFC_RANDOM_{EN,DIRECTION} registers offset moved in H616

Let's make it a SoC capability.

NFC_RANDOM_DIRECTION also moved, but it's unused, just remove it.

No functional change.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi_spl: add per SoC capabilities
Richard Genoud [Fri, 23 Jan 2026 11:44:49 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi_spl: add per SoC capabilities

Introduce per SoC capabilities in sunxi_nand_spl.c

Prepare for the H616 support that has quite a lot of differences in
registers offset and capabilities.

Start with the 512 bytes ECC capability.

No functional change.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi: introduce reg_pat_id in sunxi_nfc_caps
Richard Genoud [Fri, 23 Jan 2026 11:44:48 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi: introduce reg_pat_id in sunxi_nfc_caps

Introduce NDFC Pattern ID Register in capability structure

The H6/H616 pattern ID register is not at the same offset as the
A10/A23 one, so move its offset into sunxi_nfc_caps.

No functional change.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi: move NFC_ECC_MODE offset in SoC caps
Richard Genoud [Fri, 23 Jan 2026 11:44:47 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi: move NFC_ECC_MODE offset in SoC caps

NFC_ECC_MODE register offset moved in H616, so let's make it a SoC cap

No functional change.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi: add has_ecc_block_512 capability
Richard Genoud [Fri, 23 Jan 2026 11:44:46 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi: add has_ecc_block_512 capability

Introduce has_ecc_block_512 capability

The H616 controller can't handle 512 bytes ECC block size. The
NFC_ECC_BLOCK_512 bit disappeared in H6, and NDFC_RANDOM_EN took its
place.

So, add has_ecc_block_512 capability to only set this bit on SoC having
it.
On the way, let's drop NFC_ECC_BLOCK_SIZE_MSK which was just a mask for
the very same bit.

No functional change.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi: move ECC_PAT_FOUND register in SoC caps
Richard Genoud [Fri, 23 Jan 2026 11:44:45 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi: move ECC_PAT_FOUND register in SoC caps

Move ECC_PAT_FOUND register in SoC capabilities structure

This register offset moved in H616, it's now its own register (@0x3c,
bits 0-31), not shared with NFC_ECC_ST any more (was @0x38 bits 16-31).
Push that specificity in caps structure.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi: move USER_DATA register offset in SoC caps
Richard Genoud [Fri, 23 Jan 2026 11:44:44 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi: move USER_DATA register offset in SoC caps

USER_DATA register offset moved in H616, so let's make it a SoC cap

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi: move ECC_ERR_CNT register offset in SoC caps
Richard Genoud [Fri, 23 Jan 2026 11:44:43 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi: move ECC_ERR_CNT register offset in SoC caps

ECC_ERR_CNT register offset moved in H616, so let's make it a SoC cap

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi: add per SoC capabilities
Richard Genoud [Fri, 23 Jan 2026 11:44:42 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi: add per SoC capabilities

Introduce per SoC capabilities in sunxi_nand.c

This prepares for the H616 support that has quite a lot differences in
registers offset and capabilities.

Start with the ECC strength table.

No functional change.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi: merge register definitions for sunxi_nand{, _spl}.c
Richard Genoud [Fri, 23 Jan 2026 11:44:41 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi: merge register definitions for sunxi_nand{, _spl}.c

Merge common register definitions from sunxi_nand{,_spl}.c

The Allwinner NAND controller registers where in both files, so let's
just merge all that in a header, it will be easier for maintenance.

NB: the defines are also harmonized with Linux driver

No functional change

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi: remove usage of struct sunxi_ccm_reg
Richard Genoud [Fri, 23 Jan 2026 11:44:40 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi: remove usage of struct sunxi_ccm_reg

The sunxi_ccm_reg is legacy, drop its usage from nand related code

For that, CCU_NAND0_CLK_CFG and CCU_AHB_GATE1 are added to the clock
files when missing.
And clock code in sunxi_nand{,_spl}.c and board.c are changed to use the
new scheme.

Moreover, drop AHB_DIV_1 in favor of the more readable CCM_NAND_CTRL_M/N

Suggested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi_spl: cosmetic: use definitions from linux/mtd/rawnand.h
Richard Genoud [Fri, 23 Jan 2026 11:44:39 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi_spl: cosmetic: use definitions from linux/mtd/rawnand.h

Remove unneeded definitions NFC_CMD_R* in sunxi_nand_spl.c

No need to define NFC_CMD_RNDOUTSTART, NFC_CMD_RNDOUT and
NFC_CMD_READSTART here since they are already in linux/mtd/rawnand.h

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi_spl: harmonize register defines with non spl file
Richard Genoud [Fri, 23 Jan 2026 11:44:38 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi_spl: harmonize register defines with non spl file

Harmonize registers definition in sunxi_nand{,_spl}.c files

This is a first step to then include the same file from both
sunxi_nand{,_spl}.c files

Unused defines are also removed

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi_spl: fix pointer from integer without a cast
Richard Genoud [Fri, 23 Jan 2026 11:44:37 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi_spl: fix pointer from integer without a cast

Fix pointer from interget warning when compiling for ARM64

When compiling for arm64, we get this error:
error: passing argument 2 of ‘__memcpy_fromio’ makes pointer from
integer without a cast [-Wint-conversion]

Moreover the copy should be made with dedicated readl(), like for any
register access on this peripheral, since they are 32bit wide.

So, instead of memcpy_fromio(), just use a readl() loop.
Introduce nand_readlcpy() to implement this loop.

Fixes: 6ddbb1e936c7 ("spl: nand: sunxi: use PIO instead of DMA")
Suggested-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agomtd: rawnand: sunxi: cosmetic: remove needless comment
Richard Genoud [Fri, 23 Jan 2026 11:44:36 +0000 (12:44 +0100)] 
mtd: rawnand: sunxi: cosmetic: remove needless comment

Remove 'complete' member from struct sunxi_nfc

The 'complete' member isn't part of the structure, let's remove it.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agox86: cpu: Fix crash on FTRACE enabled builds
Patrick Rudolph [Mon, 15 Dec 2025 08:16:39 +0000 (09:16 +0100)] 
x86: cpu: Fix crash on FTRACE enabled builds

When compiled with FTRACE=1 U-boot will crash as %rdi is clobbered
in board_init_f_alloc_reserve() and board_init_f_init_reserve() will
memset the .text segment instead of the global_data struct.

According to the System V AMD64 ABI %rdi is not preserved and the
existing code only worked as board_init_f_alloc_reserve() was small
enough to not use %rdi.

Fix that by always passing the correct argument to
board_init_f_init_reserve().

TEST=Can boot on qemu-q35 with FTRACE=1 enabled during build.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
4 months agox86: boot: fix unreachable else branch in boot_prep_linux
Guillaume Ranquet [Thu, 11 Sep 2025 13:35:41 +0000 (15:35 +0200)] 
x86: boot: fix unreachable else branch in boot_prep_linux

The else if branch uses the is_zimage boolean which is initialized to 0
and never set before being tested here.

remove the test on is_zimage to make this code reachable.

Signed-off-by: Guillaume Ranquet <ranquet.guillaume@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 months agomips: mtmips: add CPU reset support for MT7628
Shiji Yang [Sun, 27 Jul 2025 05:55:20 +0000 (13:55 +0800)] 
mips: mtmips: add CPU reset support for MT7628

Allow the system to reset the CPU without calling the reset
controller. This patch also removed the default SYSRESET controller
for MT7628, as it is now optional.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
4 months agomips: mtmips: do not select PINCONF Kconfig symbol for MT7620
Shiji Yang [Fri, 25 Jul 2025 00:37:42 +0000 (08:37 +0800)] 
mips: mtmips: do not select PINCONF Kconfig symbol for MT7620

Mediatek MT7620 u-boot does not have PINCONF implementation.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
4 months agox86: Fix TCPA bloblist size
Eric Schikschneit [Thu, 24 Jul 2025 16:31:56 +0000 (11:31 -0500)] 
x86: Fix TCPA bloblist size

Excessive default value causes crash on hardware: x86 baytrail E3845

It is unclear where the data is being populated being 'BLOBLISTT_TCPA_LOG'
is not found elsewhere in the u-boot tree. This leads to confusion about
how much space for TPM log is actually needed.

This was tested on hardware using TPMv1.

Signed-off-by: Eric Schikschneit <eric.schikschneit@novatechautomation.com>
4 months agoMerge tag 'mmc-for-2026.04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-mmc
Tom Rini [Tue, 3 Feb 2026 15:13:43 +0000 (09:13 -0600)] 
Merge tag 'mmc-for-2026.04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-mmc

- Add DMA support for mediatek mmc
- Cleanup mmc cmd
- Fix typos in mmc

[trini: Fix "quoted string split across lines" checkpatch warning]
Signed-off-by: Tom Rini <trini@konsulko.com>
4 months agomailmap: Update email address for Sughosh
Sughosh Ganu [Tue, 3 Feb 2026 08:00:33 +0000 (13:30 +0530)] 
mailmap: Update email address for Sughosh

My Linaro email address is no longer valid. Update entries in the
MAINTAINERS file, and add a mapping in the mailmap file.

Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
4 months agocmd: mmc: Return symbolic value when part switching fails in mmc dev
Yao Zi [Fri, 30 Jan 2026 18:03:53 +0000 (18:03 +0000)] 
cmd: mmc: Return symbolic value when part switching fails in mmc dev

Return symbolic value CMD_RET_FAILURE instead of literal "1" when
failing to switch the partition to improve readability.

Signed-off-by: Yao Zi <me@ziyao.cc>
Tested-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 months agocmd: mmc: Check whether arguments are valid numbers in dev subcommand
Yao Zi [Fri, 30 Jan 2026 18:03:52 +0000 (18:03 +0000)] 
cmd: mmc: Check whether arguments are valid numbers in dev subcommand

Currently when any of speed_mode, part, or dev fails to be parse as a
number, no error is reported. In this case __init_mmc_device() is called
with weird arguments, probably zeroes if there's no digit prefixing the
argument, which is especially confusing when the invocation occasionally
succeeds.

Let's check whether arguments are valid numbers without trailing
characters. This is quite helpful for speed_mode: it requires an index
instead of a mode name, one may easily pass in a string, which will be
parsed as zero (MMC_LEGACY), without carefully reading the
documentation, then finds the MMC device is under an unexpected mode.

Signed-off-by: Yao Zi <me@ziyao.cc>
Tested-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 months agocmd: mmc: Simplify dev subcommand handling
Yao Zi [Fri, 30 Jan 2026 18:03:51 +0000 (18:03 +0000)] 
cmd: mmc: Simplify dev subcommand handling

Replace the big if-else block in do_mmc_dev() with switch-case and use
fallthrough to remove the duplicated code for parsing dev and part.

Signed-off-by: Yao Zi <me@ziyao.cc>
Tested-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 months agommc: Fix typos in comments and debug messages
Tanmay Kathpalia [Sun, 25 Jan 2026 12:39:57 +0000 (04:39 -0800)] 
mmc: Fix typos in comments and debug messages

Fix the following typos in drivers/mmc/mmc.c:
- "neiter" -> "neither" in __mmc_switch() comment
- "witdh" -> "width" in bus_width() warning message
- "enver" -> "never" in mmc_select_mode_and_width() comment

Signed-off-by: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 months agommc: mediatek: add DMA mode support
ht.lin [Wed, 21 Jan 2026 22:36:26 +0000 (16:36 -0600)] 
mmc: mediatek: add DMA mode support

Implement DMA support in the MediaTek MMC driver to enhance data
transfer speed.

- Define DMA control and configuration registers
- Implement functions for starting, stopping, and completing DMA
  transfers
- Modify data transfer logic to utilize DMA when enabled
- Ensure proper cache management during DMA operations

Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com>
Signed-off-by: ht.lin <ht.lin@mediatek.com>
Signed-off-by: Julien Masson <jmasson@baylibre.com>
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 months agommc: mtk-sd: fix misaligned brace
David Lechner [Wed, 21 Jan 2026 22:36:25 +0000 (16:36 -0600)] 
mmc: mtk-sd: fix misaligned brace

Indent a brace for proper code style.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 months agommc: mtk-sd: use GENMASK and FIELD macros
David Lechner [Wed, 21 Jan 2026 22:36:24 +0000 (16:36 -0600)] 
mmc: mtk-sd: use GENMASK and FIELD macros

Replace separate mask and shift definitions with GENMASK and FIELD_*
macros for better readability and maintainability.

All macros ending in _M have the suffix dropped. The value remains the
same but is now generated with GENMASK. All macros ending in _S are
removed and their uses replaced with FIELD_PREP and FIELD_GET macros.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
4 months agovideo: nexell: unsigned parameter cannot be negative
Andrew Goodbody [Wed, 1 Oct 2025 10:05:10 +0000 (11:05 +0100)] 
video: nexell: unsigned parameter cannot be negative

The parameter 'alpha' is declared as an unsigned type so cannot be
negative. The code to test it as being less than zero will always fail
and so is redundant and should be removed.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Stefan Bosch <stefan_b@posteo.net>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
4 months agoMerge patch series "m68k: Add support for QEMU virt machine"
Tom Rini [Mon, 2 Feb 2026 20:24:56 +0000 (14:24 -0600)] 
Merge patch series "m68k: Add support for QEMU virt machine"

Kuan-Wei Chiu <visitorckw@gmail.com> says:

Add support for the QEMU 'virt' machine on the m68k architecture. The
QEMU virt machine models a generic system utilizing Goldfish virtual
peripherals and is capable of emulating various classic 68k CPUs.

Currently, U-Boot's m68k architecture support focuses on ColdFire
variants. This series expands support to include the classic M680x0
architecture, implementing the necessary exception vectors, startup
code, and a bootinfo parser compatible with the QEMU interface.

Drivers for Goldfish peripherals (TTY, Timer, RTC) and the QEMU
Virtual System Controller (sysreset) are also added to enable serial
console, timekeeping, and system reset functionality.

The implementation has been verified on QEMU targeting the M68040 CPU,
confirming successful hardware initialization and boot to the U-Boot
command shell. Additionally, the CI configuration was verified locally
using gitlab-ci-local "qemu_m68k_virt test.py", resulting in
PASS qemu_m68k_virt test.py.

Link: https://lore.kernel.org/r/20260107201838.3448806-1-visitorckw@gmail.com
[trini: Re-sort MAINTAINERS entries]
Signed-off-by: Tom Rini <trini@konsulko.com>
4 months agoMAINTAINERS: Update m68k entry
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:37 +0000 (20:18 +0000)] 
MAINTAINERS: Update m68k entry

Rename the "COLDFIRE" entry to "M68K" to reflect that the architecture
support now encompasses traditional m680x0 CPUs (e.g., M68040) in
addition to ColdFire platforms.

Remove Huan Wang from the maintainers list as she is no longer active,
as suggested by Angelo Dureghello.

Add myself as a co-maintainer to assist with reviewing and testing
m68k-related patches.

Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
Acked-by: Angelo Dureghello <angelo@kernel-space.org>
4 months agoCI: Add test jobs for QEMU m68k virt machine
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:36 +0000 (20:18 +0000)] 
CI: Add test jobs for QEMU m68k virt machine

Enable CI testing for the newly introduced QEMU m68k 'virt' board on
both GitLab CI and Azure Pipelines. This ensures the new M68040
architecture support is built and booted correctly in the emulated
environment.

Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
4 months agoboard: Add QEMU m68k virt board support
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:35 +0000 (20:18 +0000)] 
board: Add QEMU m68k virt board support

Add support for the QEMU 'virt' machine on the m68k architecture. This
board emulates a generic machine based on the Motorola 68040 CPU
equipped with Goldfish virtual peripherals.

Introduce the necessary board configuration and initialization
infrastructure. The implementation includes logic to parse the QEMU
bootinfo interface, enabling dynamic detection of system RAM size to
adapt to the virtual machine's configuration.

Enable the Goldfish TTY driver for serial console output. Additionally,
enable Goldfish RTC and timer drivers to support real-time clock
functionality and nanosecond-resolution delays. Include comprehensive
documentation covering build instructions and usage examples.

Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
Tested-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
4 months agom68k: Add support for M68040 CPU
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:34 +0000 (20:18 +0000)] 
m68k: Add support for M68040 CPU

Add support for the Motorola 68040 architecture. Currently, m68k
support in U-Boot is primarily focused on ColdFire variants. Introduce
the necessary infrastructure to support the classic M680x0 series,
specifically targeting the M68040 as emulated by QEMU.

The implementation includes exception vectors, early startup code, and
minimal CPU initialization and relocation stubs. It also defines the
standard m68k boot information structure used for passing hardware
information to the operating system. To ensure compatibility, ColdFire-
specific library objects such as cache and interrupt handling are
excluded from the build when M68040 is selected.

Additionally, apply a specific workaround during the early memory
reservation stage. Use a manual loop to clear global data instead of
the standard memset() function, as utilizing memset() at this point was
observed to cause a hang on the QEMU platform.

Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
Acked-by: Angelo Dureghello <angelo@kernel-space.org>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
4 months agosysreset: Add QEMU virtual system controller driver
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:33 +0000 (20:18 +0000)] 
sysreset: Add QEMU virtual system controller driver

Introduce a new sysreset driver for the QEMU Virtual System Controller.
This device is found on QEMU "virt" machines (such as the m68k virt
target) and provides a mechanism to trigger system reset and power-off
events.

The driver maps U-Boot sysreset types to the corresponding controller
commands:
- SYSRESET_WARM / SYSRESET_COLD -> VIRT_CTRL_CMD_RESET
- SYSRESET_POWER_OFF -> VIRT_CTRL_CMD_HALT

Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
4 months agortc: goldfish: Support platform data for non-DT probing
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:32 +0000 (20:18 +0000)] 
rtc: goldfish: Support platform data for non-DT probing

Currently, the Goldfish RTC driver exclusively relies on device tree
to retrieve the base address, failing immediately if dev_read_addr()
returns FDT_ADDR_T_NONE. This restriction prevents the driver from
being used on platforms that instantiate devices via U_BOOT_DRVINFO()
instead of device tree, such as the QEMU m68k virt machine.

Add support for platform data to address this limitation. Introduce a
new .of_to_plat hook to handle device tree parsing and populate the
platform data. Update the probe function to rely exclusively on this
platform data, enabling support for both Device Tree and manual
instantiation.

Introduce a new header file include/goldfish_rtc.h to define the
platform data structure.

Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 months agotimer: Add Goldfish timer driver
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:31 +0000 (20:18 +0000)] 
timer: Add Goldfish timer driver

Add support for the Goldfish timer driver. This driver utilizes the
Goldfish RTC hardware to provide a nanosecond-resolution timer. This
virtual device is commonly found in QEMU virtual machines (such as the
m68k virt machine) and Android emulators.

The driver implements the standard U-Boot timer UCLASS interface,
exposing a 64-bit monotonically increasing counter with a 1GHz clock
rate derived from the RTC registers.

Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
Tested-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Yao Zi <me@ziyao.cc>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Angelo Dureghello <angelo@kernel-space.org>
4 months agoserial: Add Goldfish TTY driver
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:30 +0000 (20:18 +0000)] 
serial: Add Goldfish TTY driver

Add support for the Google Goldfish TTY serial device. This virtual
device is commonly used in QEMU virtual machines (such as the m68k
virt machine) and Android emulators.

The driver implements basic console output and input polling using the
Goldfish MMIO interface.

Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com>
Reviewed-by: Yao Zi <me@ziyao.cc>
Tested-by: Daniel Palmer <daniel@0x0f.com>
Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
Acked-by: Angelo Dureghello <angelo@kernel-space.org>
4 months agoMerge patch series "arm: mach-k3: j721s2: Provide a way to obtain boot device for...
Tom Rini [Mon, 2 Feb 2026 19:39:52 +0000 (13:39 -0600)] 
Merge patch series "arm: mach-k3: j721s2: Provide a way to obtain boot device for non SPLs"

This series from Dominik Haller <d.haller@phytec.de> provides a way for
TI K3 platforms to determine their boot device outside of SPL and then
adds support for the PHYTEC phyCORE-AM68x/TDA4x SoM.

Link: https://lore.kernel.org/r/20260116014116.767555-1-d.haller@phytec.de
4 months agodoc: board: phytec: Add phyCORE-AM68x/TDA4x
Dominik Haller [Fri, 16 Jan 2026 01:41:13 +0000 (17:41 -0800)] 
doc: board: phytec: Add phyCORE-AM68x/TDA4x

Add documentation for the PHYTEC phyCORE-AM68x/TDA4x (J721S2 family) SoM.

Signed-off-by: Dominik Haller <d.haller@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
4 months agoboard: phytec: Add PHYTEC phyCORE-AM68x/TDA4x SoM
Dominik Haller [Fri, 16 Jan 2026 01:41:12 +0000 (17:41 -0800)] 
board: phytec: Add PHYTEC phyCORE-AM68x/TDA4x SoM

Add support for the PHYTEC phyCORE-AM68x/TDA4x (J721S2 family) SoM.

Supported features:
- 4GB LPDDR4 RAM
- eMMC
- SD-Card
- Ethernet
- OSPI
- AVS
- debug UART

Signed-off-by: Dominik Haller <d.haller@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
4 months agoarm: mach-k3: j721s2: Provide a way to obtain boot device for non SPLs
Dominik Haller [Fri, 16 Jan 2026 01:41:11 +0000 (17:41 -0800)] 
arm: mach-k3: j721s2: Provide a way to obtain boot device for non SPLs

Introduce get_boot_device() to obtain the booting device. Make it also
available for non SPL builds so u-boot can also know the device it
is booting from.

Signed-off-by: Dominik Haller <d.haller@phytec.de>
4 months agomkimage: fit: align DTs in external data to 8 Bytes by default
Marek Vasut [Thu, 29 Jan 2026 03:53:29 +0000 (04:53 +0100)] 
mkimage: fit: align DTs in external data to 8 Bytes by default

Unless specified otherwise using the mkimage -B n option, align
DTs in fitImage external data to 8 Bytes, and retain alignment
of everything else to 4 Bytes. This should fulfill the DTspec
requirement, that DTs must be placed at 8 Byte aligned addresses,
even for DTs that are part of fitImage with external data. For
fitImage with embedded data, there is nothing we can do, as the
embedded data are aligned to 4 Bytes, just like any other DT
property.

Replace fdtdec_get_child_count() counting of images with counting
of padding using fdt_for_each_subnode(). This is much more useful,
as the added up padding can be passed directly to calloc() when
allocating the buffer which holds the external data. The image
count is no longer needed.

Adjust the image layouting such, that buf_ptr is incremented to
place the next image at align_size aligned offset. This is done
at the beginning of the loop, once the align_size for current
image can be determined from the current image type.

Update binman test to validate the new 8 Byte alignment.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
4 months agovideo: exynos: node variable should not be unsigned
Andrew Goodbody [Tue, 30 Sep 2025 16:43:46 +0000 (17:43 +0100)] 
video: exynos: node variable should not be unsigned

THe variable 'node' is assigned a value of an int, tested for being less
than or equal to zero then passed as an argument to a function that
takes an int so 'node' should not be unsigned. Fix it.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
4 months agoARM: dts: add dtsi for exynos7870-on7xelte (Samsung Galaxy J7 Prime)
Kaustabh Chakraborty [Mon, 26 Jan 2026 10:53:45 +0000 (16:23 +0530)] 
ARM: dts: add dtsi for exynos7870-on7xelte (Samsung Galaxy J7 Prime)

Add a framebuffer node to the DTSI in order to ensure that display
continues to work, as since v6.19 of devicetree-rebasing sources, it
uses Samsung's DECON (Display Enhancement CONtroller) for display, which
is, as of yet, not supported in U-Boot.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
4 months agoARM: dts: add dtsi for exynos7870-j6lte (Samsung Galaxy J6)
Kaustabh Chakraborty [Mon, 26 Jan 2026 10:53:44 +0000 (16:23 +0530)] 
ARM: dts: add dtsi for exynos7870-j6lte (Samsung Galaxy J6)

Add a framebuffer node to the DTSI in order to ensure that display
continues to work, as since v6.19 of devicetree-rebasing sources, it
uses Samsung's DECON (Display Enhancement CONtroller) for display, which
is, as of yet, not supported in U-Boot.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
4 months agoARM: dts: add dtsi for exynos7870-a2corelte (Samsung Galaxy A2 Core)
Kaustabh Chakraborty [Mon, 26 Jan 2026 10:53:43 +0000 (16:23 +0530)] 
ARM: dts: add dtsi for exynos7870-a2corelte (Samsung Galaxy A2 Core)

Add a framebuffer node to the DTSI in order to ensure that display
continues to work, as since v6.19 of devicetree-rebasing sources, it
uses Samsung's DECON (Display Enhancement CONtroller) for display, which
is, as of yet, not supported in U-Boot.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
4 months agoboot/fit: print error name in boot_get_fdt_fit()
David Lechner [Thu, 29 Jan 2026 20:03:41 +0000 (14:03 -0600)] 
boot/fit: print error name in boot_get_fdt_fit()

Print the actual error code in a couple of places in boot_get_fdt_fit().

These are FDT error codes, not errno, so printing the string is more
helpful than printing the numeric value.

The only caller of boot_get_fdt_fit() unconditionally replaces the
returned error code (fdt_noffset) with ENOENT so the actual error would
otherwise be lost.

Signed-off-by: David Lechner <dlechner@baylibre.com>
4 months agousb: gadget: dwc2: Move dr_mode check from of_to_plat() to bind()
Jonas Karlman [Thu, 29 Jan 2026 19:52:05 +0000 (19:52 +0000)] 
usb: gadget: dwc2: Move dr_mode check from of_to_plat() to bind()

Rockchip RK3288 and RK3506 contain two DWC2 USB controllers, typically
one controller use dr_mode=otg and the other one use dr_mode=host.

With USB_GADGET_DWC2_OTG, DM_USB_GADGET and USB_DWC2 enabled this result
in the dwc2-udc-otg driver binding to both controllers, however only one
will probe due to use of dr_mode=host on the other one.

After the commit 6668b8e7cc68 ("dm: core: Support multiple drivers with
same compatibles") it is possible to bind one controller to the
dwc2-udc-otg driver and the other one to the dwc2_usb driver.

Move the dr_mode check from of_to_plat() to bind() to allow dm core to
bind the dwc2 host driver to dr_mode=host controllers.

Before this:

  => dm tree
   ...
   usb_gadget    0  [   ]   dwc2-udc-otg          |   |-- usb@ff740000
   usb_gadget    1  [   ]   dwc2-udc-otg          |   |-- usb@ff780000

  => usb start
  starting USB...
  No USB controllers found

After this:

  dwc2-udc-otg usb@ff780000: Invalid dr_mode 1

  => dm tree
   ...
   usb_gadget    0  [   ]   dwc2-udc-otg          |   |-- usb@ff740000
   usb           0  [   ]   dwc2_usb              |   |-- usb@ff780000

  => usb start
  starting USB...
  USB DWC2
  Bus usb@ff780000: 1 USB Device(s) found

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Link: https://lore.kernel.org/r/20260129195207.2260264-1-jonas@kwiboo.se
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
4 months agousb: dwc3: core: improve reset sequence
Chris Morgan [Thu, 15 Jan 2026 23:01:35 +0000 (17:01 -0600)] 
usb: dwc3: core: improve reset sequence

According to Synopsys Databook, we shouldn't be
relying on GCTL.CORESOFTRESET bit as that's only for
debugging purposes. Instead, let's use DCTL.CSFTRST
if we're OTG or PERIPHERAL mode.

Host side block will be reset by XHCI driver if
necessary. Note that this reduces amount of time
spent on dwc3_probe() by a long margin.

We're still gonna wait for reset to finish for a
long time (default to 1ms max), but tests show that
the reset polling loop executed at most 19 times
(modprobe dwc3 && modprobe -r dwc3 executed 1000
times in a row).

Note that this patch was submitted to Linux in 2016 [1], however I can
confirm it is needed to support gadget mode in U-Boot on my device.
While I am referencing this patch from Linux I am in fact taking the
full existing dwc3_core_soft_reset() function from Linux as it exists
in v6.19-rc5, so it may differ slightly from the information in the
2016 patch.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/patch/drivers/usb/dwc3?id=f59dcab176293b646e1358144c93c58c3cda2813

Suggested-by: Mian Yousaf Kaukab <yousaf.kaukab@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260115230135.183158-5-macroalpha82@gmail.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
4 months agousb: dwc3: gadget: Don't send unintended link state change
Chris Morgan [Thu, 15 Jan 2026 23:01:34 +0000 (17:01 -0600)] 
usb: dwc3: gadget: Don't send unintended link state change

DCTL.ULSTCHNGREQ is a write-only field. When doing a read-modify-write
to DCTL, the driver must make sure that there's no unintended link state
change request from whatever is read from DCTL.ULSTCHNGREQ. Set link
state change to no-action when the driver writes to DCTL.

Note that this patch was submitted upstream in Linux in 2020 [1],
and I've confirmed I need it in U-Boot to enable gadget mode.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/patch/drivers/usb/dwc3?id=5b738211fb59e114727381d07c647a77c0010996

Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260115230135.183158-4-macroalpha82@gmail.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
4 months agousb: dwc3: Increase DWC3 controller halt timeout
Chris Morgan [Thu, 15 Jan 2026 23:01:33 +0000 (17:01 -0600)] 
usb: dwc3: Increase DWC3 controller halt timeout

Since EP0 transactions need to be completed before the controller halt
sequence is finished, this may take some time depending on the host and the
enabled functions.  Increase the controller halt timeout, so that we give
the controller sufficient time to handle EP0 transfers.

This patch was originally submitted to Linux in 2022, but is required to
use USB gadget mode on my device in U-Boot.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=461ee467507cb98a348fa91ff8460908bb0ea423

Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260115230135.183158-3-macroalpha82@gmail.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
4 months agousb: dwc3: core: Add ip and version_type support from Linux
Chris Morgan [Thu, 15 Jan 2026 23:01:32 +0000 (17:01 -0600)] 
usb: dwc3: core: Add ip and version_type support from Linux

Add support for the ip and version_type fields from the Linux
version of the dwc3 driver. Included in this is support for a
few additional macros in the header from Linux as well.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Link: https://lore.kernel.org/r/20260115230135.183158-2-macroalpha82@gmail.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
4 months agovideo: correct label for cyclic video_idle
Heinrich Schuchardt [Wed, 31 Dec 2025 19:21:57 +0000 (20:21 +0100)] 
video: correct label for cyclic video_idle

When the cyclic function video_idle() takes too long, a message like the
following is displayed:

   cyclic function video_init took too long: 87707us vs 5000us max

The text "video_init" is misleading. Replace it by "video_idle".

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
4 months agodts: add Exynos vendor support for OF_UPSTREAM_VENDOR
Kaustabh Chakraborty [Sat, 24 Jan 2026 16:58:24 +0000 (22:28 +0530)] 
dts: add Exynos vendor support for OF_UPSTREAM_VENDOR

When building Exynos boards, configure OF_UPSTREAM_VENDOR to build all
device trees in:
 - "samsung/" for 32-bit ARM platforms.
 - "exynos/" for 64-bit ARM platforms.

Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 months agomach-k3: am64x: add support for speed grades
Anshul Dalal [Thu, 22 Jan 2026 07:19:56 +0000 (12:49 +0530)] 
mach-k3: am64x: add support for speed grades

With the support for common speed grade configuration added in commit
65a6b83a9b7f ("mach-k3: refactor A53 speed grade clock-rate fixup"),
this patch extends the support to AM64x SoCs.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
4 months agoconfigs: mt8365_evk: enable mmc command
David Lechner [Wed, 21 Jan 2026 22:46:05 +0000 (16:46 -0600)] 
configs: mt8365_evk: enable mmc command

Enable the MMC command on the MediaTek MT8365 EVK. This is useful since
the primary boot device is an eMMC.

A few partition commands are also enabled since the mmc command alone
is not enough to read all partitions on the eMMC.

Signed-off-by: David Lechner <dlechner@baylibre.com>
4 months agoMerge tag 'u-boot-stm32-20260129' of https://source.denx.de/u-boot/custodians/u-boot-stm
Tom Rini [Thu, 29 Jan 2026 15:00:01 +0000 (09:00 -0600)] 
Merge tag 'u-boot-stm32-20260129' of https://source.denx.de/u-boot/custodians/u-boot-stm

- spi: stm32: OSPI and QSPI optimization
- Update stm32 clock drivers to restore boot for STM32MP13/STM32MP2
  board family
- Add bootph-all in ltdc node in stm32mp257f-ev1-u-boot
- Use CONFIG_STM32MP15X to discern STM32MP15xx on DH STM32MP15xx DHSOM
- Reinstate missing SPL configs for DH STM32MP15xx DHSOM
- stm32mp2 boards: read boot index from backup register
- video: simple_panel: add support for "rocktech,rk043fn48h" display
- Add .of_to_plat callback in stm32_ltdc driver

4 months agomisc: Keep FSL_IFC available on PowerPC as well
Tom Rini [Wed, 28 Jan 2026 19:26:17 +0000 (13:26 -0600)] 
misc: Keep FSL_IFC available on PowerPC as well

This symbol is used on a number of PowerPC platforms as well, so make it
available there again.

Fixes: 424b324165ea ("armv7: Add CPLD support via IFC to the ls1021a-iot board.")
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
4 months agovideo: simple_panel: add support for "rocktech,rk043fn48h" display
Raphael Gallais-Pou [Tue, 27 Jan 2026 11:11:58 +0000 (12:11 +0100)] 
video: simple_panel: add support for "rocktech,rk043fn48h" display

Add the compatible "rocktech,rk043fn48h" for simple-panel driver.

Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 months agoboard: stm32mp2: read boot index from backup register
Dario Binacchi [Sun, 18 Jan 2026 10:48:43 +0000 (11:48 +0100)] 
board: stm32mp2: read boot index from backup register

Following the 'commit 95b5a7de30f6 ("FWU: STM32MP1: Add support to
read boot index from backup register")', this patch enables reading
the boot index from backup registers on STM32MP2 platforms.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 months agoARM: stm32: Reinstate missing SPL configs for DH STM32MP15xx DHSOM
Marek Vasut [Thu, 8 Jan 2026 02:16:51 +0000 (03:16 +0100)] 
ARM: stm32: Reinstate missing SPL configs for DH STM32MP15xx DHSOM

Re-enable missing configs for DH STM32MP15xx DHSOM, to allow those
devices to successfully boot again.

Signed-off-by: Marek Vasut <marex@nabladev.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 months agoARM: stm32: Use CONFIG_STM32MP15X to discern STM32MP15xx on DH STM32MP15xx DHSOM
Marek Vasut [Thu, 8 Jan 2026 02:16:28 +0000 (03:16 +0100)] 
ARM: stm32: Use CONFIG_STM32MP15X to discern STM32MP15xx on DH STM32MP15xx DHSOM

Use plain CONFIG_STM32MP15X to discern code which is specific to
STM32MP15xx in DH STM32MP1 DHSOM board files.

Signed-off-by: Marek Vasut <marex@nabladev.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 months agovideo: stm32: ltdc: add .of_to_plat callback
Raphael Gallais-Pou [Tue, 9 Dec 2025 12:19:05 +0000 (13:19 +0100)] 
video: stm32: ltdc: add .of_to_plat callback

Drivers should extract device-tree data before probing via the
.of_to_plat hook.

Implement it for stm32_ltdc driver.  No functional change.

Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 months agoARM: dts: stm32: Add bootph-all in ltdc node in stm32mp257f-ev1-u-boot
Patrice Chotard [Fri, 16 Jan 2026 19:12:06 +0000 (20:12 +0100)] 
ARM: dts: stm32: Add bootph-all in ltdc node in stm32mp257f-ev1-u-boot

Add bootph-all property in ltdc node in stm32mp257f-ev1-u-boot.dtsi
to fix the following issue :

Video device 'display-controller@48010000' cannot allocate frame buffer
memory - ensure the device is set up beforen
stm32_rifsc bus@42080000: display-controller@48010000 failed to bind on
bus (-28)
stm32_rifsc bus@42080000: Some child failed to bind (-28)
initcall_run_r(): initcall initr_dm() failed
ERROR ### Please RESET the board ###

Fixes: 29ab19c2bead ("Subtree merge tag 'v6.18-dts' of dts repo [1] into dts/upstream")
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 months agoclk: stm32: Update clock management for STM32MP13/25
Patrice Chotard [Fri, 16 Jan 2026 18:57:27 +0000 (19:57 +0100)] 
clk: stm32: Update clock management for STM32MP13/25

During clock's registration, clock's name are used to establish parent -
child relation. On STM32MP13 and STM32MP25, most of SCMI clocks are parent
clocks.

Since commit fdb1bffe2827 ("clk: scmi: Postpone clock name resolution"),
all scmi clocks are named by default "scmi-%zu" until they are enabled,
it breaks clocks registration and boot process for STM32MP13/25
platforms.

Rework the STM32 core clock driver and STM32MP13/25 clock description
to use clock index instead of their real name.

Introduce struct clk_parent_data which allows to identify parent clock
either by index or by name. Name is only used for particular clocks
provided by IP which are clock provider as i2s/i2s_ckin, usb0/ck_usbo_48m,
and ltdc/ck_ker_ltdc.

STM32_GATE() and STM32_COMPOSITE_NOMUX macros are updated in order to
use parent clock index.

As STM32MP13 supports both SPL and SCMI boot, keep using an array
with clock's name for SPL.

Fixes: fdb1bffe2827 ("clk: scmi: Postpone clock name resolution")
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 months agoARM: dts: stm32: Add SCMI clocks in rcc node for stm32mp131.dtsi
Patrice Chotard [Fri, 16 Jan 2026 18:57:26 +0000 (19:57 +0100)] 
ARM: dts: stm32: Add SCMI clocks in rcc node for stm32mp131.dtsi

Add SCMI clocks. These clocks are used as parent clocks and are
referenced by their rcc's node position in clk-stm32mp13.c

Fixes: fdb1bffe2827 ("clk: scmi: Postpone clock name resolution")
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 months agoclk: stm32mp13: Reorder include files
Patrice Chotard [Fri, 16 Jan 2026 18:57:25 +0000 (19:57 +0100)] 
clk: stm32mp13: Reorder include files

Reorder include following rules available here :
https://docs.u-boot.org/en/latest/develop/codingstyle.html#include-files

Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 months agospi: stm32-qspi: Optimize FIFO accesses using u16 or u32
Patrice Chotard [Tue, 16 Dec 2025 15:31:54 +0000 (16:31 +0100)] 
spi: stm32-qspi: Optimize FIFO accesses using u16 or u32

FIFO accesses uses u8 only for read/write.
In order to optimize throughput, add u16 or u32 read/write
accesses when possible.
Set FIFO threshold level value accordingly.

Test performed by writing and reading 64MB on sNOR on
stm32mp157c-ev1 board:

          before      after    ratio
Write :  428 KB/s   719 KB/s    +68%
Read  :  520 KB/s  3200 KB/s   +615%

Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 months agospi: stm32-qspi: Increase read throughput in indirect mode
Patrice Chotard [Tue, 16 Dec 2025 15:31:53 +0000 (16:31 +0100)] 
spi: stm32-qspi: Increase read throughput in indirect mode

When WATCHDOG_RESET() was replaced by schedule() in commit
29caf9305b6f ("cyclic: Use schedule() instead of WATCHDOG_RESET()")
we not only reset the watchdog but also call the cyclic infrastructure
which takes time and has impact on read accesses performances.

Move schedule() from _stm32_qspi_read_fifo() to _stm32_qspi_poll()
and call schedule() only every 1MB chunk of data.

Test performed by reading 64MB on sNOR on stm32mp157c-ev1 board:

          before      after    ratio
Read  :  201 KB/s    520KB/s   +258%

Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 months agospi: stm32-ospi: Increase read throughput in indirect mode
Patrice Chotard [Tue, 16 Dec 2025 15:31:52 +0000 (16:31 +0100)] 
spi: stm32-ospi: Increase read throughput in indirect mode

Schedule() is called every u8/u16 or u32 read accesses which is overkill.
Move schedule() from stm32_ospi_read_fifo() to stm32_ospi_tx_poll()
and call schedule() only every 1MB chunk of data.

Test performed by reading 64MB on sNOR on stm32mp257f-ev1 board:

          before      after    ratio
Read  :  10.6MB/s    14.2MB/s   +34%

Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 months agoMerge tag 'doc-2026-04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Wed, 28 Jan 2026 23:04:34 +0000 (17:04 -0600)] 
Merge tag 'doc-2026-04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request doc-2026-04-rc2

Documentation:

* describe QEMU VGA emulation
* development process
  - Move the existing block about patch application
  - Rework the custodian feedback section
  - Explain when/how Custodians may edit patches
  - Move Custodians section
  - Make "Work flow of a Custodian" a subsection
  - Document using b4 and patchwork for custodians
* develop: codingstyle: Update b4 external link
* develop: sending_patches: Update link to patchwork

4 months agoMerge patch series "board: ti: Add 32k crystal initialization"
Tom Rini [Wed, 28 Jan 2026 21:54:50 +0000 (15:54 -0600)] 
Merge patch series "board: ti: Add 32k crystal initialization"

Vishal Mahaveer <vishalm@ti.com> says:

Add 32k crystal initialization support for am62x, am62ax and am62px TI boards.

Link: https://lore.kernel.org/r/20260121195340.3041549-1-vishalm@ti.com
4 months agoboard: ti: am62px: Enable 32k crystal on the board
Vishal Mahaveer [Wed, 21 Jan 2026 19:53:40 +0000 (13:53 -0600)] 
board: ti: am62px: Enable 32k crystal on the board

Enable 32k crystal on the board. If external 32k source is not
used, 32k rc-osc comes into play, which is accurate to +-20%.

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
4 months agoboard: ti: am62ax/am62dx: Enable 32k crystal on the board
Vishal Mahaveer [Wed, 21 Jan 2026 19:53:39 +0000 (13:53 -0600)] 
board: ti: am62ax/am62dx: Enable 32k crystal on the board

Enable 32k crystal on the board. If external 32k source is not
used, 32k rc-osc comes into play, which is accurate to +-20%.

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
4 months agoboard: ti: am62x: Enable 32k crystal on the board
Vishal Mahaveer [Wed, 21 Jan 2026 19:53:38 +0000 (13:53 -0600)] 
board: ti: am62x: Enable 32k crystal on the board

Enable 32k crystal on the board. If external 32k source is not
used, 32k rc-osc comes into play, which is accurate to +-20%.

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
4 months agoboard: ti: common: Add function for initialization of 32k crystal
Vishal Mahaveer [Wed, 21 Jan 2026 19:53:37 +0000 (13:53 -0600)] 
board: ti: common: Add function for initialization of 32k crystal

Add a common helper function for doing the basic configuration
required for enabling the 32k crystal on some of the TI boards.

Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
4 months agotools: Handle realloc failure in strlist_add
Francois Berder [Mon, 19 Jan 2026 14:49:06 +0000 (15:49 +0100)] 
tools: Handle realloc failure in strlist_add

If realloc fails, list->strings was set to NULL and
it would create a leak. This commit ensures that if we cannot
add a string to the list, the list stays in a good state.

Signed-off-by: Francois Berder <fberder@outlook.fr>
4 months agoarmv8: u-boot-spl.lds: Place binman symbols at end of binary
Jonas Karlman [Thu, 22 Jan 2026 17:20:54 +0000 (17:20 +0000)] 
armv8: u-boot-spl.lds: Place binman symbols at end of binary

It can be useful in xPL to access symbols from binman, such as the
offset/position and size of a binman entry.

Place these binman symbols together at the end of the xPL binary for
ARMv8, similar to ARM and RISC-V.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
4 months agoMerge patch series "Add pinctrl driver for mt8188"
Tom Rini [Wed, 28 Jan 2026 20:28:55 +0000 (14:28 -0600)] 
Merge patch series "Add pinctrl driver for mt8188"

Julien Stephan <jstephan@baylibre.com> says:

The driver is based on the kernel driver for mt8188.

While at it, also add pinmux_property_set ops for mediatek pinctrl framework.

Link: https://lore.kernel.org/r/20260122-add-mt8188-pinctrl-support-v2-0-324b4c8f2b64@baylibre.com
4 months agopinctrl: mediatek: add pinmux_property_set ops support
Vitor Sato Eschholz [Thu, 22 Jan 2026 16:38:23 +0000 (17:38 +0100)] 
pinctrl: mediatek: add pinmux_property_set ops support

Add pinmux_property_set ops for mediatek pinctrl framework

Signed-off-by: Julien Masson <jmasson@baylibre.com>
Signed-off-by: Vitor Sato Eschholz <vsatoes@baylibre.com>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Tested-by: David Lechner <dlechner@baylibre.com>
4 months agopinctrl: mediatek: Add pinctrl driver for MT8188 SoC
Chris-QJ Chen [Thu, 22 Jan 2026 16:38:22 +0000 (17:38 +0100)] 
pinctrl: mediatek: Add pinctrl driver for MT8188 SoC

Add pinctrl driver for mt8188. The driver is based on the kernel driver.

Signed-off-by: Chris-QJ Chen <chris-qj.chen@mediatek.com>
Signed-off-by: Jill.Wu <shu-yun.wu@mediatek.com>
Signed-off-by: Vitor Sato Eschholz <vsatoes@baylibre.com>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
4 months agodoc: develop: process: Document using b4 and patchwork for custodians
Tom Rini [Tue, 20 Jan 2026 22:31:46 +0000 (16:31 -0600)] 
doc: develop: process: Document using b4 and patchwork for custodians

- We already have good custodian documentation for patchwork, add a
  reference and then link to it here.
- Add a reference to the existing b4 documentation, and reference it
  here.
- Note and link to patchwork integration, am/shazam and ty features of
  b4 as these are the most likely useful portions. Be specific about
  keeping the default ${summary} as that includes important information.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
4 months agodoc: develop: sending_patches: Update link to patchwork
Tom Rini [Tue, 20 Jan 2026 22:31:45 +0000 (16:31 -0600)] 
doc: develop: sending_patches: Update link to patchwork

Make use of an anonymous reference for the external link here, per rST
best practices.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
4 months agodoc: develop: codingstyle: Update b4 external link
Tom Rini [Tue, 20 Jan 2026 22:31:44 +0000 (16:31 -0600)] 
doc: develop: codingstyle: Update b4 external link

Rather than pointing at the source code for b4, point the the official
documentation. Also, use an anonymous reference for the link, per rST
best practices.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
4 months agodoc: develop: process: Make "Work flow of a Custodian" a subsection
Tom Rini [Tue, 20 Jan 2026 22:31:43 +0000 (16:31 -0600)] 
doc: develop: process: Make "Work flow of a Custodian" a subsection

Make the "Work flow of a Custodian" section be a subsection of the
Custodians section.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
4 months agodoc: develop: process: Move Custodians section
Tom Rini [Tue, 20 Jan 2026 22:31:42 +0000 (16:31 -0600)] 
doc: develop: process: Move Custodians section

Move the "Custodians" section to be after the "Review Process, Git Tags"
section, in preparation for more re-organization.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
4 months agodoc: develop: process: Explain when/how Custodians may edit patches
Tom Rini [Tue, 20 Jan 2026 20:11:45 +0000 (14:11 -0600)] 
doc: develop: process: Explain when/how Custodians may edit patches

As seen with commit d503633a3676 ("Revert "doc: board: starfive: update
jh7110 common description""), it has not always been clear what is and
isn't allowed by custodians, and what the expectations are. To prevent
further unintentional conflicts, document the limited cases where
custodians are allowed to modify patches directly, and how to do that.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
4 months agodoc: develop: process: Rework the custodian feedback section
Tom Rini [Tue, 20 Jan 2026 20:11:44 +0000 (14:11 -0600)] 
doc: develop: process: Rework the custodian feedback section

Now that we have two items here, rework this slightly to be using bullet
points, and so easier to expand on.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
4 months agodoc: develop: process: Move the existing block about patch application
Tom Rini [Tue, 20 Jan 2026 20:11:43 +0000 (14:11 -0600)] 
doc: develop: process: Move the existing block about patch application

We have a long block about the expectations and feedback about a patch
applying, or not, as part of the Custodian workflow. Move this to the
Custodians section from the Workflow of a custodian section.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
4 months agodoc: describe QEMU VGA emulation
Heinrich Schuchardt [Thu, 1 Jan 2026 14:17:43 +0000 (15:17 +0100)] 
doc: describe QEMU VGA emulation

Describe how the QEMU defconfigs can be used with an emulated GPU.

Reviewed-by: Simon Glass <simon.glass@canonical.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 months agoarm: Remove rel.dyn from SPL linker scripts
Tom Rini [Tue, 27 Jan 2026 21:31:49 +0000 (15:31 -0600)] 
arm: Remove rel.dyn from SPL linker scripts

As of v2026.01, no platforms contain any rel.dyn sections in their xPL
phase images. Their inclusion in linker scripts initially was an
oversight as part of taking the full U-Boot linker scripts and modifying
them down. Then in commit 8b0ebe054bb3 ("arm: Update linker scripts to
ensure appended device tree is aligned") these sections were used to
force correct alignment for the device tree. This however, lead to a
different problem.

That problem is that when we do not have a separate BSS section in SPL
we instead would overlay the BSS with the rel.dyn section, in the common
linker script case. This in turn lead to creating an incorrectly sized
BSS "pad" file sometimes (depending on arbitrary changes within the rest
of the binary itself). This in turn lead to the dtb being in the wrong
location in the binary and not found at run time.

This commit fixes a few things:
- Remove the rel.dyn section from all ARM SPL linker scripts.
- In turn, this moves the dtb alignment statement in to another section.
- For ast2600 which uses CONFIG_POSITION_INDEPENDENT we need to keep the
  symbols however.

Tested-by: Fabio Estevam <festevam@gmail.com>
Reported-by: Fabio Estevam <festevam@gmail.com>
Co-developed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
4 months ago.b4-config: Add some patchwork related settings
Tom Rini [Wed, 21 Jan 2026 15:19:30 +0000 (09:19 -0600)] 
.b4-config: Add some patchwork related settings

To make it easier for custodians to use b4 with patchwork, add some
defaults to the in-tree .b4-config. The API key will still have to be
configured.

Suggested-by: Quentin Schulz <quentin.schulz@cherry.de>
Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
4 months agoMerge patch series "dm: core: Support same compatible in host/gadget musb drivers"
Tom Rini [Wed, 28 Jan 2026 15:21:17 +0000 (09:21 -0600)] 
Merge patch series "dm: core: Support same compatible in host/gadget musb drivers"

Markus Schneider-Pargmann (TI.com) <msp@baylibre.com> says:

musb currently uses a wrapper driver that binds on the parent device of
the actual musb devices to manage the differentiation between gadget and
host modes. However in the upstream devicetree this parent devicetree
node can not be used to match the wrapper driver.

To be able to probe the musb devices in host/gadget mode directly, this
series introduces support for returning -ENODEV in bind functions
resulting in iterating the remaining drivers potentially binding to
other drivers that match the compatible.

Link: https://lore.kernel.org/r/20260127-topic-musb-probing-v2026-01-v4-0-ea3201e0f809@baylibre.com
4 months agotest: dm: Add compatible multimatch test
Markus Schneider-Pargmann (TI.com) [Tue, 27 Jan 2026 11:03:39 +0000 (12:03 +0100)] 
test: dm: Add compatible multimatch test

Add a test for binding of multiple drivers with the same compatible. If
one of the drivers returns -ENODEV the other one needs to be bound.

Reviewed-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com>
4 months agodm: core: lists_bind_fdt: Indent continuation debug log message
Markus Schneider-Pargmann (TI) [Tue, 27 Jan 2026 11:03:38 +0000 (12:03 +0100)] 
dm: core: lists_bind_fdt: Indent continuation debug log message

The loop in lists_bind_fdt uses an indented style for log messages
within the loop and normal messages for errors that lead to the exit of
the function. Due to the change of the previous patch that adds support
for continuation on -ENODEV returned by bind, the log message should be
indented.

Signed-off-by: Markus Schneider-Pargmann (TI) <msp@baylibre.com>
4 months agodm: core: Support multiple drivers with same compatibles
Markus Schneider-Pargmann (TI.com) [Tue, 27 Jan 2026 11:03:37 +0000 (12:03 +0100)] 
dm: core: Support multiple drivers with same compatibles

Currently once a driver matched the compatible string of a device, other
drivers are ignored. If the first matching driver returns -ENODEV, no
other possibly matching drivers are iterated with that compatible of the
device. Instead the next compatible in the list of compatibles is
selected, assuming only one driver matches one compatible at a time.

To be able to use the bind function to return -ENODEV and continue
matching other drivers with the same compatible, move the for loop a bit
to continue the for loop after -ENODEV was returned. The loop had to be
adjusted a bit to still support the 'drv' argument properly. Some
simplifications were done as well.

The modification will only add additional loop iterations if -ENODEV is
returned. Otherwise the exit and continue conditions for the loop stay
the same and do not cause any additional iterations and should not
impact performance.

This is required for ti-musb-host and ti-musb-peripheral which both
match on the same device but differ based on the dr_mode DT property.
Depending on this property, the driver is either UCLASS_USB or
UCLASS_USB_GADGET_GENERIC. By checking the DT property in the bind
function and returning -ENODEV the other driver can probe instead.

Reviewed-by: Simon Glass <simon.glass@canonical.com>
Acked-by: Dinesh Maniyam <dinesh.maniyam@altera.com>
Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com>