spi: cadence-quadspi: Use STIG mode for all ops with small payload
OSPI controller supports all types of op variants in STIG mode,
only limitation being that the data payload should be less than
8 bytes when not using memory banks.
STIG mode is more stable for operations that send small data
payload and is more efficient than using DMA for few bytes of
memory accesses. It overcomes the limitation of minimum 4 bytes
read from flash into RAM seen in DAC mode.
Use STIG mode for all read and write operations that require
data input/output of less than 8 bytes from the flash, and thereby
support all four phases, cmd/address/dummy/data, through OSPI STIG.
Also, remove the reorder address chunk in apb_command_write since we now
setup ADDR BIT field that does the same job in a cleaner way.
spi: cadence-quadspi: Fix check condition for DTR ops
buswidth and dtr fields in spi_mem_op are only valid when the
corresponding spi_mem_op phase has a non-zero length. For example,
SPI NAND core doesn't set buswidth when using SPI_MEM_OP_NO_ADDR
phase.
Fix the dtr checks in set_protocol() to ignore empty spi_mem_op
phases, as checking for dtr field in empty phase will result in
false negatives.
This patch adds fixups for s25fs512s to address the following issues
from reading SFDP:
- Non-uniform sectors by factory default. The setting needs to be
checked and assign erase hook as needed.
- Page size is wrongly advertised in SFDP.
- READ_1_1_2 (3Bh/3Ch), READ_1_1_4 (6Bh/6Ch), and PP_1_1_4 (32h/34h)
are not supported.
- Bank Address Register (BAR) is not supported.
In addition, volatile version of Quad Enable is used for safety.
Based on patch by Takahiro Kuwano with s25fs_s_post_bfpt_fixup() updated
to use 4-byte address commands instead of extended address mode and the
page_size is fixed to 256
For future use, manufacturer code should be moved out from framework
code as same as in Linux.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Cong Dang <cong.dang.xn@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Family of panels used by HTC in One X. Though were used variants
at least from 3 vendors, this driver provides generic support for
all of them.
Tested-by: Ion Agorria <ion@agorria.com> # HTC One X T30 Sony Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30 Sharp Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
DC based PWM backlight is found on some T20 and T30 devices
(HTC One X). This backlight is controlled by Tegra DC and
is adjustable by the DC PM0 or PM1 signal.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # HTC One X T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
SSD2825 is an innovative and cost-effective MIPI Bridge Chip solution
targeting high resolution smartphones. It can convert 24bit RGB
interface into 4-lane MIPI-DSI interface to drive extremely high
resolution display modules of up to 800 x 1366, while supporting AMOLED,
a-si LCD or LTPS advanced panel technologies for smartphone applications.
Bridge is wrapped in panel uClass model for wider compatibility.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # LG P880 T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
gpio-uclass: fix off-by-one in gpio_request_list_by_name_nodev()
By the time we jump to the err label, count represents the number of
gpios we've successfully requested. So by subtracting one, we fail to
free the most recently requested.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Tue, 18 Apr 2023 12:51:55 +0000 (14:51 +0200)]
xen: Add dependency on armv8
U-Boot currently implements hypervisor calls only for ARM64 that's why add
dependency on ARM64. The hardware functionality is also available on
ARMv7a, but currently not supported by U-Boot, hence it is not added to the
list of dependencies here.
Signed-off-by: Michal Simek <michal.simek@amd.com>
John Keeping [Wed, 12 Apr 2023 11:24:26 +0000 (12:24 +0100)]
tools: env: update lock path in README
Commit aeb40f1166e0 ("tools: env: use /run to store lockfile") updated the
path to the lockfile but did not update the documentation to match.
Use the new path in the documentation.
Fixes: aeb40f1166 ("tools: env: use /run to store lockfile") Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Simon Glass <sjg@chromium.org>
The non DM code path already would enable pci bus mastering. Do the
same for the DM code path.
Fixes AHCI problems I am seeing on an Intel Apollolake device.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[trini: Use ahci_dev not dev in the calls] Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 6 Apr 2023 13:58:40 +0000 (09:58 -0400)]
qemu: dfu: Correct memset call in set_dfu_alt_info
When building with clang, we see:
board/emulation/common/qemu_dfu.c:51:24: warning: 'memset' call operates on objects of type 'char' while the size is based on a different type 'char *' [-Wsizeof-pointer-memaccess]
As we're calling memset with the length set to the size of the pointer
and not the size of the buffer. Correct this with a call of the size of
the buffer itself.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Tom Rini [Thu, 6 Apr 2023 13:48:58 +0000 (09:48 -0400)]
api: Rework menu, and make it depend on CC_IS_GCC
We can only use the old U-Boot API for standalone applications when
building U-Boot with GCC as it relies upon the "gd is a register" trick
that only GCC supports. Further, rework the rest of the options so that
they are in the API menu and only visible if API support is enabled.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Thu, 6 Apr 2023 08:04:15 +0000 (10:04 +0200)]
xen: Fix Kconfig dependencies
XEN config can be enabled by other platforms (even it doesn't need to make
sense) that's why fix dependencies. XEN (xenbus.c) requires sscanf (also
pvblock needs it). And PVBLOCK is inside drivers/xen folder which requires
XEN to be enabled.
Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tom Rini [Thu, 6 Apr 2023 02:19:39 +0000 (22:19 -0400)]
pytest: Use --lazy with umount
Sometimes when doing tests on real hardware we sometimes run in to the
case where some of these mounts haven't been fully flushed. Using the
--lazy option with umount will allow us to continue while letting the OS
handle flushing the data out still.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
When building with clang, it notes that sdinfo may be unused
uninitialized in some cases. This appears to be true from reading the
code, and we can simply set the variable to zero to start with and be as
correct as before.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Marek Vasut <marex@denx.de>
Tom Rini [Wed, 5 Apr 2023 23:48:56 +0000 (19:48 -0400)]
boot/image-board.c: Silence warning in select_ramdisk
When building with clang we get a warning that rdaddr could be
uninitialized in one case. While this cannot functionally happen, we can
easily silence the warning.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 5 Apr 2023 23:48:55 +0000 (19:48 -0400)]
armv7: Use isb/dsb directly in start.S
Toolchains which do not directly support using "isb" and "dsb" directly
are no longer functionally supported in U-Boot. Furthermore, clang has
for a long time warned about using the alternate form that we were.
Update the code.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 5 Apr 2023 23:48:54 +0000 (19:48 -0400)]
arm: Centralize fixed register logic
When building for ARM64, we need to pass -ffixed-x18 and otherwise pass
-ffixed-r9. Rather than having this logic in two places, we can do this
once in arch/arm/config.mk. Further, while gcc will ignore being passed
both -ffixed-r9 and -ffixed-x18 and simply use -ffixed-x18, clang will
note that -ffixed-r9 is not used. Remove this duplication to also remove
the warning.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 5 Apr 2023 23:48:52 +0000 (19:48 -0400)]
clang: Add $(CLANG_TARGET) to LDPPFLAGS
When we invoke $(CPP) to make u-boot.lds we have LDPPFLAGS available to
set other required flags here. As this file is for the target and not
the host, we must ensure that CPP knows what the target architecture is.
For this, pass in $(CLANG_TARGET).
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
test: improve configuration for Kconfig test options
* Fix dependencies
* Provide labels that are easier to grasp.
* Fix typo %s/whgch/which/
* Fix type %s/Is/is/
Fixes: 29784d62eded ("test: Add some tests for kconfig.h") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Pavel Skripkin [Sun, 2 Apr 2023 16:27:34 +0000 (19:27 +0300)]
arm64: interrupts: print FAR_ELx on sync exceptions
Default synchronous exceptions handler prints only esr and register
dump. Sometimes it requiers to see an address which caused exceptions
to understand what's going on
ARM ARM in section D13.2.41 states that FAR_EL2 will contain meanfull
value in case of ESR.EC holds 0x20, 0x21, 0x24, 0x25, 0x22, 0x34 or
0x35. Same applies for EL1.
This patch adds function whivh determine current EL, gets correct FAR
register and prints it on panic.
Signed-off-by: Pavel Skripkin <paskripkin@gmail.com>
Peter Hoyes [Fri, 31 Mar 2023 08:58:12 +0000 (09:58 +0100)]
vexpress64: Enable VIRTIO_MMIO and RTC_PL031 in the base model
The Arm EBBR (Embedded Base Boot Requirements) require that the time
and basic networking EFI interfaces are available and working, so long
as the hardware has an RTC and network interface.
Arm FVPs typically have a memory-mapped PL031 RTC and a VIRTIO_NET
device defined in the device tree, so "imply" these in the Kconfig for
the FVP base model to simplify creating EBBR-compliant firmware.
Peter Hoyes [Fri, 31 Mar 2023 08:58:11 +0000 (09:58 +0100)]
vexpress64: Use OF_HAS_PRIOR_STAGE for BASE_FVP variant
BASE_FVP now typically uses a devicetree provided by a prior boot stage
(typically Arm TF-A), so imply this option by default when
TARGET_VEXPRESS64_BASE_FVP is selected.
OF_HAS_PRIOR_STAGE selects OF_BOARD so this change is minor, but aligns
TARGET_VEXPRESS64_BASE_FVP with TARGET_VEXPRESS64_BASER_FVP.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Jayesh Choudhary [Tue, 28 Mar 2023 13:02:01 +0000 (18:32 +0530)]
arch: mach-k3: j721s2_init: Disable the firewalls
Some firewalls enabled by ROM are still left on. So some
address space is inaccessible to the bootloader. For example,
in OSPI boot mode we get an exception and the system hangs.
Therefore, disable all the firewalls left on by the ROM.
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> Reviewed-by: Andrew Davis <afd@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Marc Zyngier [Fri, 17 Mar 2023 16:22:52 +0000 (00:22 +0800)]
arm64: Use level-2 for largest block mappings when FEAT_HAFDBS is present
In order to make invalidation by VA more efficient, set the largest
block mapping to 2MB, mapping it onto level-2. This has no material
impact on u-boot's runtime performance, and allows a huge speedup
when cleaning the cache.
Marc Zyngier [Fri, 17 Mar 2023 16:22:51 +0000 (00:22 +0800)]
arm64: Use FEAT_HAFDBS to track dirty pages when available
Some recent arm64 cores have a facility that allows the page
table walker to track the dirty state of a page. This makes it
really efficient to perform CMOs by VA as we only need to look
at dirty pages.
To quote the author:
These patches will use bounce buffers when VIRTIO_F_IOMMU_PLATFORM
feature is in a virtio device.
This feature can be tested with qemu with -device virtio-iommu-pci. So
that when a -device virtio-blk-pci with iommu_platform=true, it will
uses the bounce buffer instead.
When building with clang, the compiler compains with
drivers/spi/spi-synquacer.c:212:11: warning: variable 'bus_width' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
else if (priv->mode & SPI_TX_OCTAL)
^~~~~~~~~~~~~~~~~~~~~~~~~
drivers/spi/spi-synquacer.c:276:11: note: uninitialized use occurs here
val |= ((bus_width >> 1) << BUS_WIDTH);
^~~~~~~~~
drivers/spi/spi-synquacer.c:212:7: note: remove the 'if' if its condition is always true
else if (priv->mode & SPI_TX_OCTAL)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/spi/spi-synquacer.c:189:25: note: initialize the variable 'bus_width' to silence this warning
So initialize bus_width to 1 and add a warning if none of the configured
modes matches
The .supports_op() callback function returns true by default after
performing driver-specific checks. Therefore the driver cannot apply
the buswidth in devicetree.
Call spi_mem_default_supports_op() helper to handle the buswidth
in devicetree.
Dhruva Gole [Wed, 1 Mar 2023 07:43:46 +0000 (13:13 +0530)]
spi: spi-mem: perform odd len check only while writing data
in spi_mem_dtr_supports_op we have a check for allowing only even number
of bytes to be r/w. Odd bytes writing can be a concern while writing
data to a flash for example because 8 DTR mode doesn't support it.
However, reading ODD Bytes even though may not be physically possible
we can still allow for it because it will not have serious implications
on any critical registers being overwritten since they are just reads.
Dhruva Gole [Wed, 1 Mar 2023 07:43:45 +0000 (13:13 +0530)]
spi: spi-mem: s/dummy/data buswidth check in dtr_supports_op()
This should have been op->data.buswidth instead as we check for octal
bus width for the data related ops
Also add explanation for why there is checks for 8D even data bytes
Marek Vasut [Thu, 2 Mar 2023 01:46:32 +0000 (02:46 +0100)]
mtd: spi-nor: Add CHIP_ERASE optimization
Add support for CHIP_ERASE opcode 0xc7 . This is useful in case the
entire SPI NOR is supposed to be erase at once, as is it considerably
faster than 4k sector erase and even slightly faster than 64k block
erase. The spi_nor_erase_chip() implementation is adapted from Linux
6.1.y as of commit 7d54cb2c26dad ("Linux 6.1.14") . The chip erase is
only used in case the entire MTD device is being erased, and the chip
does support this functionality.
Timing figures from W25Q128JW:
16 MiB erase using 4kiB sector erase opcode 0x20 ... 107.5s
16 MiB erase using 64kiB block erase opcode 0xd8 ... 39.1s
16 MiB erase using chip erase opcode 0xc7 .......... 38.7s
Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Will Deacon [Wed, 29 Mar 2023 14:25:00 +0000 (22:25 +0800)]
virtio: Use bounce buffers when VIRTIO_F_IOMMU_PLATFORM is set
Devices advertising the VIRTIO_F_IOMMU_PLATFORM feature require
platform-specific handling to configure their DMA transactions.
When handling virtio descriptors for such a device, use bounce
buffers to ensure that the underlying buffers are always aligned
to and padded to PAGE_SIZE in preparation for platform specific
handling at page granularity.
Will Deacon [Wed, 29 Mar 2023 14:24:59 +0000 (22:24 +0800)]
virtio: Allocate bounce buffers for devices with VIRTIO_F_IOMMU_PLATFORM
In preparation for bouncing virtio data for devices advertising the
VIRTIO_F_IOMMU_PLATFORM feature, allocate an array of bounce buffer
structures in the vring, one per descriptor.
Will Deacon [Wed, 29 Mar 2023 14:24:58 +0000 (22:24 +0800)]
virtio: Add helper functions to attach/detach vring descriptors
Move the attach and detach logic for manipulating vring descriptors
out into their own functions so that we can later extend these to
bounce the data for devices with VIRTIO_F_IOMMU_PLATFORM set.
Will Deacon [Wed, 29 Mar 2023 14:24:57 +0000 (22:24 +0800)]
virtio: Allocate virtqueue in page-size units
In preparation for explicit bouncing of virtqueue pages for devices
advertising the VIRTIO_F_IOMMU_PLATFORM feature, introduce a couple
of wrappers around virtqueue allocation and freeing operations,
ensuring that buffers are handled in terms of page-size units.
Will Deacon [Wed, 29 Mar 2023 14:24:56 +0000 (22:24 +0800)]
virtio: pci: Tear down VQs in virtio_pci_reset()
The pages backing the virtqueues for virtio PCI devices are not freed
on reset, despite the virtqueue structure being freed as part of the
driver '->priv_auto' destruction at ->remove() time.
Call virtio_pci_del_vqs() from virtio_pci_reset() to free the virtqueue
pages before freeing the virtqueue structure itself.
Avoid using preprocessor compilation directives and instead use simple
logical expressions for better readability since compiler will anyway
optimize out the respective code block if condition is not satisfied.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
board: ti: am62x: evm: OSPI support for splash screen
Add ospi boot media support to load splash image from OSPI memory,
add offset to read image from ospi and necessary flags defininig type
of storage and storage device.
Use CONFIG_IS_ENBALED to use the splash locations at SPL and u-boot
proper.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
drivers: video: Enable necessary video functions at SPL
To support video driver at SPL use CONFIG_IS_ENABLED and CONFIG_VAL,
which checks for stage specific configs and thus enables video support
at respective stage.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com> Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
To enable splash screen at SPL, need to compile cmd/bmp.c which also
includes bmp commands, since SPL doesn't use commands split bmp.c into
common/bmp.c which includes all bmp functions and cmd/bmp.c which only
contains bmp commands.
Add function delclaration for bmp_info in video.h.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
common: Makefile: Add rule to compile splash and splash_source at SPL
To enable splash screen and loading bmp from boot media, add rules to
compile splash.c and splash_source.c at SPL stage only when
CONFIG_SPL_SPLASH_SCREEN and CONFIG_SPL_SPLASH_SOURCE are defined.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com> Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
drivers: video: tidss: Makefile: Add condition to compile TIDSS at SPL
To enable TIDSS driver only at SPL stage add rule to compile the TIDSS
video driver.
CONFIG_$(SPL_)VIDEO_TIDSS will compile tidss_drv, at SPL only if
CONFIG_SPL_VIDEO_TIDSS is defined and at u-boot proper if
CONFIG_VIDEO_TIDSS is defined.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
drivers: video: Makefile: Rule to compile necessary video driver files
To enable video driver at SPL, need to compile video-uclass,
vidconsole-uclass, backlight-uclass, panel-uclass, simple-panel, add
rules to compile them at SPL and u-boot proper. To support
splash_display at SPL, need to compile video-bmp, add rule to compile at
SPL and u-boot proper.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com> Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
drivers: video: Kconfig: Add configs for enabling video at SPL
Add Kconfigs which enable the video driver and splash screen at SPL
stage only and not at u-boot proper. The existing Kconfigs from u-boot
proper were not used to make SPL splash screen independent to them.
Signed-off-by: Nikhil M Jain <n-jain1@ti.com> Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
remoteproc: ti_k3_arm64: Change the startup of arm64 core
Configuring master firewalls require the power of the cluster to be
enabled before configuring them, change the load of rproc to configure
the gtc clocks and start the cluster along with configuring the boot
vector.
Andrew Davis [Thu, 6 Apr 2023 16:38:19 +0000 (11:38 -0500)]
arm: mach-k3: Move sdelay() and wait_on_value() declaration
These probably should be in some system wide header given their use.
Until then move them out of K3 sys_proto.h so we can finish cleaning
that header out.
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andrew Davis [Thu, 6 Apr 2023 16:38:15 +0000 (11:38 -0500)]
arm: mach-k3: Make release_resources_for_core_shutdown() common
This function is the same for each device when it needs to shutdown
the R5 core. Move this to the common section and move the remaining
device specific ID list to the device hardware include.
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andrew Davis [Thu, 6 Apr 2023 16:38:11 +0000 (11:38 -0500)]
arm: mach-k3: Move J721e SoC detection out of common section
This belongs in the J721e specific file as it is the only place
this is used. Any board level users should use the SOC driver.
While here, move the J721e and J7200 SoC IDs out of sys_proto.h
and into hardware.h. Use a macro borrowed from Rockchip and add
the rest of the SoC IDs for completeness and later use.
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Andrew Davis [Thu, 6 Apr 2023 16:38:10 +0000 (11:38 -0500)]
arm: mach-k3: Move MSMC fixup to SoC level
The MSMC fixup is something we do based on SoC, not based on the board.
So this fixup does not belong in the board files. Move this to the
mach-k3 common file so that it does not have to be done in each board
that uses these SoCs.
We use ft_system_setup() here instead of ft_board_setup() since it is no
longer board level. Enable OF_SYSTEM_SETUP in the configurations that use
this to keep functionality the same.
Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
projects / thirdparty / u-boot.git / log
