]> git.ipfire.org Git - thirdparty/u-boot.git/log
thirdparty/u-boot.git
4 years agoMerge branch '2022-06-28-mpc85xx-and-aspeed-fixes' into next
Tom Rini [Tue, 28 Jun 2022 14:52:00 +0000 (10:52 -0400)] 
Merge branch '2022-06-28-mpc85xx-and-aspeed-fixes' into next

- Merge a PowerPC MPC85xx cleanup / fix, and aspeed linker fix

4 years agoaspeed/ast2600: Fix SPL linker script
Joel Stanley [Tue, 28 Jun 2022 04:27:25 +0000 (13:57 +0930)] 
aspeed/ast2600: Fix SPL linker script

The commit 99e2fbcb69f0 ("linker_lists: Rename sections to remove .
prefix") changed the name of the linker list sections. As the Aspeed SPL
linker wasn't in the tree yet, it missed the change.

This updates the SPL linker to match arch/arm/cpu/u-boot-spl.lds which
Aspeed was copied from.

Fixes: 442a69c14375 ("configs: ast2600: Move SPL bss section to DRAM space")
Signed-off-by: Joel Stanley <joel@jms.id.au>
4 years agopowerpc: mpc85xx: Set TEXT_BASE addresses to real base values
Pali Rohár [Thu, 16 Jun 2022 12:19:44 +0000 (14:19 +0200)] 
powerpc: mpc85xx: Set TEXT_BASE addresses to real base values

Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are
manually increased by 0x1000 due to .bootpg section. This section has size
of 0x1000 bytes and is manually put by linker script before .text section
(and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is
set. Due to this fact lot of other config options are manually increased by
0x1000 value to make correct layout. Note that entry point is not on
CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address
CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image).

Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is
set. Put .bootpg code directly into .text section and move text base
address to the start of .bootpg code. And finally remove +0x1000 value from
lot of config options. With this removal custom PHDRS is not used anymore,
so remove it too.

After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at
address -0x1000 anymore.

Tested on P2020 board with SPL and proper U-Boot.

Signed-off-by: Pali Rohár <pali@kernel.org>
4 years agokontron-sl-mx8mm: Add CAAM support
Fabio Estevam [Thu, 9 Jun 2022 20:13:31 +0000 (17:13 -0300)] 
kontron-sl-mx8mm: Add CAAM support

Add CAAM support, which is required when enabling HAB secure boot.

Select CONFIG_SPL_DRIVERS_MISC so that CONFIG_IMX_HAB could
build successfully, if selected.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
4 years agoboard: apalis_imx6: DDR init using mx6_dram_cfg()
Francesco Dolcini [Fri, 24 Jun 2022 10:33:36 +0000 (12:33 +0200)] 
board: apalis_imx6: DDR init using mx6_dram_cfg()

Do DDR initialization using the procedural mx6_dram_cfg() instead of
programming the MMDC using a raw list of register/value pairs, this
solves some rare boot failures on specific "bad" modules.

Calibration values, DDR geometry are unchanged, memory timings are
updated according to the relevant memory datasheet, no changes on
the power consumption.

For IT temperature range SKUs CL is decreased from 8 to 7 and tFAW
value is increased, for commercial temperature range SKUs some
changes on ODT parameters.

This change was validated over a range of different apalis-imx6 SoM, on
the whole working temperature range with weeks of continuous testing.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
4 years agoimx: kontron-sl-mx8mm: Enable PCA9450 regulator driver and fix SD card access
Frieder Schrempf [Mon, 27 Jun 2022 11:00:59 +0000 (13:00 +0200)] 
imx: kontron-sl-mx8mm: Enable PCA9450 regulator driver and fix SD card access

Currently accessing the SD card on USDHC2 fails with:

=> mmc dev 1
Card did not respond to voltage select! : -110

This is due to the fact that UHS modes are enabled in the defconfig
and the devicetree, but the referenced LDO5 regulator (reg_nvcc_sd)
is not available to switch the data lines from 3.3V to 1.8V mode.

By enabling the regulator driver the vqmmc-supply is now available
and the SD card works also in high speed modes:

=> mmc dev 1
switch to partitions #0, OK
mmc1 is current device

Please note that the board has a GPIO connected to the SD_VSEL signal
of the PMIC. As the driver uses the LDO5CTRL_H register to set the
voltage, we need to make sure that this GPIO (GPIO01_IO4) is set to
a high level.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Fabio Estevam <festevam@denx.de>
4 years agopmic: pca9450: Add optional SD_VSEL GPIO for LDO5
Frieder Schrempf [Mon, 27 Jun 2022 11:00:58 +0000 (13:00 +0200)] 
pmic: pca9450: Add optional SD_VSEL GPIO for LDO5

LDO5 has two separate control registers. LDO5CTRL_L is used if the
input signal SD_VSEL is low and LDO5CTRL_H if it is high.
The current driver implementation only uses LDO5CTRL_H. To make this
work on boards that have SD_VSEL connected to a GPIO, we add support
for specifying an optional GPIO and setting it to high at probe time.

In the future we might also want to add support for boards that have
SD_VSEL set to a fixed low level. In this case we need to change the
driver to be able to use the LDO5CTRL_L register.

This is a port of the same change in the Linux kernel:
8c67a11bae88 ("regulator: pca9450: Add SD_VSEL GPIO for LDO5")

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tested-by: Fabio Estevam <festevam@denx.de>
4 years agomx6: ddr: Fix disabling on-die termination
Francesco Dolcini [Fri, 24 Jun 2022 10:33:35 +0000 (12:33 +0200)] 
mx6: ddr: Fix disabling on-die termination

In case rtt_nom is set to 0 keep ODT disabled (MMDC MPODTCTRL = 0).
No changes required for DDR MR1 Rtt_Nom impedance register, 0 value is
already handled correctly.

No board is currently affected by this change (rtt_nom != 0 on all i.MX6
ddr3 boards), this will be used by a follow-up change.

Fixes: fe0f7f7842e1 ("mx6: add mmdc configuration for MX6Q/MX6DL")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
4 years agotoradex: apalis/colibri_imx6: Fix CLKO1/CLKO2 output
Francesco Dolcini [Fri, 24 Jun 2022 09:52:19 +0000 (11:52 +0200)] 
toradex: apalis/colibri_imx6: Fix CLKO1/CLKO2 output

Set CLK01 and CLK02 to 24MHz and enable it in CCM_CCOSR register.

This clock is used by both the audio codec (CLKO1) and by the CSI camera
(CLKO2) and is expected to be 24MHz.

Despite the wrong 16.5MHz there was no real issue because of the wrong
frequency since Linux reconfigures the clocks afterward, however this
was triggering an issue with noise coming from the SGTL5000 audio codec.

The problem is that the SGTL5000 does not have a reset pin and after it
is configured if the input MCLK clock is disabled it produces a constant
noise on its output, this was happening on software reboot.

Forcing the clock to be enabled in U-Boot prevent the problem by making
sure that the clock is always available, without this change as soon as
Linux was changing the clock tree (setting clk_out_sel=1 without setting
clko2_en=1) the noise would start till the actual clock was enabled
(clko2_en=1) during the SGTL5000 driver probe.

Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
4 years agoARM: imx: Switch Data Modul i.MX8M Mini eDM SBC to USB251x Hub driver
Marek Vasut [Wed, 15 Jun 2022 11:07:39 +0000 (13:07 +0200)] 
ARM: imx: Switch Data Modul i.MX8M Mini eDM SBC to USB251x Hub driver

Replace the ad-hoc I2C register programming scripted in board
environment with U-Boot DM driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
4 years agoimx8m: fixup thermal trips
Andrejs Cainikovs [Fri, 27 May 2022 13:20:42 +0000 (15:20 +0200)] 
imx8m: fixup thermal trips

Fixup thermal trips in Linux device tree according to SoC thermal
grade.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Tested-by: Adam Ford <aford173@gmail.com>
4 years agoboard: atmel: remove calls to debug_uart_init
Eugen Hristev [Wed, 8 Jun 2022 14:49:29 +0000 (17:49 +0300)] 
board: atmel: remove calls to debug_uart_init

Since 0dba45864b ("arm: Init the debug UART") ,
the debug_uart_init is now called from crt.S

It's no longer required to call it from the board file.

With the current code, the banned <debug_uart> is printed twice:

<debug_uart>

<debug_uart>

U-Boot 2022.07-rc4-00089-gee3d158fa8 (Jun 08 2022 - 17:39:29 +0300)

Remove all calls from board_early_init_f .

Suggested-by: Balamanikandan Gunasundar <Balamanikandan.Gunasundar@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
4 years agoARM: dts: at91: sam9x60ek: fix eeprom compatible
Eugen Hristev [Thu, 26 May 2022 14:04:56 +0000 (17:04 +0300)] 
ARM: dts: at91: sam9x60ek: fix eeprom compatible

The memory on this board is microchip 24aa025e48 which is compatible with
at24c02 with a page size of 16.
Fix the compatible accordingly.

Reported-by: Sergiu Moga <sergiu.moga@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
4 years agomisc: i2c_eeprom: remove 24aa02e48
Eugen Hristev [Thu, 26 May 2022 14:04:55 +0000 (17:04 +0300)] 
misc: i2c_eeprom: remove 24aa02e48

This compatible does not exist in the bindings.
All occurences in DT have been replaced by at24c02 which is equivalent.

Fixes: 7264066707 ("misc: i2c_eeprom: Add compatible for 24AA02E48")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
4 years agoARM: dts: at91: replace microchip, 24aa02e48 with atmel, at24c02
Eugen Hristev [Thu, 26 May 2022 14:04:54 +0000 (17:04 +0300)] 
ARM: dts: at91: replace microchip, 24aa02e48 with atmel, at24c02

microchip,24aa025e48 does not exist in the bindings of this driver.
It can be replaced with atmel,at24c02 which is a standard compatible
and the memory is compatible with this one, depending on the page size.
microchip 24aa02e48 has a page size of 8, while 24aa025e48 has a page
size of 16 bytes.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Michael Walle <michael@walle.cc>
Reviewed-by: Heiko Schocher <hs@denx.de>
4 years agoARM: dts: at91: sama7g5/sama7g5ek: sync with kernel at91 5.19
Eugen Hristev [Tue, 24 May 2022 10:01:44 +0000 (13:01 +0300)] 
ARM: dts: at91: sama7g5/sama7g5ek: sync with kernel at91 5.19

Sync with at91 maintainer tree for-5.19 branch.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
4 years agodt-bindings: sound: add microchip,pdmc.h
Eugen Hristev [Tue, 24 May 2022 10:00:54 +0000 (13:00 +0300)] 
dt-bindings: sound: add microchip,pdmc.h

Include microchip,pdmc.h from Linux.

This file includes required defines for DT successful build.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
4 years agoconfigs: at91: sama5d2_icp: enable QSPI and SF command
Sergiu Moga [Fri, 13 May 2022 15:13:41 +0000 (18:13 +0300)] 
configs: at91: sama5d2_icp: enable QSPI and SF command

Add the configurations required for enabling QSPI and the SF command
to allow changes to be made dynamically to serial flash devices from
the command line interface.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
4 years agoconfigs: at91: sam9x60ek: enable QSPI and SF command
Sergiu Moga [Fri, 13 May 2022 15:13:40 +0000 (18:13 +0300)] 
configs: at91: sam9x60ek: enable QSPI and SF command

Add the configurations required for enabling QSPI and the SF command
to allow changes to be made dynamically to serial flash devices from
the command line interface.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
4 years agoARM: dts: sam9x60: fix compatible for qspi child node
Sergiu Moga [Fri, 13 May 2022 15:13:39 +0000 (18:13 +0300)] 
ARM: dts: sam9x60: fix compatible for qspi child node

Change the compatible of the qspi child node to
`jedec,spi-nor` so that it can be properly found
when probing the bus.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
4 years agoarmv8: u-boot-spl.lds: mark __image_copy_start as symbol
Peng Fan [Sat, 18 Jun 2022 12:13:13 +0000 (15:13 +0300)] 
armv8: u-boot-spl.lds: mark __image_copy_start as symbol

In arch/arm/lib/sections.c there is below code:
char __image_copy_start[0] __section(".__image_copy_start");
But actually 'objdump -t spl/u-boot-spl' not able to find out
symbol '__image_copy_start' for binman update image-pos/size.

So update link file

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
4 years agospl: binman: Disable u_boot_any symbols for i.MX8M boards
Alper Nebi Yasak [Sat, 18 Jun 2022 12:13:12 +0000 (15:13 +0300)] 
spl: binman: Disable u_boot_any symbols for i.MX8M boards

The i.MX8M boards use partially specified binman images which have an
SPL entry without a U-Boot entry. This would normally cause an error due
to the 'u_boot_any' binman symbols declared by BINMAN_UBOOT_SYMBOLS
requiring a U-Boot-like entry in the same image as the SPL.

However, a problem in the ARMv8 __image_copy_start symbol definition
effectively disables binman from attempting to write any symbols at all,
so everything appears to work fine until runtime. A future patch fixes
the issue in the linker scripts, which lets binman fill in the symbols,
which would result in the build error described above.

Explicitly disable the 'u_boot_any' symbols for i.MX8M boards. They are
already effectively unusable, and they are incompatible with the boards'
current binman image descriptions.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
4 years agospl: binman: Check at runtime if binman symbols were filled in
Alper Nebi Yasak [Sat, 18 Jun 2022 12:13:11 +0000 (15:13 +0300)] 
spl: binman: Check at runtime if binman symbols were filled in

Binman lets us declare symbols in SPL/TPL that refer to other entries in
the same binman image as them. These symbols are filled in with the
correct values while binman assembles the images, but this is done
in-memory only. Symbols marked as optional can be filled with
BINMAN_SYM_MISSING as an error value if their referred entry is missing.

However, the unmodified SPL/TPL binaries are still available on disk,
and can be used by people. For these files, nothing ensures that the
symbols are set to this error value, and they will be considered valid
when they are not.

Empirically, all symbols show up as zero in a sandbox_vpl build when we
run e.g. tpl/u-boot-tpl directly. On the other hand, zero is a perfectly
fine value for a binman-written symbol, so we cannot say the symbols
have wrong values based on that.

Declare a magic symbol that binman always fills in with a fixed value.
Check this value as an indicator that symbols were filled in correctly.
Return the error value for all symbols when this magic symbol has the
wrong value.

For binman tests, we need to make room for the new symbol in the mocked
SPL/TPL data by extending them by four bytes. This messes up some test
image layouts. Fix the affected values, and check the magic symbol
wherever it makes sense.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
4 years agospl: binman: Add config options for binman symbols in VPL
Alper Nebi Yasak [Sat, 18 Jun 2022 12:13:10 +0000 (15:13 +0300)] 
spl: binman: Add config options for binman symbols in VPL

The SPL code declares binman symbols for U-Boot phases depending on
CONFIG_IS_ENABLED(BINMAN_UBOOT_SYMBOLS). This config exists for SPL and
TPL, also add a version for VPL.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
4 years agospl: binman: Split binman symbols support from enabling binman
Alper Nebi Yasak [Sat, 18 Jun 2022 12:13:09 +0000 (15:13 +0300)] 
spl: binman: Split binman symbols support from enabling binman

Enabling CONFIG_BINMAN makes binman run after a build to package any
images specified in the device-tree. It also enables a mechanism for
SPL/TPL to declare and use special linker symbols that refer to other
entries in the same binman image. A similar feature that gets this info
from the device-tree exists for U-Boot proper, but it is gated behind a
CONFIG_BINMAN_FDT unlike the symbols.

Confusingly, CONFIG_SPL/TPL_BINMAN_SYMBOLS also exist. These configs
don't actually enable/disable the symbols mechanism as one would expect,
but declare some symbols for U-Boot using this mechanism.

Reuse the BINMAN_SYMBOLS configs to make them toggle the symbols
mechanism, and declare symbols for the U-Boot phases in a dependent
BINMAN_UBOOT_SYMBOLS config. Extend it to cover symbols of all phases.
Update the config prompt and help message to make it clearer about this.
Fix binman test binaries to work with CONFIG_IS_ENABLED(BINMAN_SYMBOLS).

Co-developed-by: Peng Fan <peng.fan@nxp.com>
[Alper: New config for phase symbols, update Kconfigs, commit message]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
4 years agospl: binman: Declare extern symbols for VPL as well
Alper Nebi Yasak [Sat, 18 Jun 2022 12:13:08 +0000 (15:13 +0300)] 
spl: binman: Declare extern symbols for VPL as well

The binman extern symbol declarations in spl.h are missing the VPL
symbols recently added to spl.c, add them like the others.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
4 years agospl: binman: Make TPL_BINMAN_SYMBOLS depend on TPL_FRAMEWORK
Alper Nebi Yasak [Sat, 18 Jun 2022 12:13:07 +0000 (15:13 +0300)] 
spl: binman: Make TPL_BINMAN_SYMBOLS depend on TPL_FRAMEWORK

TPL_BINMAN_SYMBOLS depends on SPL_FRAMEWORK. The code this enables is
compiled by checking CONFIG_$(SPL_TPL_)FRAMEWORK, so it should depend on
TPL_FRAMEWORK instead (which in turn depends on SPL_FRAMEWORK). This was
most likely a typo due to copy-pasting the config's SPL version, fix it.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
4 years agospl: binman: Fix use of undeclared u_boot_any symbols
Alper Nebi Yasak [Sat, 18 Jun 2022 12:13:06 +0000 (15:13 +0300)] 
spl: binman: Fix use of undeclared u_boot_any symbols

Some SPL functions directly use the binman 'u_boot_any' symbols to get
U-Boot's binman image position. These symbols are declared by the
SPL/TPL_BINMAN_SYMBOLS configs, but they are accessed by macros defined
by just CONFIG_BINMAN. So when BINMAN is enabled and BINMAN_SYMBOLS is
disabled, the code tries to use undeclared symbols and we get an error.

Therefore, any use of 'u_boot_any' symbols in the code is an implicit
dependency on SPL/TPL_BINMAN_SYMBOLS. However, in the current uses
they are meant to be the next phase's values, where that happens to be
U-Boot. In the meantime, helper funcions spl_get_image_pos/size() were
introduced to get these values.

Convert all uses of u_boot_any symbols to these functions, so we only
access these symbols at one place. Make sure they will not use these
symbols when the BINMAN_SYMBOLS configs are disabled, by returning early
in those cases.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
4 years agosandbox: cast to pointer from integer of different size
Heinrich Schuchardt [Sun, 12 Jun 2022 11:25:22 +0000 (11:25 +0000)] 
sandbox: cast to pointer from integer of different size

Building sandbox_defconfig on ARMv7 with HOST_32BIT=y results in:

drivers/misc/qfw_sandbox.c:51:25: warning:
cast to pointer from integer of different size [-Wint-to-pointer-cast]
   51 |         void *address = (void *)be64_to_cpu(dma->address);

Add the missing type conversion.

Fixes: 69512551aa84 ("test: qemu: add qfw sandbox driver, dm tests, qemu tests")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agodm: spl: Allow SPL to show memory usage
Simon Glass [Sun, 8 May 2022 10:39:27 +0000 (04:39 -0600)] 
dm: spl: Allow SPL to show memory usage

Add an option to tell SPL to show memory usage for driver model just
before it boots into the next phase.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Add a command to show driver model statistics
Simon Glass [Sun, 8 May 2022 10:39:26 +0000 (04:39 -0600)] 
dm: core: Add a command to show driver model statistics

This command shows the memory used by driver model along with various
hints as to what it might be if some 'core' tags were moved to use the
tag list instead of a core (i.e. always-there) pointer.

This may help with future work to reduce memory usage.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Add a way to collect memory usage
Simon Glass [Sun, 8 May 2022 10:39:25 +0000 (04:39 -0600)] 
dm: core: Add a way to collect memory usage

Add a function for collecting the amount of memory used by driver model,
including devices, uclasses and attached data and tags.

This information can provide insights into how to reduce the memory
required by driver model. Future work may look at execution speed also.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Support accessing core tags
Simon Glass [Sun, 8 May 2022 10:39:24 +0000 (04:39 -0600)] 
dm: core: Support accessing core tags

At present tag numbers are only allocated for non-core data, meaning that
the 'core' data, like priv and plat, are accessed through dedicated
functions.

For debugging and consistency it is convenient to use tags for this 'core'
data too. Add support for this, with new tag numbers and functions to
access the pointer and size for each.

Update one of the test drivers so that the uclass-private data can be
tested here.

There is some code duplication with functions like device_alloc_priv() but
this is not addressed for now. At some point, some rationalisation may
help to reduce code size, but more thought it needed on that.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Switch the testbus driver to use a new struct
Simon Glass [Sun, 8 May 2022 10:39:23 +0000 (04:39 -0600)] 
dm: core: Switch the testbus driver to use a new struct

At present this driver uses 'priv' struct to hold 'plat' data, which is
confusing. The contents of the strct don't matter, since only dtoc is
using it. Create a new struct with the correct name.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Add documentation for the dm command
Simon Glass [Sun, 8 May 2022 10:39:22 +0000 (04:39 -0600)] 
dm: core: Add documentation for the dm command

Add a description and examples for the dm subcommands.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Fix addresses in the dm static command
Simon Glass [Sun, 8 May 2022 10:39:21 +0000 (04:39 -0600)] 
dm: core: Fix addresses in the dm static command

This command converts pointers to addresses, but the pointers being
converted are in the image's rodata region. For sandbox this means it
is not in DRAM so it does not make sense to do this conversion.

Fix this by showing a simple pointer instead. Drop the unnecessary
@ and hex prefixes.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Sort dm subcommands
Simon Glass [Sun, 8 May 2022 10:39:20 +0000 (04:39 -0600)] 
dm: core: Sort dm subcommands

Put these in alphabetic order, both in the help and in the implementation,
as there are quite a few subcommands now. Tweak the help for 'dm tree' to
better explain what it does.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Rename dm_dump_all()
Simon Glass [Sun, 8 May 2022 10:39:19 +0000 (04:39 -0600)] 
dm: core: Rename dm_dump_all()

This is not a good name anymore as it does not dump everything. Rename it
to dm_dump_tree() to avoid confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agotest: fix some pylint errors in test_bind.py
Heinrich Schuchardt [Sat, 30 Apr 2022 09:26:23 +0000 (11:26 +0200)] 
test: fix some pylint errors in test_bind.py

* Use spaces not tabs
* Limit lines to 100 spaces
* Remove an unused import
* Sort imports correctly
* Add a module description

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 years agosandbox: raise SANDBOX_RAM_SIZE_MB default to 256
Heinrich Schuchardt [Sat, 30 Apr 2022 05:55:53 +0000 (07:55 +0200)] 
sandbox: raise SANDBOX_RAM_SIZE_MB default to 256

The UEFI Self Certification Test (SCT) cannot run on 128 MiB.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 years agopatman: Fix defaults not propagating to subparsers
Sean Anderson [Fri, 29 Apr 2022 14:53:34 +0000 (10:53 -0400)] 
patman: Fix defaults not propagating to subparsers

On python 3.8.10 (and 3.10), subparsers are not updated with defaults. I
suspect this is related to [1]. Fix this by explicitly updating
subparsers with settings.

[1] https://github.com/python/cpython/issues/89398

Fixes: 3145b63513 ("patman: Update defaults in subparsers")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Tested-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
4 years agodm: fix formatting of uclass dump
Heinrich Schuchardt [Tue, 19 Apr 2022 16:46:36 +0000 (18:46 +0200)] 
dm: fix formatting of uclass dump

Insert an empty line after each uclass independent of whether it has
devices or not.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 years agosandbox: show error if the device-tree cannot be loaded
Heinrich Schuchardt [Mon, 4 Apr 2022 20:45:04 +0000 (22:45 +0200)] 
sandbox: show error if the device-tree cannot be loaded

U-Boot's printf() used before setting up U-Boot's serial driver does not
create any output. Use os_printf() for error messages related to loading
the device-tree.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 years agosandbox: add function os_printf()
Heinrich Schuchardt [Mon, 4 Apr 2022 20:45:03 +0000 (22:45 +0200)] 
sandbox: add function os_printf()

Before setting up the devices U-Boot's printf() function cannot be used
for console output. Provide function os_printf() to print to stderr.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 years agopatman: test_util: Print test stdout/stderr within test summaries
Alper Nebi Yasak [Sat, 2 Apr 2022 17:06:08 +0000 (20:06 +0300)] 
patman: test_util: Print test stdout/stderr within test summaries

While running tests for a python tool, the tests' outputs get printed in
whatever order they happen to run, without any indication as to which
output belongs to which test. Unittest supports capturing these outputs
and printing them as part of the test summaries, but when a failure or
error occurs it switches back to printing as the tests run. Testtools
and subunit tests can do the same as their parts inherit from unittest,
but they don't outright expose this functionality.

On the unittest side, enable output buffering for the custom test result
class. Try to avoid ugly outputs by not printing stdout/stderr before
the test summary for low verbosity levels and for successful tests.

On the subunit side, implement a custom TestProtocolClient that enables
the same underlying functionality and injects the captured streams as
additional test details. This causes them to be merged into their test's
error traceback message, which is later rebuilt into an exception and
passed to our unittest report class.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopatman: test_util: Customize unittest test results for more info
Alper Nebi Yasak [Sat, 2 Apr 2022 17:06:07 +0000 (20:06 +0300)] 
patman: test_util: Customize unittest test results for more info

By default, unittest test summaries only print extended info about tests
that failed or couldn't run due to an error. Use a custom text result
class to print info about more cases: skipped tests, expected failures
and unexpected successes.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
4 years agopatman: test_util: Use unittest text runner to print test results
Alper Nebi Yasak [Sat, 2 Apr 2022 17:06:06 +0000 (20:06 +0300)] 
patman: test_util: Use unittest text runner to print test results

The python tools' test utilities handle printing test results, but the
output is quite bare compared to an ordinary unittest run. Delegate
printing the results to a unittest text runner, which gives us niceties
like clear separation between each test's result and how long it took to
run the test suite.

Unfortunately it does not print info for skipped tests by default, but
this can be handled later by a custom test result subclass. It also does
not print the tool name; manually print a heading that includes the
toolname so that the outputs of each tool's tests are distinguishable in
the CI output.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopatman: test_util: Handle nonexistent tests while loading tests
Alper Nebi Yasak [Sat, 2 Apr 2022 17:06:05 +0000 (20:06 +0300)] 
patman: test_util: Handle nonexistent tests while loading tests

It's possible to request a specific test to run when trying to run a
python tool's tests. If we request a nonexistent test, the unittest
loaders generate a fake test that reports this as an error. However, we
get these fake tests even when the test exists, because test_util can
load tests from multiple places one by one and the test we want only
exists in one.

The test_util helpers currently remove these fake tests when printing
test results, but that's more of a workaround than a proper solution.
Instead, don't even try to load the missing tests.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopatman: test_util: Fix printing results for failed tests
Alper Nebi Yasak [Sat, 2 Apr 2022 17:06:04 +0000 (20:06 +0300)] 
patman: test_util: Fix printing results for failed tests

When printing a python tool's test results, the entire list of failed
tests and their tracebacks are reprinted for every failed test. This
makes the test output quite unreadable. Fix the loop to print failures
and tracebacks one at a time.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Use device_foreach_child where possible
Sean Anderson [Wed, 30 Mar 2022 16:26:40 +0000 (12:26 -0400)] 
dm: core: Use device_foreach_child where possible

We have some nice macros for iterating over devices in device.h, but they
are not used by the driver core. Convert all the users I could find.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
4 years agodm: core: Provide fallbacks for ofnode_conf_read_...
Sean Anderson [Mon, 28 Mar 2022 22:14:37 +0000 (18:14 -0400)] 
dm: core: Provide fallbacks for ofnode_conf_read_...

Because fdt_get_config_str et al. were moved/renamed to
ofnode_conf_read_str, they now depend on CONFIG_DM as well as
CONFIG_OF_CONTROL. Add some fallback implementations, preventing a
linker error when CONFIG_SPL_OF_CONTROL and CONFIG_SPL_ENV_IS_IN_MMC are
enabled and CONFIG_SPL_DM is disabled.

Fixes: 7de8bd03c3 ("treewide: fdt: Move fdt_get_config_... to ofnode_conf_read...")
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
4 years agosandbox: usb: Fix out-of-bounds read when fd=-1
Sean Anderson [Wed, 23 Mar 2022 22:24:38 +0000 (18:24 -0400)] 
sandbox: usb: Fix out-of-bounds read when fd=-1

sandbox_flash_bulk uses priv->read_len to determine if priv->buff contains
the response data (such as from SCSI_INQUIRY). However, if priv->fd=-1 in
handle_read, then priv->read_len is not set even though we are going to
PHASE_DATA. This causes sandbox_flash_bulk to try and read len bytes from
priv->buff, which likely goes past the end of the buffer. Fix this by always
setting priv->read_len even if we aren't going to read anything.

Fixes: f4f715360c ("dm: usb: sandbox: Add an emulator for USB flash devices")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agodtoc: Update fdt tests to use test_util
Simon Glass [Sat, 19 Mar 2022 00:01:50 +0000 (18:01 -0600)] 
dtoc: Update fdt tests to use test_util

Use the common functions to run tests and report results. Ensure that the
result code indicates success or failure.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
4 years agobloblist: Describe the design goals
Simon Glass [Sun, 13 Mar 2022 22:22:48 +0000 (16:22 -0600)] 
bloblist: Describe the design goals

Add a comment explaining the design goals of bloblist, to make it easier
for people to understand and comment on the structure.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agoMerge branch '2022-06-27-add-armv8-sha1-sha256-support' into next
Tom Rini [Mon, 27 Jun 2022 17:39:19 +0000 (13:39 -0400)] 
Merge branch '2022-06-27-add-armv8-sha1-sha256-support' into next

To quote the author:

This series adds support for the SHA-1 and SHA-256 Secure Hash Algorithm
for CPUs that have support of the ARM v8 Crypto Extensions. It Improves
speed of integrity & signature checking procedures.

4 years agoqemu_arm64: Enable CONFIG_ARMV8_CRYPTO support
Tom Rini [Thu, 23 Jun 2022 19:44:47 +0000 (15:44 -0400)] 
qemu_arm64: Enable CONFIG_ARMV8_CRYPTO support

Now that we can make use of CPU features for sha1/sha256, enable in QEMU
so that we get some test coverage.

Cc: Loic Poulain <loic.poulain@linaro.org>
Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoarmv8 SHA-256 using ARMv8 Crypto Extensions
Loic Poulain [Wed, 1 Jun 2022 18:26:31 +0000 (20:26 +0200)] 
armv8 SHA-256 using ARMv8 Crypto Extensions

This patch adds support for the SHA-256 Secure Hash Algorithm for CPUs
that have support for the SHA-256 part of the ARM v8 Crypto Extensions.

It greatly improves sha-256 based operations, about 17x faster on iMX8M
evk board. ~12ms vs ~208ms for a 20MiB kernel sha-256 verification.

asm implementation is a simplified version of the Linux version (from
Ard Biesheuvel).

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
4 years agolib: sha256: Add support for hardware specific sha256_process
Loic Poulain [Wed, 1 Jun 2022 18:26:30 +0000 (20:26 +0200)] 
lib: sha256: Add support for hardware specific sha256_process

Mark sha256_process as weak to allow hardware specific implementation.
Add parameter for supporting multiple blocks processing.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
4 years agoarmv8 SHA-1 using ARMv8 Crypto Extensions:
Loic Poulain [Wed, 1 Jun 2022 18:26:29 +0000 (20:26 +0200)] 
armv8 SHA-1 using ARMv8 Crypto Extensions:

This patch adds support for the SHA-1 Secure Hash Algorithm for CPUs
that have support for the SHA-1 part of the ARM v8 Crypto Extensions.

It greatly improves sha-1 based operations, about 10x faster on iMX8M
evk board. ~12ms vs ~165ms for a 20MiB kernel sha-1 verification.

asm implementation is a simplified version of the Linux version (from
Ard Biesheuvel).

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
4 years agosha1: Fix digest state size/type
Loic Poulain [Wed, 1 Jun 2022 18:26:28 +0000 (20:26 +0200)] 
sha1: Fix digest state size/type

sha1 digest size is 5*32-bit => 160-bit. Using 64-bit unsigned long
does not cause issue with the current sha1 implementation, but could
be problematic for vectorized access.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
4 years agolib: sha1: Add support for hardware specific sha1_process
Loic Poulain [Wed, 1 Jun 2022 18:26:27 +0000 (20:26 +0200)] 
lib: sha1: Add support for hardware specific sha1_process

Mark sha1_process as weak to allow hardware specific implementation.
Add parameter to support for multiple blocks processing.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
4 years agoMerge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Mon, 27 Jun 2022 14:15:50 +0000 (10:15 -0400)] 
Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2022.10

cpu:
- Add driver for microblaze cpu

net:
- Add support for DM_ETH_PHY to AXI emac and emaclite

xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS

zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize

versal:
- Enable loading app at EL1

serial:
- Setup default address and clock rates for DEBUG uarts

pinctrl:
- Add support for tri state and output enable properties

relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze

microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support

timer:
- Extract axi timer driver from Microblaze to generic location

4 years agotimer: Add SPL_REGMAP dependency for Xilinx timer
Michal Simek [Thu, 23 Jun 2022 11:08:30 +0000 (13:08 +0200)] 
timer: Add SPL_REGMAP dependency for Xilinx timer

Add SPL_REGMAP dependency when SPL is enabled. This can avoid compilation
issues if timer is selected but SPL_REGMAP not.

Reported-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8f6c187e04cb3127bf5148ae2dbbdf55b25ea544.1655982509.git.michal.simek@amd.com
4 years agoxilinx: Enable support for SquashFS
Michal Simek [Thu, 23 Jun 2022 11:04:21 +0000 (13:04 +0200)] 
xilinx: Enable support for SquashFS

Enable SquashFS for all xilinx platforms.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/dbe85afda8cd90ebfc537979d382808ff9bec160.1655982259.git.michal.simek@amd.com
4 years agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Tom Rini [Mon, 27 Jun 2022 01:06:08 +0000 (21:06 -0400)] 
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi

The main attraction are two regressions, plus a fix
for a long standing bug:
- Fix USB support on boards with a switched VBUS regulator.
- Fix failing boot due to env loading on boards without MMC (CHIP).
- Fix PSCI CPU_OFF operation on R40 boards.
The rest are smaller fixes, and the forgotten DT sync for sun4i boards.

4 years agosunxi: psci: Fix sunxi_power_switch on sun8i-r40 platform
qianfan Zhao [Sat, 14 May 2022 03:19:23 +0000 (11:19 +0800)] 
sunxi: psci: Fix sunxi_power_switch on sun8i-r40 platform

linux system will die if we offline one of the cpu on R40 based board:
eg: echo 0 > /sys/devices/system/cpu/cpu3/online

The reason is that the R40 version of sunxi_cpu_set_power always passes
0 for the CPU number, so we turn off CPU0, regardless of what CPU the
CPU_OFF request came for.

Fix this by passing the proper CPU number, as there are proper power
clamp registers for every of the four cores.

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
4 years agosunxi: fix initial environment loading without MMC
Samuel Holland [Wed, 20 Apr 2022 22:15:39 +0000 (23:15 +0100)] 
sunxi: fix initial environment loading without MMC

Commit e42dad4168fe ("sunxi: use boot source for determining environment
location") changed our implementation of env_get_location() and enabled
it for every board, even those without MMC support (like the C.H.I.P.
boards). However the default fallback location of ENVL_FAT requires MMC
support compiled in, so the board hangs when trying to initially load
the environment.

Change the algorithm to only return configured environment locations,
and improve the fallback algorithm on the way.

The env_init() routine calling this function here does not behave well
if the return value is ENVL_UNKNOWN on the very first call: it will make
U-Boot proper silently hang very early.
Work around this issue by making sure we return some configured (dummy)
environment location when prio is 0. This for instance happens when
booting via FEL.

This fixes U-Boot loading on the C.H.I.P. boards.

Fixes: e42dad4168fe ("sunxi: use boot source for determining environment location")
Reported-by: Chris Morgan <macroalpha82@gmail.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: fix FEL boot case by not returning ENVL_UNKNOWN when prio==0]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
4 years agoclk: sunxi: Add additional RTC compatible strings
Samuel Holland [Sun, 1 May 2022 03:38:36 +0000 (22:38 -0500)] 
clk: sunxi: Add additional RTC compatible strings

Compatible strings for some new RTC hardware variants were added to
the binding. Add them to the driver in preparation for supporting
those new SoCs.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
4 years agogpio: sunxi: Fix build with CONFIG_SPL_SERIAL=n
Samuel Holland [Wed, 11 May 2022 00:03:34 +0000 (19:03 -0500)] 
gpio: sunxi: Fix build with CONFIG_SPL_SERIAL=n

This driver uses simple_strtol(), so it needs SPL_STRTO. Before commit
88ca8e26958b6 ("disk: Add an option for partitions in SPL"), SPL_STRTO
was always selected indirectly. Now it is not, so select it here.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
4 years agoARM: dts: sun4i: Sync from Linux v5.18-rc1
Samuel Holland [Thu, 26 May 2022 03:26:02 +0000 (22:26 -0500)] 
ARM: dts: sun4i: Sync from Linux v5.18-rc1

Copy the devicetree source for the A10 SoC and all existing boards
verbatim from the Linux v5.18-rc1 tag.

The previous version of this change was only partially applied.

Fixes: 4746694cba74 ("ARM: dts: sun4i: Sync from Linux v5.18-rc1")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
4 years agosunxi: usb: convert PHY GPIO functions to DM
Andre Przywara [Tue, 7 Jun 2022 22:36:18 +0000 (23:36 +0100)] 
sunxi: usb: convert PHY GPIO functions to DM

The Allwinner USB PHY driver is still using the legacy GPIO interface,
which is now implemented by the DM_GPIO compat functions.
Those seem to have some design flaws, as setting the direction, then
later setting the value will not work, if the DM_GPIO driver is
implementing set_flags.

Fix this by using the dm_ version of the direct GPIO interface, which
uses struct gpio_desc structs to handle requested GPIOs, and actually
keeps the flags we set earlier.

This fixes USB operation on boards which need to toggle the VBUS supply
via a GPIO, like the Teres-I laptop or the BananaPi M2 Berry board.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Milan P. Stanić <mps@arvanta.net>
Reviewed-by: Samuel Holland <samuel@sholland.org>
4 years agoMerge tag 'video-20220625' of https://source.denx.de/u-boot/custodians/u-boot-video
Tom Rini [Sat, 25 Jun 2022 12:38:00 +0000 (08:38 -0400)] 
Merge tag 'video-20220625' of https://source.denx.de/u-boot/custodians/u-boot-video

 - fix building sandbox with NO_SDL=1
 - fix stb TrueType to check return value of STBTT_malloc()
 - remove not required DM_REGULATOR test in stm32 dsi driver

4 years agovideo: stm32: remove test on CONFIG_DM_REGULATOR
Patrick Delaunay [Mon, 20 Jun 2022 09:55:07 +0000 (11:55 +0200)] 
video: stm32: remove test on CONFIG_DM_REGULATOR

The tests on CONFIG_DM_REGULATOR, added to avoid compilation issues, can
now be removed, they are no more needed since the commit 16cc5ad0b439
("power: regulator: add dummy helper").

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
4 years agodriver: video: Check allocated pointers
Bin Meng [Wed, 18 May 2022 05:36:18 +0000 (13:36 +0800)] 
driver: video: Check allocated pointers

The codes that call STBTT_malloc() / stbtt__new_active() do not check
the return value at present which may cause segfault.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
4 years agosandbox: sdl: Add stub sandbox_sdl_remove_display()
Andrew Scull [Wed, 23 Mar 2022 20:20:37 +0000 (20:20 +0000)] 
sandbox: sdl: Add stub sandbox_sdl_remove_display()

Building the sandbox with NO_SDL=1 resulted in an undefined reference to
'sandbox_sdl_remove_display'. Resolve this by adding a stub
implementation to match the stubs of the other similar functions.

Signed-off-by: Andrew Scull <ascull@google.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoarm64: zynqmp: Move helper functions below header includes
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:50 +0000 (18:36 +0200)] 
arm64: zynqmp: Move helper functions below header includes

Move helper functions in psu_init files below header includes to avoid
forward declarations.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-15-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agotools: zynqmp_psu_init_minimize: Move helper functions below header includes
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:49 +0000 (18:36 +0200)] 
tools: zynqmp_psu_init_minimize: Move helper functions below header includes

Move helper functions below header includes to avoid forward
declarations.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-14-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agotools: zynqmp_psu_init_minimize: Use CR instead of LF
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:48 +0000 (18:36 +0200)] 
tools: zynqmp_psu_init_minimize: Use CR instead of LF

Use carriage return instead of line feed to support mangling across
lines.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-13-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agotools: zynqmp_psu_init_minimize: Remove low level uart settings
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:47 +0000 (18:36 +0200)] 
tools: zynqmp_psu_init_minimize: Remove low level uart settings

There is no reason to do serial initialization. Uart driver does it
already based on DT. Good effect is that it is clear which interface is
console.
The resulting change was done in past by commit 84d2bbf082fa ("arm64:
zynqmp: Remove low level UART setting").

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-12-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agoxilinx: zynqmp: make spi flash support optional
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:46 +0000 (18:36 +0200)] 
xilinx: zynqmp: make spi flash support optional

The set_dfu_alt_info function use the CONFIG_SYS_SPI_U_BOOT_OFFS define
to set the dfu_alt_info environment variable for qspi boot mode. Guard
the usage of CONFIG_SYS_SPI_U_BOOT_OFFS to make spi flash support
optional.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-11-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agoxilinx: common: Separate display cpu info function
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:45 +0000 (18:36 +0200)] 
xilinx: common: Separate display cpu info function

Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own
source file to support reuse by other board vendors.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agoxilinx: cpuinfo: Print soc machine
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:44 +0000 (18:36 +0200)] 
xilinx: cpuinfo: Print soc machine

Print the soc machine in the print_cpuinfo function.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agosoc: xilinx: zynqmp: Add machine identification support
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:43 +0000 (18:36 +0200)] 
soc: xilinx: zynqmp: Add machine identification support

Add machine identification support based on the
zynqmp_get_silicon_idcode_name function and use the soc_get_machine
function of the soc uclass to get silicon idcode name for the fpga init.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-8-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agosoc: xilinx: zynqmp: Remove redundant checks for zynqmp_mmio_read
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:42 +0000 (18:36 +0200)] 
soc: xilinx: zynqmp: Remove redundant checks for zynqmp_mmio_read

Remove the redundant SPL and CurrentEL checks for the zynqmp_mmio_read
function call because the function itself runs the same checks.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-7-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agoxilinx: zynqmp: Merge device lists
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:41 +0000 (18:36 +0200)] 
xilinx: zynqmp: Merge device lists

Merge the svd / xck devices into to the common zynqmp device list.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-6-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agoxilinx: zynqmp: Reuse shift macros to define masks
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:40 +0000 (18:36 +0200)] 
xilinx: zynqmp: Reuse shift macros to define masks

Reuse the shift macros to define the masks.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-5-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agoxilinx: zynqmp: Add macro for device type mask
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:39 +0000 (18:36 +0200)] 
xilinx: zynqmp: Add macro for device type mask

Add a macro for the device type mask of the id code.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-4-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agoxilinx: zynqmp: Replace strncat with strlcat
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:38 +0000 (18:36 +0200)] 
xilinx: zynqmp: Replace strncat with strlcat

Replace strncat with strlcat to always produce a valid null-terminated
string.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-3-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agofirmware: zynqmp: Probe driver before use
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:37 +0000 (18:36 +0200)] 
firmware: zynqmp: Probe driver before use

Probe the driver before use to ensure that the driver is always
available and the global data are valid. Initialize the global data
with zero and probe the driver if the global data are still zero. This
allows a usage of the firmware functions from other drivers with
arbitrary order between the drivers.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-2-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agofirmware: zynqmp: Check if rx channel dev pointer is valid
Stefan Herbrechtsmeier [Mon, 20 Jun 2022 16:36:36 +0000 (18:36 +0200)] 
firmware: zynqmp: Check if rx channel dev pointer is valid

Check if rx channel dev pointer is valid and not if the address of the
pointer is valid.

Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-1-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agoARM: zynq: Fix size-cells for pl353 driver
Amit Kumar Mahapatra [Wed, 15 Jun 2022 10:22:41 +0000 (12:22 +0200)] 
ARM: zynq: Fix size-cells for pl353 driver

"size-cells" of the nand controller node should be 0 as the "reg"
property of the nand device node contains the chip select number and not
address information.
The patch fixes the below compilation warning
arch/arm/dts/zynq-zc770-xm011.dtb: Warning (reg_format):
/axi/memory-controller@e000e000/nand-controller@0,0/nand@0:reg: property
has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1)

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6e90665a2dad7fe8ade10b8f57101f8144963791.1655288559.git.michal.simek@amd.com
4 years agoarm64: zynqmp: Fix usb node drive strength and slew rate
Ashok Reddy Soma [Wed, 15 Jun 2022 10:16:13 +0000 (12:16 +0200)] 
arm64: zynqmp: Fix usb node drive strength and slew rate

As per design, all input/rx pins should have fast slew rate and 12mA
drive strength. Rest all pins should be slow slew rate and 4mA drive
strength. Fix usb nodes as per this and remove setting of slow slew rate
for all the usb gorup pins.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b245c165f05845c1f3ab41a92c82b7ec1538cee4.1655288171.git.michal.simek@amd.com
4 years agomicroblaze: Remove interrupt handler
Michal Simek [Fri, 24 Jun 2022 12:16:32 +0000 (14:16 +0200)] 
microblaze: Remove interrupt handler

The primary purpose for this code was timer. By converting it to
CONFIG_TIMER there is no code which uses this implementation that's why
remove it. If there is a need to handle interrupts this patch can be
reverted in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5f2decc5a30a5678490ebde26d8c6f5a5f873cda.1654684731.git.michal.simek@amd.com
4 years agomicroblaze: Convert axi timer to DM driver
Michal Simek [Fri, 24 Jun 2022 12:16:32 +0000 (14:16 +0200)] 
microblaze: Convert axi timer to DM driver

Move axi timer driver from Microblaze to generic location.
Origin implementation was irq based with counting down timer.

CONFIG_TIMER drivers are designed differently that timer is free running up
timer with automatic reload without any interrupt.
Information about clock rates are find out in timer_pre_probe() that's why
there is no need to get any additional information from DT in the driver
itself (only register offset).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Tested-by: Ovidiu Panait <ovidiu.panait@windriver.com>
Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com
4 years agocpu: add CPU driver for microblaze
Ovidiu Panait [Tue, 31 May 2022 18:14:35 +0000 (21:14 +0300)] 
cpu: add CPU driver for microblaze

Add a basic CPU driver that retrieves information about the microblaze CPU
core. cpu_ops handlers are implemented so that the "cpu" command can work
properly:

U-Boot-mONStR> cpu list
  0: cpu@0      MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000
U-Boot-mONStR> cpu detail
  0: cpu@0      MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000
        ID = 0, freq = 50 MHz: L1 cache, MMU

Note: cpu_ver_lookup[] and family_string_lookup[] arrays were imported from
linux.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-14-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agomicroblaze: add support for handling PVR data
Ovidiu Panait [Tue, 31 May 2022 18:14:34 +0000 (21:14 +0300)] 
microblaze: add support for handling PVR data

Add helper code for PVR (Processor Version Register) data handling. It
will be used by the UCLASS_CPU driver to populate cpuinfo fields at
runtime.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agomicroblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option
Ovidiu Panait [Tue, 31 May 2022 18:14:33 +0000 (21:14 +0300)] 
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option

Provide a static Kconfig value for the target FPGA archtitecture, as it is
done in Linux. The cpu-uclass driver will cross-check it with the value
read from PVR10 register.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agomicroblaze: cache: introduce flush_dcache_range()
Ovidiu Panait [Tue, 31 May 2022 18:14:32 +0000 (21:14 +0300)] 
microblaze: cache: introduce flush_dcache_range()

Align microblaze with the other architectures and provide an
implementation for flush_dcache_range(). Also, remove the microblaze
exception in drivers/core/device.c.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-11-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
4 years agomicroblaze: cache: introduce cpuinfo structure
Ovidiu Panait [Tue, 31 May 2022 18:14:31 +0000 (21:14 +0300)] 
microblaze: cache: introduce cpuinfo structure

Introduce a minimal cpuinfo structure to hold cache related info. The
instruction/data cache size and cache line size are initialized early in
the boot to default Kconfig values. They will be overwritten with data
from PVR/dtb if the microblaze UCLASS_CPU driver is enabled.

The cpuinfo struct was placed in global_data to allow the microblaze
UCLASS_CPU driver to also run before relocation (initialized global data
should be read-only before relocation).

gd_cpuinfo() helper macro was added to avoid volatile
"-Wdiscarded-qualifiers" warnings when using the pointer directly.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-10-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/)
4 years agomicroblaze: cache: introduce flush_cache_all()
Ovidiu Panait [Tue, 31 May 2022 18:14:30 +0000 (21:14 +0300)] 
microblaze: cache: introduce flush_cache_all()

All flush_cache() calls in microblaze code are supposed to flush the
entire instruction and data caches, so introduce flush_cache_all()
helper to handle this.

Also, provide implementations for flush_dcache_all() and
invalidate_icache_all() so that icache and dcache u-boot commands can
work.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-9-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>