]> git.ipfire.org Git - thirdparty/u-boot.git/log
thirdparty/u-boot.git
4 years agoriscv: Enable SPI flash env for SiFive Unmatched.
Thomas Skibo [Wed, 24 Nov 2021 22:32:10 +0000 (14:32 -0800)] 
riscv: Enable SPI flash env for SiFive Unmatched.

Enable saving environment to SPI flash memory on SiFive
Unmatched.

Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
4 years agoriscv: Support booting SiFive Unmatched from SPI.
Thomas Skibo [Wed, 24 Nov 2021 22:32:09 +0000 (14:32 -0800)] 
riscv: Support booting SiFive Unmatched from SPI.

Configure SPI flash devices into SPL.  Add SPI boot option to spl.c.
Document how to format flash for booting.

Signed-off-by: Thomas Skibo <thomas-git@skibo.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
4 years agodoc: board: Update Microchip MPFS Icicle Kit doc
Padmarao Begari [Wed, 17 Nov 2021 12:51:19 +0000 (18:21 +0530)] 
doc: board: Update Microchip MPFS Icicle Kit doc

UART1 use for U-Boot and Linux console instead of UART0 and
UART0 is reserved for Hart Software Services(HSS).

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
4 years agoriscv: Update Microchip MPFS Icicle Kit support
Padmarao Begari [Wed, 17 Nov 2021 12:51:18 +0000 (18:21 +0530)] 
riscv: Update Microchip MPFS Icicle Kit support

This patch updates Microchip MPFS Icicle Kit support. For now,
add Microchip I2C driver, set environment variables for
mac addresses and default build for SBI_V02.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
4 years agoriscv: dts: Split Microchip device tree
Padmarao Begari [Wed, 17 Nov 2021 12:51:17 +0000 (18:21 +0530)] 
riscv: dts: Split Microchip device tree

The device tree split into .dtsi and .dts files, common
device node for eMMC/SD, enable I2C1, UART1 for console
instead of UART0, enable the DDR 2GB memory and in
that 288MB memory is reserved for fabric buffer.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
4 years agoi2c: Add Microchip PolarFire SoC I2C driver
Padmarao Begari [Wed, 17 Nov 2021 12:51:16 +0000 (18:21 +0530)] 
i2c: Add Microchip PolarFire SoC I2C driver

Add I2C driver code for the Microchip PolarFire SoC.
This driver supports I2C data transfer and probe for I2C
slave addresses.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
4 years agonet: macb: Remove Microchip compatible string
Padmarao Begari [Wed, 17 Nov 2021 12:51:15 +0000 (18:21 +0530)] 
net: macb: Remove Microchip compatible string

Remove the microchip compatible string and default compatible "cdns,macb"
support both 32-bit and 64-bit DMA access.

Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
4 years agoboard: ae350: Support autoboot from RAM
Leo Yu-Chi Liang [Thu, 4 Nov 2021 01:53:26 +0000 (09:53 +0800)] 
board: ae350: Support autoboot from RAM

Add boot command "bootcmd_ram" to support autoboot from RAM.

This feature could be useful at the very initial state of chip design
when there is only a minimal set of peripheral. (e.g. without mmc and mac ..etc)

The kernel image is default to be loaded at 0x2000000 via debug port,
and the following script serves as an example:

spl()
{
cmd="riscv64-linux-gdb -q \
-ex \"target remote $host:$port\" \
-ex \"load\" \
-ex \"thread apply all set \\\$pc=&_start\" \
-ex \"thread apply all set \\\$a0=\\\$mhartid\" \
-ex \"thread apply all set \\\$a1=<dtb address>\" \
-ex \"restore u-boot.itb binary 0x200000\" \
-ex \"restore Image binary 0x2000000\" \
-ex \"c\" \
spl/u-boot-spl
"

echo $cmd
eval $cmd
}

The address where the kernel is loaded can be altered by
changing the value of KERNEL_IMAGE_ADDR.

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
4 years agonet: dwc_eth_qos: Enable clock in probe
Marek Vasut [Sat, 13 Nov 2021 02:23:52 +0000 (03:23 +0100)] 
net: dwc_eth_qos: Enable clock in probe

Enable DWC IP clock in driver probe, so the MII access is possible even
outside of active network transfers. This is particularly useful when
using 'mii' or 'mdio' commands to explore PHY state, neither of which
works with DWMAC currently due to the disabled clock.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
4 years agonet: eth-phy: Handle gpio_request_by_name() return value
Marek Vasut [Sat, 13 Nov 2021 02:23:11 +0000 (03:23 +0100)] 
net: eth-phy: Handle gpio_request_by_name() return value

The gpio_request_by_name() returns zero in case of success, however the
conditional return value check in gpio_request_by_name() checks only for
(ret != -ENOENT) and if the condition is true, returns ret outright.

This leads to a situation where successful gpio_request_by_name() return
leads to immediate successful eth_phy_of_to_plat() return as well, and
to skipped parsing of "reset-assert-us" and "reset-deassert-us", so the
PHY driver operates with valid reset GPIO, but with assert/deassert times
set to default, which is 0, instead of the values from DT. This breaks
PHY reset.

Fix this by checking if return value is non-zero and then for this one
single allowed non-zero return value, -ENOENT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
4 years agoboard: brcm-ns3: Load netXtreme firmware
Bharat Gooty [Mon, 8 Nov 2021 22:46:11 +0000 (14:46 -0800)] 
board: brcm-ns3: Load netXtreme firmware

Load NetXtreme firmware in board_init when BNXT_ETH is selected.

Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Roman Bacik <roman.bacik@broadcom.com>
4 years agonet: brcm: netXtreme driver
Bharat Gooty [Mon, 8 Nov 2021 22:46:10 +0000 (14:46 -0800)] 
net: brcm: netXtreme driver

Broadcom bnxt L2 driver support. Used by the Broadcom
iproc platforms.

Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Roman Bacik <roman.bacik@broadcom.com>
4 years agodriver: net: Makefile: order file alphabetically
Ramon Fried [Thu, 2 Dec 2021 06:15:27 +0000 (08:15 +0200)] 
driver: net: Makefile: order file alphabetically

Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
4 years agodrivers: net: Soft reset felix switch core
Radu Bulie [Sat, 27 Nov 2021 12:52:35 +0000 (14:52 +0200)] 
drivers: net: Soft reset felix switch core

It turns out that in custom designs if the system is reset
multiple times in conjunction with a slight increase in external
temperature, the felix  switch starts to behave in a strange way:
packets are no longer received on the ENECT interface connected
to the L2switch internal port (the TX side of internal port stops working
or the packets do not reach there. It is not very clear where
the packets remain blocked. None of the counters points to a disruption
in the L2switch)
The issue is not reproducible on NXP reference designs.

It was observed that by adding the switch core reset, the problem
goes aways, even if intensive testing in temperature chambers
is applied.

The current patch performs soft reset on the switch core to ensure proper
operation of the L2switch.

Signed-off-by: Radu Bulie <radu-andrei.bulie@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
4 years agotools/netconsole: Add support for socat
Andy Shevchenko [Wed, 17 Nov 2021 17:15:06 +0000 (20:15 +0300)] 
tools/netconsole: Add support for socat

socat is a very powerful tool to work with socets (and not only)
in UNIX systems. Let's add support for it in netconsole.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Ferry Toth <fntoth@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
4 years agomtd: spi: Remove SF_DUAL_FLASH symbol from Kconfig
Michal Simek [Tue, 30 Nov 2021 12:47:10 +0000 (13:47 +0100)] 
mtd: spi: Remove SF_DUAL_FLASH symbol from Kconfig

This symbol is not used anywhere in the code. Just enable in couple of
defconfigs but it does nothing that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agomtd: cqspi: Wait for transfer completion
Marek Vasut [Tue, 14 Sep 2021 03:22:31 +0000 (05:22 +0200)] 
mtd: cqspi: Wait for transfer completion

Wait for the read/write transfer finish bit get actually cleared,
this does not happen immediately on at least SoCFPGA Gen5.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Pratyush Yadav <p.yadav@ti.com>
4 years agospl: fit: Skip attempting to load 0 length image
Nishanth Menon [Tue, 19 Oct 2021 17:32:29 +0000 (12:32 -0500)] 
spl: fit: Skip attempting to load 0 length image

When, for various reasons, a bad FIT image is used where a loadable
image is marked as 0 length, attempt is made for a 0 length allocation and
read of 0 byte read operation.

Instead provide warning in log and skip attempting to do such a load.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>
4 years agodm: add debug message when failed to select the default pinctrl
Patrick Delaunay [Fri, 19 Nov 2021 09:02:27 +0000 (10:02 +0100)] 
dm: add debug message when failed to select the default pinctrl

Add a message on probe in driver model core when the default
pinctrl selection failed.

This message is displayed only when the pinctrl API is
implemented, i.e. when result is not ENOSYS.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agopinctrl: change result for unsupported API
Patrick Delaunay [Fri, 19 Nov 2021 09:02:26 +0000 (10:02 +0100)] 
pinctrl: change result for unsupported API

Use the return value ENOSYS for unsupported API
- pinctrl_generic_set_state
- pinctrl_select_state

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agoscripts: remove CONFIG_IS_ENABLED and CONFIG_VAL in config_whitelist.txt
Patrick Delaunay [Mon, 8 Nov 2021 09:21:22 +0000 (10:21 +0100)] 
scripts: remove CONFIG_IS_ENABLED and CONFIG_VAL in config_whitelist.txt

The helper macro CONFIG_IS_ENABLED and CONFIG_VAL are not real
configurations and they are no more present in u-boot.cfg so they can
be removed in config_whitelist.txt.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Simon Glass <sjg@chromium.org>
4 years agoscripts: remove CONFIG_IS_ENABLED and CONFIG_VAL in generated u_boot.cfg
Patrick Delaunay [Mon, 8 Nov 2021 09:21:21 +0000 (10:21 +0100)] 
scripts: remove CONFIG_IS_ENABLED and CONFIG_VAL in generated u_boot.cfg

The two helpers macros CONFIG_IS_ENABLED and CONFIG_VAL are defined in
include/linux/kconfig.h but they are not real configurations; they can
be safely removed in the generated configuration file "u-boot.cfg".

This patch simplifies the comparison of this U-Boot configuration file.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Acked-by: Simon Glass <sjg@chromium.org>
4 years agoMerge branch '2021-12-01-Kconfig-migrations' into next
Tom Rini [Wed, 1 Dec 2021 18:30:59 +0000 (13:30 -0500)] 
Merge branch '2021-12-01-Kconfig-migrations' into next

- Finish converting CONFIG_USE_BOOTCOMMAND, CONFIG_BOOTCOMMAND,
  CONFIG_RAMBOOTCOMMAND, CONFIG_NFSBOOTCOMMAND, all of
  CONFIG_SYS_[BO]R[0-7]_PRELIM, CONFIG_FSL_DDR_BIST and
  CONFIG_FSL_DDR_INTERACTIVE.

4 years agoConvert CONFIG_FSL_DDR_BIST et al to Kconfig
Tom Rini [Sun, 14 Nov 2021 00:22:43 +0000 (19:22 -0500)] 
Convert CONFIG_FSL_DDR_BIST et al to Kconfig

This converts the following to Kconfig:
   CONFIG_FSL_DDR_BIST
   CONFIG_FSL_DDR_INTERACTIVE

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoConvert CONFIG_SYS_BR0_PRELIM et al to Kconfig
Tom Rini [Sat, 13 Nov 2021 23:10:40 +0000 (18:10 -0500)] 
Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_BR0_PRELIM
   CONFIG_SYS_OR1_PRELIM
   CONFIG_SYS_BR1_PRELIM
   CONFIG_SYS_OR2_PRELIM
   CONFIG_SYS_BR2_PRELIM
   CONFIG_SYS_OR2_PRELIM
   CONFIG_SYS_BR3_PRELIM
   CONFIG_SYS_OR3_PRELIM
   CONFIG_SYS_BR4_PRELIM
   CONFIG_SYS_OR4_PRELIM
   CONFIG_SYS_BR5_PRELIM
   CONFIG_SYS_OR5_PRELIM
   CONFIG_SYS_BR6_PRELIM
   CONFIG_SYS_OR6_PRELIM
   CONFIG_SYS_BR7_PRELIM
   CONFIG_SYS_OR7_PRELIM

This also introduces CONFIG_SYS_BR0_PRELIM_BOOL as not all platforms
that can set these values do so.  Add the relevant SYS_BRx_PRELIM_BOOL
to platforms that had not been previously migrated.

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoConvert CONFIG_USE_BOOTCOMMAND et al to Kconfig
Tom Rini [Wed, 10 Nov 2021 14:11:40 +0000 (09:11 -0500)] 
Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig

This converts the following to Kconfig:
   CONFIG_USE_BOOTCOMMAND
   CONFIG_BOOTCOMMAND
   CONFIG_RAMBOOTCOMMAND
   CONFIG_NFSBOOTCOMMAND

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoMerge tag 'u-boot-stm32-20211130' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Wed, 1 Dec 2021 12:22:25 +0000 (07:22 -0500)] 
Merge tag 'u-boot-stm32-20211130' of https://source.denx.de/u-boot/custodians/u-boot-stm into next

- add nor1 device support for DFU command
- remove CONFIG_STM32_IPCC from stm32mp15 defconfigs
- enable simple framebuffer node for splashscreen for stm32mp1
- use lower-case hex for address for stm32 MCU and MPU's device tree
- define LOG_CATEGORY for stmfx pinctrl driver
- add support for probing bus voltage level translator
- add custom PHY reset bindings on AV96
- enable KSZ90x1 PHY driver on DHCOR
- stm32mp1 DDR update:
  - add DDR read data eye training
  - remove DDR calibration result
  - remove DDR tuning support
  - compute DDR size from DDRCTL registers
- DHSOM boards:
  - increase USB power-good delay
  - add update_sf script to install U-Boot into SF
  - increase PHY auto-negotiation timeout to 20 seconds
  - fix SoM and board coding strap GPIO handling
  - auto-detect uSD level translator

4 years agoboard: stm32mp1: add support of nor1 device in dfu command
Patrick Delaunay [Thu, 25 Nov 2021 10:54:53 +0000 (11:54 +0100)] 
board: stm32mp1: add support of nor1 device in dfu command

Add support of mtd backend for nor1 when this device is present on the
board, on STM32MP157C-EV1 for example, as the support of several MTD
spi-nor instance are now supported with commit b7f060565e31 ("mtd:
spi-nor: allow registering multiple MTDs when DM is enabled").

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 years agoram: stm32mp1: remove __maybe_unused on stm32mp1_ddr_setup
Patrick Delaunay [Wed, 24 Nov 2021 09:52:19 +0000 (10:52 +0100)] 
ram: stm32mp1: remove __maybe_unused on stm32mp1_ddr_setup

Since the commit f42045b2e750 ("stm32mp15: replace CONFIG_TFABOOT when
it is possible") the function stm32mp1_ddr_setup is always called so the
__maybe_unused can be removed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 years agoram: stm32mp1: compute DDR size from DDRCTL registers
Patrick Delaunay [Wed, 24 Nov 2021 09:52:18 +0000 (10:52 +0100)] 
ram: stm32mp1: compute DDR size from DDRCTL registers

Compute the DDR size from DDR controller register (mstr and addrmap)
in U-Boot proper as the DDR information are useful only for SPL
but not for U-Boot proper, for example with TFABOOT.

This patch simplify U-Boot DT when several DDR size are supported
and support of next SOC in STM32MP family.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
4 years agoconfigs: stm32mp15: deactivate the CONFIG_STM32_IPCC
Patrick Delaunay [Fri, 19 Nov 2021 09:07:32 +0000 (10:07 +0100)] 
configs: stm32mp15: deactivate the CONFIG_STM32_IPCC

The IPCC mailbox is only used for communication with M4 firmware but
it is not used in the stm32 remoteproc driver; it was planed but the
support of this mailbox in remoteproc for STM32MP15x is dropped.

So the associated drivers and config CONFIG_STM32_IPCC can be
deactivated to reduce the U-Boot size; the CONFIG_DM_MAILBOX can be
also deactivated as the mailbox UCLASS is no more used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 years agoboard: stm32mp1: enable simple framebuffer node for splashscreen
Patrick Delaunay [Mon, 15 Nov 2021 15:32:23 +0000 (16:32 +0100)] 
board: stm32mp1: enable simple framebuffer node for splashscreen

Enable an existing simple framebuffer node in the Linux kernel device
tree and the add the associated reserved memory node to preserved the
resources (clock, memory) used by the stm32 video driver to display
the splashscreen = background in exlinux.conf file.

These resources will be released by the Linux driver only when the
associated driver is ready to avoid transition issues during the Linux
kernel initialization between U-Boot splash screen and the final display.

See Linux documentation for details:
Documentation/devicetree/bindings/display/simple-framebuffer.yaml

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 years agovideo: stm32: stm32_ltdc: align framebuffer on 2MB
Patrick Delaunay [Mon, 15 Nov 2021 15:32:22 +0000 (16:32 +0100)] 
video: stm32: stm32_ltdc: align framebuffer on 2MB

Align the framebuffer size on MMU_SECTION_SIZE in kernel, = max 2MB for
LPAE for armV7, to avoid issue with the simple frame buffer activation,
when U-Boot add a reserved memory in the kernel device tree to preserve
the splash screen until Linux driver initialization.

See Linux documentation for details:
Documentation/devicetree/bindings/display/simple-framebuffer.yaml

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 years agocommon: add fdt_simplefb_enable_and_mem_rsv function
Patrick Delaunay [Mon, 15 Nov 2021 15:32:21 +0000 (16:32 +0100)] 
common: add fdt_simplefb_enable_and_mem_rsv function

Add a new function to activate an existing simple frame buffer node
and add the associated reserved memory, with no-map properties.

This device tree update is only done when the video device is active
and the video buffer is used.

This patch uses '#if CONFIG_IS_ENABLED(DM_VIDEO)' because
gd->video_bottom and gd->video_top are only defined when CONFIG_DM_VIDEO
is activated.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 years agovideo: Add video_is_active function
Patrick Delaunay [Mon, 15 Nov 2021 15:32:20 +0000 (16:32 +0100)] 
video: Add video_is_active function

Add the helper function video_is_active() to test if one video device
is active.

This function can be used in board code to execute operation
only when the display is probed / really used.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 years agocommon: rename functions lcd_dt_simplefb to fdt_simplefb
Patrick Delaunay [Mon, 15 Nov 2021 15:32:19 +0000 (16:32 +0100)] 
common: rename functions lcd_dt_simplefb to fdt_simplefb

Rename the function named lcd_dt_simplefb* to fdt_simplefb* to be aligned
with the associated file name fdt_simplefb.h/fdt_simplefb.c

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
4 years agocommon: rename lcd_simplefb.c file to fdt_simplefb.c
Patrick Delaunay [Mon, 15 Nov 2021 15:32:18 +0000 (16:32 +0100)] 
common: rename lcd_simplefb.c file to fdt_simplefb.c

Rename the file lcd_simplefb.c to fdt_simplefb.c to be aligned
with the configuration name and with the associated include file
./include/fdt_simplefb.h

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 years agoConvert CONFIG_LCD_DT_SIMPLEFB to Kconfig
Patrick Delaunay [Mon, 15 Nov 2021 15:32:17 +0000 (16:32 +0100)] 
Convert CONFIG_LCD_DT_SIMPLEFB to Kconfig

This converts the following to Kconfig:
   CONFIG_LCD_DT_SIMPLEFB

This patch also renames this config to CONFIG_FDT_SIMPLEFB as the code in
common/lcd_simplefb.c support CONFIG_LCD and CONFIG_VIDEO.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
4 years agostm32mp1: ram: remove tuning support
Patrick Delaunay [Mon, 15 Nov 2021 14:32:30 +0000 (15:32 +0100)] 
stm32mp1: ram: remove tuning support

Remove the DDR interactive command tuning, as the support of a predefined
DDR PHY tuning is removed for STM32MP1 driver in SPL and in TF-A
and the result of this tuning will be never used.

Moreover this SW tuning procedure can failed on some hardware
configuration (to many BIST errors and no convergence); it will be no
more supported in the next delivery of the DDR utilities included in
the CubeMX tool of STMicroelectronics.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 years agostm32mp1: ram: remove the support of calibration result
Patrick Delaunay [Mon, 15 Nov 2021 14:32:29 +0000 (15:32 +0100)] 
stm32mp1: ram: remove the support of calibration result

The support of a predefined DDR PHY tuning result is removed for
STM32MP1 driver because it is not needed at the supported frequency
when built-in calibration is executed.

The calibration parameters were provided in the device tree by the
optional node "st,phy-cal", activated in ddr helper file by the
compilation flag DDR_PHY_CAL_SKIP and filled with values generated
by the CubeMX DDR utilities.

This patch
- updates the binding file to remove "st,phy-cal" support
- updates the device trees and remove the associated defines
- simplifies the STM32MP1 DDR driver and remove the support of
  the optional parameter "st,phy-cal"

After this patch, the built-in calibration is always executed
and the calibration registers are moved in the phy dynamic part;
that allows manual tests.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 years agostm32mp1: ram: add read valid training support
Patrick Delaunay [Mon, 15 Nov 2021 14:32:28 +0000 (15:32 +0100)] 
stm32mp1: ram: add read valid training support

Add the read data eye training = training for optimal read valid placement
(RVTRN) when the built-in calibration is executed for LPDDR2 and LPDDR3.

This training is supported on the PUBL integrated in the STM32MP15x
DDR subsystem and it is not required for DDR3.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 years agoARM: dts: stm32: Auto-detect DHSOM with uSD level translator
Marek Vasut [Sat, 13 Nov 2021 02:29:44 +0000 (03:29 +0100)] 
ARM: dts: stm32: Auto-detect DHSOM with uSD level translator

The uSD level translator on DHSOM and Avenger96 are optional, however it
is possible to auto-detect it. This is done by setting SD CMD line high,
and then testing whether signal level on CK line matches the signal level
on CKIN line. If so, the uSD level translator is present, otherwise it is
not populated.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 years agommc: stm32_sdmmc2: Add support for probing bus voltage level translator
Marek Vasut [Sat, 13 Nov 2021 02:29:43 +0000 (03:29 +0100)] 
mmc: stm32_sdmmc2: Add support for probing bus voltage level translator

Add support for testing whether bus voltage level translator is present
and operational. This is useful on systems where the bus voltage level
translator is optional, as the translator can be auto-detected by the
driver and the feedback clock functionality can be disabled if it is
not present.

The translator test sets CMD high to avoid interfering with a card, and
then verifies whether signal set on CK is detected on CKIN. If the signal
is detected, translator is present, otherwise the CKIN feedback clock are
disabled.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Yann Gautier <yann.gautier@foss.st.com>
4 years agoARM: stm32: Enable KSZ90x1 PHY driver on DHCOR
Marek Vasut [Sat, 13 Nov 2021 02:28:03 +0000 (03:28 +0100)] 
ARM: stm32: Enable KSZ90x1 PHY driver on DHCOR

Enable KSZ9x01 PHY driver in DHCOR common configuration, since the
AV96 board has this PHY populated on the PCB.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
4 years agoARM: dts: stm32: Add custom PHY reset bindings on AV96
Marek Vasut [Sat, 13 Nov 2021 02:27:37 +0000 (03:27 +0100)] 
ARM: dts: stm32: Add custom PHY reset bindings on AV96

The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset and fix sporadic ethernet
malfunctions, until the next DT sync.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
4 years agoARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOM
Marek Vasut [Sat, 13 Nov 2021 02:26:39 +0000 (03:26 +0100)] 
ARM: stm32: Fix SoM and board coding strap GPIO handling on DHSOM

The variables retaining the strap values have to be initialized, always,
make it so. Moreover, free the requested GPIO list at the end to avoid
wasting memory.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
4 years agoARM: stm32: Increase PHY auto-negotiation timeout to 20s on DHSOM
Marek Vasut [Sat, 13 Nov 2021 02:26:05 +0000 (03:26 +0100)] 
ARM: stm32: Increase PHY auto-negotiation timeout to 20s on DHSOM

The Micrel PHYs on known DHSOM based boards take a while to come out
of reset, increase the auto-negotiation timeout to prevent it from
timing out in case the ethernet is used right after the board was
reset.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
4 years agoARM: stm32: Add update_sf script to install U-Boot into SF on DHSOM
Marek Vasut [Sat, 13 Nov 2021 02:25:13 +0000 (03:25 +0100)] 
ARM: stm32: Add update_sf script to install U-Boot into SF on DHSOM

Add script to read U-Boot from SD card and write it to matching
locations in the SPI NOR, thus making the SPI NOR bootable. The
script erases the entire SPI NOR, including U-Boot environment,
to make sure the installation is clean. To retain environment
from current running U-Boot, run 'saveenv' after running the
'update_sf' script.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
4 years agoARM: stm32: Increase USB power-good delay on DHSOM
Marek Vasut [Sat, 13 Nov 2021 02:24:44 +0000 (03:24 +0100)] 
ARM: stm32: Increase USB power-good delay on DHSOM

The USB hub on STM32MP1 DHCOM boards needs to wait a bit longer until
the USB Vbus is stable. Increase the USB power-good delay to 1 s.

This adds default-undefined STM32MP_BOARD_EXTRA_ENV variable into
stm32mp15_common.h to reduce duplication in board-specific config
files adding custom environment.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 years agoFix MMC numbering issue for Raspberry Pi 3
Mike Karels [Wed, 27 Oct 2021 22:26:15 +0000 (22:26 +0000)] 
Fix MMC numbering issue for Raspberry Pi 3

Using mmc.dtbo from rpi-firmware to switch the controller for the SD
card slot from sdhci to sdhost causes the numbering to change; the
SD card is then not recognized at boot.  Add to the range checked.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
4 years agorpi: Add identifier for the new RPi Zero 2 W
Peter Robinson [Sun, 21 Nov 2021 17:03:46 +0000 (17:03 +0000)] 
rpi: Add identifier for the new RPi Zero 2 W

The Raspberry Pi Foundation released the new Zero 2 W which we
want to detect, so we can detect the correct device tree file name.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
4 years agorpi: Update the Raspberry Pi doucmentation URL
Peter Robinson [Sun, 21 Nov 2021 17:03:45 +0000 (17:03 +0000)] 
rpi: Update the Raspberry Pi doucmentation URL

The Raspberry Pi Foundation has updated their documentation so update
the URL to the latest place to find the HW device revision codes.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
4 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Tue, 30 Nov 2021 13:59:22 +0000 (08:59 -0500)] 
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell

- turris_omnia: enable A385 watchdog before disabling MCU watchdog
  (Pali)
- a37xx: Reset whole UART when changing parent clock from TBG to XTAL
  (Pali)

4 years agoMerge tag 'tpm-30112021' of https://source.denx.de/u-boot/custodians/u-boot-tpm
Tom Rini [Tue, 30 Nov 2021 13:04:28 +0000 (08:04 -0500)] 
Merge tag 'tpm-30112021' of https://source.denx.de/u-boot/custodians/u-boot-tpm

TPM2 API fixes

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoMerge tag 'efi-2022-01-rc4' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Tue, 30 Nov 2021 13:03:21 +0000 (08:03 -0500)] 
Merge tag 'efi-2022-01-rc4' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-01-rc4

Documentation:

* describe how to enable Virtio RNG on QEMU ARM

UEFI:

* enable testing the TCG2 protocol
* support TPM event log passed from firmware

4 years agotis: fix tpm_tis_remove()
Heinrich Schuchardt [Sun, 28 Nov 2021 23:03:44 +0000 (00:03 +0100)] 
tis: fix tpm_tis_remove()

tpm_tis_remove() leads to calling tpm_tis_ready() with the IO region
unmapped and chip->locality == -1 (locality released). This leads to a
crash in mmio_write_bytes().

The patch implements these changes:

tpm_tis_remove(): Unmap the IO region after calling tpm_tis_cleanup().

tpm_tis_cleanup(): Request locality before IO output and releasing
locality.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 years agopinctrl: stmfx: define LOG_CATEGORY
Patrick Delaunay [Wed, 10 Nov 2021 17:14:10 +0000 (18:14 +0100)] 
pinctrl: stmfx: define LOG_CATEGORY

Define LOG_CATEGORY to allow filtering with log command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
4 years agoARM: dts: stm32: Use lower-case hex for address for stm32429i-eval-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:20 +0000 (11:39 +0100)] 
ARM: dts: stm32: Use lower-case hex for address for stm32429i-eval-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
4 years agoARM: dts: stm32: Use lower-case hex for address for stm32f746g-eval-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:19 +0000 (11:39 +0100)] 
ARM: dts: stm32: Use lower-case hex for address for stm32f746g-eval-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
4 years agoARM: dts: stm32: Use lower-case hex for address for stm32f429-disco-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:18 +0000 (11:39 +0100)] 
ARM: dts: stm32: Use lower-case hex for address for stm32f429-disco-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
4 years agoARM: dts: stm32: Use lower-case hex for address for stm32f469-disco-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:17 +0000 (11:39 +0100)] 
ARM: dts: stm32: Use lower-case hex for address for stm32f469-disco-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
4 years agoARM: dts: stm32: Use lower-case hex for address for stm32f7-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:16 +0000 (11:39 +0100)] 
ARM: dts: stm32: Use lower-case hex for address for stm32f7-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
4 years agoARM: dts: stm32: Use lower-case hex for address for stm32746-disco-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:15 +0000 (11:39 +0100)] 
ARM: dts: stm32: Use lower-case hex for address for stm32746-disco-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
4 years agoARM: dts: stm32: Use lower-case hex for address for stm32f769-disco-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:14 +0000 (11:39 +0100)] 
ARM: dts: stm32: Use lower-case hex for address for stm32f769-disco-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
4 years agoARM: dts: stm32: Use lower-case hex for address for stm32mp15-u-boot.dtsi
Patrice Chotard [Mon, 15 Nov 2021 10:39:13 +0000 (11:39 +0100)] 
ARM: dts: stm32: Use lower-case hex for address for stm32mp15-u-boot.dtsi

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
4 years agoefi_loader: Extend PCR's for firmware measurements
Ruchika Gupta [Mon, 29 Nov 2021 07:39:46 +0000 (13:09 +0530)] 
efi_loader: Extend PCR's for firmware measurements

Firmwares before U-Boot may be capable of doing tpm measurements
and passing them to U-Boot in the form of eventlog. However there
may be scenarios where the firmwares don't have TPM driver and
are not capable of extending the measurements in the PCRs.
Based on TCG spec, if previous firnware has extended PCR's, PCR0
would not be 0. So, read the PCR0 to determine if the PCR's need
to be extended as eventlog is parsed or not.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 years agotpm: use more algorithms than sha256 on pcr_read
Ruchika Gupta [Mon, 29 Nov 2021 07:39:45 +0000 (13:09 +0530)] 
tpm: use more algorithms than sha256 on pcr_read

The current tpm2_pcr_read is hardcoded using SHA256. Make the
actual command to TPM configurable to use wider range of algorithms.
The current command line is kept as is i.e limited to SHA-256 only.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 years agoefi_loader: Add check for event log passed from firmware
Ruchika Gupta [Mon, 29 Nov 2021 07:39:44 +0000 (13:09 +0530)] 
efi_loader: Add check for event log passed from firmware

Platforms may have support to measure their initial firmware components
and pass the event log to u-boot. The event log address can be passed
in property tpm_event_log_addr and tpm_event_log_size of the tpm node.
Platforms may choose their own specific mechanism to do so. A weak
function is added to check if even log has been passed to u-boot
from earlier firmware components. If available, the eventlog is parsed
to check for its correctness and further event logs are appended to the
passed log.

Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 years agotest: unit test for the EFI_TCG2_PROTOCOL
Heinrich Schuchardt [Mon, 15 Nov 2021 17:26:50 +0000 (18:26 +0100)] 
test: unit test for the EFI_TCG2_PROTOCOL

Encapsulate the UEFI EFI_TCG2_PROTOCOL unit test in an Python test.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 years agoconfigs: enable CMD_TPM on QEMU ARM
Heinrich Schuchardt [Mon, 15 Nov 2021 17:13:10 +0000 (18:13 +0100)] 
configs: enable CMD_TPM on QEMU ARM

With TPM emulation enabled in u-boot-test-hooks we should also provide the
tpm2 command used for the test/py/tests/test_tpm2.py test.

One of the Python TPMv2 tests expects sandbox specific values. So disable
it on other platforms.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 years agodoc: qemu-arm peripherials
Heinrich Schuchardt [Sun, 28 Nov 2021 10:50:58 +0000 (11:50 +0100)] 
doc: qemu-arm peripherials

* add description how to add RNG device
* for a disk specify format=raw to avoid a warning
* fix a typo

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 years agoserial: a37xx: Reset whole UART when changing parent clock from TBG to XTAL
Pali Rohár [Mon, 15 Nov 2021 12:48:06 +0000 (13:48 +0100)] 
serial: a37xx: Reset whole UART when changing parent clock from TBG to XTAL

Sometimes UART stops transmitting characters after UART clock is changed
back to XTAL. In this state UART fifo is always full. Kernel during early
boot wants to print output on UART and is waiting for non-empty UART fifo.
Which leads to CPU hangup without any (debug) output on UART.

Marvell Armada 3700 Functional Specifications says that for programming
fractional divisor registers it is required to disable UART, enable
loopback mode, reset fifos, program registers, disable loopback mode,
release reset of fifos and enable UART.

But these steps do not fix above mentioned issue that UART hangup. Also
gating UART clock does not help. And even resetting UART state machines do
not help.

Experiments showed that UART fifo is unblocked after board is being reset
(during board reset UART HW transmit UART fifo even CPU is not executing
kernel/bootloader anymore).

And another experiments showed that same workaround can be achieved also
by external reset of UART HW (without need to reset board).

So do not implement any of "Marvell recommended" steps from Functional
Specifications as they do not work. And rather prior changing parent clock
back to XTAL, do external reset of UART HW. This operation also resets all
UART registers, so basically it also sets UART clock to default, which is
XTAL. It is unknown why UART hangups and enters such broken state.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
4 years agoarm: mvebu: turris_omnia: enable A385 watchdog before disabling MCU watchdog
Pali Rohár [Tue, 9 Nov 2021 16:14:02 +0000 (17:14 +0100)] 
arm: mvebu: turris_omnia: enable A385 watchdog before disabling MCU watchdog

Commit aeb0ca64dbb5 ("arm: mvebu: turris_omnia: disable MCU watchdog in
SPL when booting over UART") disabled MCU watchdog when booting over
UART to ensure that watchdog does not reboot the board before UART
transfer finishes.

But if UART transfer fails for some reason, or if U-Boot binary crashes,
then board hangs forever as there is no watchdog running which could
reset it.

To fix this issue, enable A385 watchdog with very high timeout before
disabling MCU watchdog to ensure that even slow transfer can finish
successfully before watchdog timer expires and also to ensure that if
board hangs for some reason, watchdog will reset it.

Omnia's MCU watchdog has fixed 120 seconds timer and it cannot be
changed (without updating MCU firmware). A385 watchdog by default uses
25 MHz input clock and so the largest timeout value (2^32-1) can be
just 171 seconds. But A385 watchdog can be switched to use NBCLK (L2) as
input clock (on Turris Omnia it is 800 MHz clock) and in this case final
watchdog clock frequency is calculated as:

  freq = NBCLK / 2 / (2 ^ R)

So A385 watchdog on Turris Omnia can be configured to at most 1374
seconds (about 22 minutes). We set it to 10 minutes, which should be
enough even for bigger U-Boot binaries or slower UART transfers.

Both U-Boot and Linux kernel, when initializing A385 watchdog, switch
watchdog timer to 25 MHz input clock, so usage of NBCLK input clock in
U-Boot SPL does not cause any issues.

Fixes: aeb0ca64dbb5 ("arm: mvebu: turris_omnia: disable MCU watchdog in SPL when booting over UART")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
4 years agoMerge tag 'v2022.01-rc3' into next
Tom Rini [Mon, 29 Nov 2021 17:00:57 +0000 (12:00 -0500)] 
Merge tag 'v2022.01-rc3' into next

Prepare v2022.01-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoPrepare v2022.01-rc3 v2022.01-rc3
Tom Rini [Mon, 29 Nov 2021 16:16:03 +0000 (11:16 -0500)] 
Prepare v2022.01-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
4 years agoboard: iot2050: update build documentation for OP-TEE
Ivan Mikhaylov [Sun, 28 Nov 2021 21:57:01 +0000 (21:57 +0000)] 
board: iot2050: update build documentation for OP-TEE

Set ta-target explicitly to correspond with OP-TEE recipe in
siemens/meta-iot2050.

Errors without explicit set of ta-target:
aarch64-linux-gnu-gcc: error: unrecognized command-line option ‘-mthumb’
aarch64-linux-gnu-gcc: error: unrecognized command-line option ‘-mno-unaligned-access’
aarch64-linux-gnu-gcc: error: unrecognized command-line option ‘-mfloat-abi=hard’
make: *** [mk/compile.mk:159: out/arm-plat-k3/ta_arm32-lib/libdl/dlfcn.o] Error 1

Signed-off-by: Ivan Mikhaylov <ivan.mikhaylov@siemens.com>
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
4 years agoqemu: common: Fix build with update capsule
Vincent Stehlé [Wed, 24 Nov 2021 14:54:20 +0000 (15:54 +0100)] 
qemu: common: Fix build with update capsule

The common emulation Makefile has a dependency on a non-existent
qemu_capsule.o when building with support for capsule update enabled
(CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y).
The code which was in qemu_capsule.c has been completely moved to
lib/efi_loader/efi_capsule.c by commit 7a6fb28c8e4b ("efi_loader: capsule:
add back efi_get_public_key_data()").
Remove the false dependency.

This fixes the following build error:

  make[1]: *** No rule to make target 'board/emulation/common/qemu_capsule.o', needed by 'board/emulation/common/built-in.o'.  Stop.

Fixes: commit 47a25e81d35c ("Revert "efi_capsule: Move signature from DTB to .rodata"")
Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Cc: Simon Glass <sjg@chromium.org>
4 years agofastboot: Add maintainers entry
Sean Anderson [Wed, 24 Nov 2021 04:33:11 +0000 (23:33 -0500)] 
fastboot: Add maintainers entry

Add an entry in maintainers for fastboot. It is starting off orphaned, but
hopefully someone can pick it up.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
4 years agoclk: Add myself as a maintainer for the clock subsystem
Sean Anderson [Wed, 24 Nov 2021 04:23:40 +0000 (23:23 -0500)] 
clk: Add myself as a maintainer for the clock subsystem

Lukasz has not been very responsive in reviewing clock patches. Add
myself as a maintainer.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
4 years agoMerge tag 'dm-pull-28nov21' of https://source.denx.de/u-boot/custodians/u-boot-dm...
Tom Rini [Mon, 29 Nov 2021 01:38:01 +0000 (20:38 -0500)] 
Merge tag 'dm-pull-28nov21' of https://source.denx.de/u-boot/custodians/u-boot-dm into next

SPI flash documentation and tidy-ups
Various driver model enhancements
Fix up some missing unit tests with pytest

4 years agotest/py: Raise a ValueError if a command fails
Simon Glass [Sat, 23 Oct 2021 23:26:12 +0000 (17:26 -0600)] 
test/py: Raise a ValueError if a command fails

At present an Exception is raised if a command fails. This is a very broad
class and makes it difficult for callers to catch the error without also
catching other things, like programming bugs.

Change it to ValueError to make this easier.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agotest/py: Relax the naming rules for unit tests
Simon Glass [Sat, 23 Oct 2021 23:26:11 +0000 (17:26 -0600)] 
test/py: Relax the naming rules for unit tests

At present the collection function used by pytest is quite strict on the
naming of the functions it detects. In particular it requires the name of
the test to be repeated in the function name.

This is not enforced anywhere else, but instead the tests are silently
omitted from the pytest run. This affects a few dozen tests.

The rule does not seem to have any particular purpose. Relax it, so that
all tests that use the UNIT_TEST() macro will run, regardless of the name
of the test function.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agosandbox: Enable HEXDUMP for sandbox_flattree
Simon Glass [Sat, 23 Oct 2021 23:26:10 +0000 (17:26 -0600)] 
sandbox: Enable HEXDUMP for sandbox_flattree

At present the hexdump tests are disabled in sandbox_flattree. This is
good, because they do not pass. Enable the required Kconfig so that they
will, when enabled.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Add a way to count the devices in a uclass
Simon Glass [Sat, 23 Oct 2021 23:26:09 +0000 (17:26 -0600)] 
dm: core: Add a way to count the devices in a uclass

Add a function that returns the number of devices in a uclass. This can be
helpful in sizing an array that needs to hold a list of them.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Allow finding children / uclasses by partial name
Simon Glass [Sat, 23 Oct 2021 23:26:08 +0000 (17:26 -0600)] 
dm: core: Allow finding children / uclasses by partial name

In some cases it is useful to search just by a partial name, such as
when looking for a sibling device that has a common name substring. Add
helper functions to handle these requirements.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Add a way to obtain a string list
Simon Glass [Sat, 23 Oct 2021 23:26:07 +0000 (17:26 -0600)] 
dm: core: Add a way to obtain a string list

At present we support reading a string list a string at a time. Apart
from being inefficient, this makes it impossible to separate reading of
the devicetree into the of_to_plat() method where it belongs, since any
code which needs access to the string must read it from the devicetree.

Add a function which returns the string property as an array of pointers
to the strings, which is easily used by clients.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Fix up string-function documentation
Simon Glass [Sat, 23 Oct 2021 23:26:06 +0000 (17:26 -0600)] 
dm: core: Fix up string-function documentation

The details for of_property_read_string_helper() and
ofnode_read_string_index() are a little inaccurate. Fix up the comments to
avoid confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Fix handling of uclass pre_unbind method
Simon Glass [Sat, 23 Oct 2021 23:26:05 +0000 (17:26 -0600)] 
dm: core: Fix handling of uclass pre_unbind method

This method is currently called after the platform data has been freed.
But the pre_unbind() method may wish to access this, e.g. to free some
data structures stored there.

Split the unbinding of devices into two pieces, as is done with removal.
This corrects the problem.

Also tidy a code-style issue in device_remove() while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodm: core: Add tests for stringlist functions
Simon Glass [Sat, 23 Oct 2021 23:26:04 +0000 (17:26 -0600)] 
dm: core: Add tests for stringlist functions

These functions currently lack tests so add some. The error handling
differs betwee livetree and flattree at present, so only check the error
codes with livetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agocommon: Allow a smaller console-recording pre-reloc
Simon Glass [Sat, 23 Oct 2021 23:26:03 +0000 (17:26 -0600)] 
common: Allow a smaller console-recording pre-reloc

Before relocation there is generally not as much available memory and not
that much console output. At present the console-output buffer is the same
side before and after relocation. Add a separate Kconfig option to remove
this limitation.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agodisk: part_dos: Fix a NULL pointer error
Simon Glass [Sat, 23 Oct 2021 23:26:02 +0000 (17:26 -0600)] 
disk: part_dos: Fix a NULL pointer error

When ext is NULL we cannot dereference it. Update the code flow to avoid
this, so that layout_mbr_partitions() can be used with partition tables
that do not include an extended partition.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agombr: Correct verification check
Simon Glass [Sat, 23 Oct 2021 23:26:01 +0000 (17:26 -0600)] 
mbr: Correct verification check

At present this command considers the partitions to be identical if the
start and size are smaller than expected. It should check that they are
the same. Fix this and tidy up the code style a little.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 years agommc: Allow for children other than the block device
Simon Glass [Sat, 23 Oct 2021 23:26:00 +0000 (17:26 -0600)] 
mmc: Allow for children other than the block device

At present the MMC uclass assumes that the only child it can have is a
block device. Update this so we can add a bootmethod too.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agosandbox: mmc: Support a backing file
Simon Glass [Sat, 23 Oct 2021 23:25:59 +0000 (17:25 -0600)] 
sandbox: mmc: Support a backing file

Provide a way for sandbox MMC to present data from a backing file. This
allows a filesystem to be created on the host and easily served via an
emulated mmc device.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agosandbox: Support unmapping a file
Simon Glass [Sat, 23 Oct 2021 23:25:58 +0000 (17:25 -0600)] 
sandbox: Support unmapping a file

Add the opposite of mapping, so that we can unmap and avoid running out of
address space.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agotest/py: Allow passing input to a program
Simon Glass [Sat, 23 Oct 2021 23:25:57 +0000 (17:25 -0600)] 
test/py: Allow passing input to a program

When running a program on the host, allow input to be passed in as stdin.
This is needed for running sfdisk, for example.

Signed-off-by: Simon Glass <sjg@chromium.org>
4 years agobinman: Fix extract command for using non-absolute image paths
Jan Kiszka [Thu, 11 Nov 2021 07:14:18 +0000 (08:14 +0100)] 
binman: Fix extract command for using non-absolute image paths

Otherwise the updated image will end up in the temporary folder that is
purged after completion.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 years agosf: doc: Add documentation for the 'sf' command
Simon Glass [Sun, 19 Sep 2021 21:49:35 +0000 (15:49 -0600)] 
sf: doc: Add documentation for the 'sf' command

This command is fairly complicated so documentation is useful.
Unfortunately I an not sure how the MTD side of things works and cannot
find information about that.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 years agosf: Tidy up code to avoid #ifdef
Simon Glass [Sun, 19 Sep 2021 21:49:34 +0000 (15:49 -0600)] 
sf: Tidy up code to avoid #ifdef

Update this code to use IS_ENABLED() instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 years agosf: Use const for the stage name
Simon Glass [Sun, 19 Sep 2021 21:49:33 +0000 (15:49 -0600)] 
sf: Use const for the stage name

This is not updated at runtime so should be marked const. Update the code
accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>