Clément Léger [Mon, 16 Aug 2021 12:25:43 +0000 (14:25 +0200)]
board: sama5d2_xplained: Modify load addresses
When using OP-TEE, address range [0x20000000 - 0x22000000] is reserved.
This modification allows to have a system which always work even when
OP-TEE is present.
Clément Léger [Mon, 16 Aug 2021 12:25:42 +0000 (14:25 +0200)]
board: sama5d2_xplained: Get dram size and base from device tree
In order to make it more flexible and allow modifying the base address
of DRAM without recompiling U-Boot, use memory node from device tree
with fdtdec functions.
Clément Léger [Mon, 16 Aug 2021 12:25:41 +0000 (14:25 +0200)]
ARM: dts: at91: sama5d2_xplained: Add memory node in devicetree
sama5d2_xplained DRAM detection code will be modified to use device tree
instead of hardcoded addresses. In order to prepare that, add the memory
node to at91-sama5d2_xplained.dts.
Clément Léger [Mon, 16 Aug 2021 12:25:40 +0000 (14:25 +0200)]
board: sama5d27_som1_ek: Modify load addresses
When using OP-TEE, address range [0x20000000 - 0x22000000] is reserved.
This modification allows to have a system which always work even when
OP-TEE is present.
Clément Léger [Mon, 16 Aug 2021 12:25:39 +0000 (14:25 +0200)]
board: sama5d27_som1_ek: Get dram size and base from device tree
In order to make it more flexible and allow modifying the base address
of DRAM without recompiling U-Boot, use memory node from device tree
with fdtdec functions.
Clément Léger [Wed, 4 Aug 2021 14:55:44 +0000 (16:55 +0200)]
ARM: mach-at91: armv7: fix multiple cpu_reset definition when enabling SYSRESET
When SYSRESET is enabled, cpu_reset function is also defined in
sysreset-uclass.c which lead to multiple definitions of this function
since reset.c is build unconditionally. Add a check in Makefile to build
this file only if SYSRESET isn't enabled.
SYSRESET can be enabled when building SYSRESET_PSCI for instance on this
platform.
clk: at91: clk-master: split master clock in pres and divider
Split master clock in 2 controlling block: one for prescaler one for
divider. This will allow referencing correctly the CPU clock and
master clock in device trees.
Reported-by: Eugen Hristev <eugen.hristev@microchip.com> Fixes: a64862284f65 ("clk: at91: sam9x60: add support compatible with
CCF") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Sean Anderson [Sat, 11 Sep 2021 19:11:30 +0000 (15:11 -0400)]
wdt: dw: Fix passing NULL pointer to reset functions
reset_*_bulk expects a real pointer.
Fixes: 4f7abafe1c ("driver: watchdog: reset watchdog in designware_wdt_stop() function") Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
Nishanth Menon [Tue, 31 Aug 2021 18:20:48 +0000 (13:20 -0500)]
arm: mach-k3: common: Make sure firmware sections are loaded prior to armv8 startup
With Device Manager firmware in an elf file form, we cannot load the FIT
image to the exact same address as any of the executable sections of the
elf file itself is located.
However, the device tree descriptions for the ARMV8 bootloader/OS
includes DDR regions only the final sections in DDR where the Device
Manager firmware is actually executing out of.
As the R5 uC is usually operating at a slower rate than an ARMv8 MPU,
by starting the Armv8 ahead of parsing the elf and copying the correct
sections to the required memories creates a race condition where the
ARMv8 could overwrite the elf image loaded from the FIT image prior to
the R5 completing parsing and putting the correct sections of elf in
the required memory locations. OR create rather obscure debug conditions
where data in the section is being modified by ARMV8 OS while the elf
copy is in progress.
To prevent all these conditions, lets make sure that the elf parse and
copy operations are completed ahead of ARMv8 being released to execute.
We will pay a penalty of elf copy time, but that is a valid tradeoff in
comparison to debug of alternate scenarios.
Roger Quadros [Wed, 8 Sep 2021 20:28:59 +0000 (15:28 -0500)]
arm: mach-k3: am6_init: Prioritize MSMC traffic over DDR in NAVSS Northbridge
NB0 is bridge to SRAM and NB1 is bridge to DDR.
To ensure that SRAM transfers are not stalled due to delays during DDR
refreshes, SRAM traffic should be higher priority (threadmap=2) than
DDR traffic (threadmap=0).
This fixup is critical to provide deterministic access latency to
MSMC from ICSSG, it applies to all AM65 silicon revisions and is due
to incorrect reset values (has no erratum id) and statically setting
things up should be done independent of usecases and board.
This specific style of Northbridge configuration is specific only to
AM65x devices, follow-on K3 devices have different data prioritization
schemes (ASEL and the like) and hence the fixup applies purely to
AM65x.
Without this fix, ICSSG TX lock-ups due to delays in MSMC transfers in
case of SR1 devices, on SR2 devices, lockups were not observed so far
but high retry rates of ICSSG Ethernet (icssg-eth) and, thus, lower
throughput.
Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Andrew F. Davis <afd@ti.com> Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Benoit Parrot <bparrot@ti.com>
[Jan: rebased, dropped used define, extended commit log] Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
[Nishanth: Provide relevant context in the commit message] Signed-off-by: Nishanth Menon<nm@ti.com>
Suman Anna [Tue, 7 Sep 2021 22:16:58 +0000 (17:16 -0500)]
clk: ti: k3: Update driver to account for divider flags
The K3 SoCs have some PLL output clocks (POSTDIV clocks) which in
turn serve as inputs to other HSDIV output clocks. These clocks use
the actual value to compute the divider clock rate, and need to be
registered with the CLK_DIVIDER_ONE_BASED flags. The current k3-clk
driver and data lacks the infrastructure to pass in divider flags.
Update the driver and data to account for these divider flags.
Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Dave Gerlach [Tue, 7 Sep 2021 22:16:57 +0000 (17:16 -0500)]
clk: ti: k3-pll: Change DIV_CTRL programming to read-modify-write
There are three different divider values in the DIV_CTRL register
controlled by the k3-pll driver. Currently the ti_pll_clk_set_rate
function writes the entire register when programming plld, even though
plld only resides in the lower 6 bits.
Change the plld programming to read-modify-write to only affect the
relevant bits for plld and to preserve the other two divider values
present in the upper 16 bits, otherwise they will always get set to zero
when programming plld.
Fixes: 0aa2930ca192 ("clk: add support for TI K3 SoC PLL") Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Dave Gerlach [Tue, 7 Sep 2021 22:16:56 +0000 (17:16 -0500)]
arm: mach-k3: Add note to auto-generated files
Add a note to the automatically generated clk-data and dev-data files
for j721e and j7200 to indicate that they are in fact auto-generated and
should not be hand edited.
Also adjust TI URL to use https instead of http and also add an empty
line before first header inclusion.
Suman Anna [Tue, 7 Sep 2021 22:16:55 +0000 (17:16 -0500)]
arm: mach-k3: j7200: Fix clk-data parenting for postdiv PLL clocks
The TI K3 Fractional PLLs use two programmable POSTDIV1 and POSTDIV2
divisors to generate the final FOUTPOSTDIV clock. These are in sequence
with POSTDIV2 following the POSTDIV1 clock. The current J7200 clock data
has the POSTDIV2 clock as the parent for the POSTDIV1 clock, which is
opposite of the actual implementation. Fix the data by simply adjusting
the register bit-shifts.
The Main PLL1 POSTDIV clocks were also defined incorrectly using Main PLL0
register values, fix these as well.
Fixes: 277729eaf373 ("arm: mach-k3: Add platform data for j721e and j7200") Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Suman Anna [Tue, 7 Sep 2021 22:16:54 +0000 (17:16 -0500)]
arm: mach-k3: j721e: Fix clk-data parenting for postdiv PLL clocks
The TI K3 Fractional PLLs use two programmable POSTDIV1 and POSTDIV2
divisors to generate the final FOUTPOSTDIV clock. These are in sequence
with POSTDIV2 following the POSTDIV1 clock. The current J721E clock data
has the POSTDIV2 clock as the parent for the POSTDIV1 clock, which is
opposite of the actual implementation. Fix the data by simply adjusting
the register bit-shifts.
The Main PLL1 POSTDIV clocks were also defined incorrectly using Main PLL0
register values, fix these as well.
Fixes: 277729eaf373 ("arm: mach-k3: Add platform data for j721e and j7200") Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Suman Anna [Tue, 27 Jul 2021 23:24:39 +0000 (18:24 -0500)]
firmware: ti_sci: Include linux/err.h in ti_sci_protocol.h
The common TI SCI header file uses some macros from err.h and these
get exercised when CONFIG_TI_SCI_PROTOCOL is not defined. Include
the linux/err.h header file in this header file directly rather
than relying on source files to include it to eliminate any
potential build errors.
While at this, reorder the existing header file include to the
beginning of the file.
Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
Pali Rohár [Mon, 2 Aug 2021 13:18:38 +0000 (15:18 +0200)]
Remove including timestamp.h in version.h
Header file version.h does not use anything from timestamp.h. Including of
timestamp.h has side effect which cause recompiling object file at every
make run because timestamp.h changes at every run.
So remove timestamp.h from version.h and include timestamp.h in files
which needs it.
This change reduce recompilation time of final U-Boot binary when U-Boot
source files were not changed as less source files needs to be recompiled.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Add in lib/acpi/acpi_table.c and test/dm/acpi.c, rework a few others] Signed-off-by: Tom Rini <trini@konsulko.com>
Pali Rohár [Mon, 2 Aug 2021 13:18:37 +0000 (15:18 +0200)]
version: Remove global macro U_BOOT_VERSION_STRING from version.h
Version string is available in global variable char version_string[].
Macro U_BOOT_VERSION_STRING is not used by any other file, so remove it
completely from version.h. Other files were already converted to use
variable version_string[].
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Pali Rohár [Mon, 2 Aug 2021 13:18:36 +0000 (15:18 +0200)]
x86: quark: MRC: Remove U_BOOT_DATE and U_BOOT_TIME from debug log
U_BOOT_DATE and U_BOOT_TIME are updated on every run of make command.
Therefore mrc.c file is recompiled every time when running make which means
that whole U-Boot binary is recompiled on every run of make command.
Simplify it and do not recompile U-Boot binary on every run of make command
by not depending on macros U_BOOT_DATE and U_BOOT_TIME.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Thu, 16 Sep 2021 19:30:08 +0000 (15:30 -0400)]
powerpc: Drop version_string placement optimization
As explained by Wolfgang, historically PowerPC would do a number of
things to hand-optimize placement of the binary on NOR flash in order to
maximize utilization of very scarce resources. These days, we simply
aren't optimizing our binary layout for NOR flash placement and it's
quite likely this wasn't working as intended. Furthermore, this level
of optimization makes it difficult to have version_string be a global,
instead of a weak and overridden value, and so make more progress on
reproducible builds, which is a current concern.
Move to having PowerPC no longer store version_string in the early part
of text so that it might be part of the first page of NOR and instead
use the same declaration everyone else does.
Pali Rohár [Mon, 2 Aug 2021 13:18:32 +0000 (15:18 +0200)]
m68k: mcf: Remove overloading version_string
There is no need to overload version_string at the end of start.S files.
Common implementation of version_string should be fine.
Signed-off-by: Pali Rohár <pali@kernel.org>
[trini: Keep the align, it's important for the rest of linkage] Signed-off-by: Tom Rini <trini@konsulko.com>
Pali Rohár [Mon, 2 Aug 2021 13:18:31 +0000 (15:18 +0200)]
version: Move version_string[] from version.h to version_string.h
More C files do not use compile time timestamp macros and do not have to be
recompiled every time when SOURCE_DATE_EPOCH changes.
This patch moves version_string[] from version.h to version_string.h and
updates other C files which only needs version_string[] string to include
version_string.h instead of version.h. After applying this patch these
files are not recompiled every time when SOURCE_DATE_EPOCH changes.
Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Pali Rohár [Mon, 2 Aug 2021 13:18:30 +0000 (15:18 +0200)]
efi_loader: Use directly version_string variable
Macro U_BOOT_VERSION_STRING is already stored in variable version_string.
So use directly this variable instead of storing U_BOOT_VERSION_STRING into
temporary variable.
Signed-off-by: Pali Rohár <pali@kernel.org>
[trini: This area was reworked since posted, what is here is now really
inspired by the previous version, so drop Ilias' Acked-by] Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 17 Sep 2021 16:05:20 +0000 (12:05 -0400)]
m68k: Add missing ENTRY entry in linker script
Currently, there is no ENTRY() entry in the m68k linker script.
However, since they currently contain a version_string symbol, which
then overrides the default weak version_string symbol, the linker
decides we must keep start.o in the resulting link. Add an ENTRY() line
so that the linker will know to keep this, even when version_string is
no longer provided in start.S
Cc: Huan Wang <alison.wang@nxp.com> Cc: Angelo Dureghello <angelo@sysam.it> Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Thu, 19 Aug 2021 03:40:27 +0000 (21:40 -0600)]
sqfs: Suppress the message about missing filesystem
This message comes up a lot when scanning filesystems. It suggests to the
user that there is some sort of error, but in fact there is no reason to
expect that a particular partition has a sqfs filesystem. Other
filesystems don't print this error.
Turn it into a debug message.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Simon Glass [Thu, 19 Aug 2021 03:40:26 +0000 (21:40 -0600)]
btrfs: Suppress the message about missing filesystem
This message comes up a lot when scanning filesystems. It suggests to the
user that there is some sort of error, but in fact there is no reason to
expect that a particular partition has a btrfs filesystem. Other
filesystems don't print this error.
Turn it into a debug message.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Qu Wenruo <wqu@suse.com>
Tom Rini [Thu, 16 Sep 2021 15:45:03 +0000 (11:45 -0400)]
pci: Fix mismerge with v2021.10-rc4
With legacy PCI code removed and thus DM_PCI also removed, a few places
did not get correctly updated with the merge to next and thus broke.
Remove now extraneous dependencies on DM_PCI.
Tom Rini [Wed, 15 Sep 2021 19:22:46 +0000 (15:22 -0400)]
Merge branch 'rpi-next' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
Ivan's patch fixes a kernel warning when booting RPi2, as the firmware
already
provides a frambebuffer node.
Marek's patch fixes random crashes on 32 bit RPi4 with newer firmware.
My SMBIOS patchesfixes an issue that show up with e4f8e543f1 ("smbios: Drop the unused Kconfig options").
Basically the SMBIOS table broke and wasn't readable anymore.
Ivan T. Ivanov [Tue, 10 Aug 2021 14:31:14 +0000 (16:31 +0200)]
rpi: Conditionally add simple-framebuffer node
It appears that RPi firmware has already added framebuffer
node under /chosen, at least on RPi 2 versions. So check
for this and don't add duplicate node.
Signed-off-by: Ivan T. Ivanov <iivanov@suse.de> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Marek Szyprowski [Thu, 17 Jun 2021 09:22:03 +0000 (11:22 +0200)]
ARM: bcm283x: change the virtual address of the XHCI PCI device base
Move the XHCI PCI device base up in the virtual address space. This fixes
initialization failure observed with newer Raspberry Pi firmware, later
than 63b1922311 ("firmware: arm_loader: Update armstubs with those from
PR 117). It looks that chosing 0xff800000 as the XHCI PCI device base
conflicts with the updated ARM/VideoCore firmware.
This also requires to reduce the size of the mapped PCI device region
from 8MiB to 4MiB to fit into 32bit address space. This is still enough
for the XHCI PCI device.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org> Tested-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
image: Avoid erroneous double byte-swap in CRC value
The hash algorithm selection was streamlined in commit 92055e138f28
("image: Drop if/elseif hash selection in calculate_hash()"). Said
commit kept the call to cpu_to_uimage() to convert the CRC to big
endian format.
This would have been correct when calling crc32_wd(). However, the
->hash_func_ws member of crc32 points to crc32_wd_buf(), which already
converts the CRC to big endian. On a little endian host, doing both
conversions results in a little-endian CRC. This is incorrect.
To remedy this, simply drop the call to cpu_to_uimage(), thus only
doing the byte-order conversion once.
Fixes: 92055e138f28 ("image: Drop if/elseif hash selection in
calculate_hash()") Tested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
We are not guaranteed to have the padding_pkcs_15_verify symbol since
commit 92c960bc1d ("lib: rsa: Remove #ifdefs from rsa.h"), and
commit 61416fe9df ("Kconfig: FIT_SIGNATURE should not select RSA_VERIFY")
The padding_algos only make sense with RSA verification, which can now
be disabled in lieu of ECDSA. In fact this will lead to build failures
because of the missing symbol mentioned earlier.
To resolve this, move the padding_algos to a linker list, with
declarations moved to rsa_verify.c. This is consistent with commit 6909edb4ce ("image: rsa: Move verification algorithm to a linker list")
One could argue that the added #ifdef USE_HOSTCC is ugly, and should
be hidden within the U_BOOT_PADDING_ALGO() macro. However, this would
be inconsistent with the "cryptos" list. This logic for was not
previously explored:
Without knowledge of the U_BOOT_PADDING_ALGO() macro, its use is
similar to something being declared. However, should #ifndef
USE_HOSTCC be part of the macro, it would not be obvious that it
behaves differently on host code and target code. Having the #ifndef
outside the macro makes this obvious.
Also, the #ifdef is not always necessary. For example ecda-verify
makes use of U_BOOT_CRYPTO_ALGO() without any accompanying #ifdefs.
The fundamental issue is a lack of separation of host and target code
in rsa_verify. Therefore, the declaration of a padding algo with the
external #ifdef is more readable and consistent.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
If keydir is not provided but name is we want to use name as key_id.
But with the current coding name is only used on its own if it is NULL
and keydir is provided which never occurs.
Fixes: 824ee745fbca ("lib/rsa: Use the 'keyfile' argument from mkimage") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Andre Przywara [Fri, 3 Sep 2021 15:49:16 +0000 (16:49 +0100)]
sunxi: mmc: A20: Fix MMC optimisation
Some SoCs (as seen on A20) seem to misreport the MMC FIFO level if the
FIFO is completely full: the level size reads as zero, but the FIFO_FULL
bit is set. We won't do a single iteration of the read loop in this
case, so will be stuck forever.
Check for this situation and use a safe minimal FIFO size instead when
we hit this case.
This fixes MMC boot on A20 devices after the MMC FIFO optimisation
(9faae5457f52).
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tom Rini [Mon, 13 Sep 2021 12:31:41 +0000 (08:31 -0400)]
Merge tag 'mmc-2021-9-13' of https://source.denx.de/u-boot/custodians/u-boot-mmc
Support using mmc command for enumerating mmc card in a given mode
Fix device_remove in mmc
Fix switch issue with send_status disabled
Drop 1ms delay in fsl_esdhc command sending
Revert "mmc: sdhci: set to INT_DATA_END when there are data"
Michael Walle [Fri, 10 Sep 2021 09:20:52 +0000 (11:20 +0200)]
mmc: fsl_esdhc: remove 1ms sleep in esdhc_send_cmd_common()
Since the beginning of this driver which was initially for the MPC8379
and MPC8536 SoCs, there is this spurious 1ms delay. According to the
comment it should actually be only 8 clock cycles. Esp. during EFI block
transfers, this 1ms add up to a significant delay and slows down EFI
boot.
I couldn't find any mention in the MPC8536 that there should be a delay
of 8 clock cycles between commands. The SD card specification mentions that
the clock has to be left enabled for 8 cycles after a command or
response. But I don't see how this delay will help with this.
Go ahead and just remove it. If there will ever be any regression we can
introduce a compile time flag, but for now I'd like to keep it simple.
In the split off imx driver this delay was also removed in commit 9098682200e6 ("mmc: fsl_esdhc_imx: remove the 1ms delay before sending
command").
Bin Meng [Thu, 26 Aug 2021 15:33:35 +0000 (23:33 +0800)]
azure/gitlab: Add tests for SiFive Unleashed board
This adds CI tests for SiFive Unleashed board.
QEMU supports booting exact the same images as used on the real
hardware out of the box, that U-Boot SPL loads U-Boot proper
from either an SD card or the SPI NOR flash, hence we can easily
set up CI to cover these 2 boot flows of SiFive Unleashed board.
With this, now we can have regression testing of mmc-spi-slot and
sifive spi drivers, as well as mmc and spi-nor subsystems.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Bin Meng [Thu, 26 Aug 2021 15:33:33 +0000 (23:33 +0800)]
tools: docker: Build and install genimage
genimage [1] is a tool to create flash/disk images. This is required
by some targets, e.g.: sifive_unleashed, to generate sdcard or spi-nor
images for real hardware, as well as U-Boot CI testing.
[1] https://github.com/pengutronix/genimage
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Bin Meng [Thu, 26 Aug 2021 15:33:32 +0000 (23:33 +0800)]
tools: docker: Bump up QEMU version to 6.1.0
At present U-Boot CI testing is still using QEMU 4.2.0 which is
pretty old. Let's bump up to QEMU 6.1.0.
ninja-build is added as the prerequisite required by QEMU 6.1.0.
Note there is a bug in QEMU 6.1.0 Xilinx Zynq UART emulation codes.
A quick fix [1] was posted on QEMU mailing list but it it too late
for 6.1.0 release. Let's manually apply the bug fix on top of the
v6.1.0 release tag at the time being.
efi_loader: Remove incorrect calls of EFI_CALL in TCG2
There is two unneeded EFI_CALL references in tcg2_measure_pe_image().
The first one in efi_search_protocol() and the second on in the device path
calculation. The second isn't even a function we should be calling, but a
pointer assignment, which happens to work with the existing macro.
While at it switch the malloc call to a calloc, remove the unnecessary cast
and get rid of an unneeded if statement before copying the device path
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The move to driver model should by now be completed. To be able to remove
pre-driver model code from our block IO code require CONFIG_BLK=y for UEFI
support.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Simon Glass [Thu, 9 Sep 2021 20:10:31 +0000 (14:10 -0600)]
doc: Tidy up the bindings for the config/ node
Sort these and add a type so it is clear how to set the value. Add a note
about usage to the top. Correct the 'no-keyboard' binding which is missing
a prefix.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
configs: j72*_evm: Define the buffer sizes for dfu
On J721e R5 SPL, dfu buffer for loading sysfw.itb image gets allocated
before DRAM gets initialized. So, the buffer gets allocated in MCU L3
RAM. The current buffer size to be allocated is 256KB and the available
total heap memory is 0x70000 (448KB). This leads to NOMEM errors during
allocation.
In other cases when constraints such as above are not present fix the size
of buffers to the sector size in OSPI for proper functioning.
Also, if CONFIG_SYS_DFU_DATA_BUF_SIZE is defined and
CONFIG_SYS_DFU_MAX_FILE_SIZE is not defined then the max file size for dfu
transfer is defined as CONFIG_SYS_DFU_DATA_BUF_SIZE.
Fix these by setting appropriate buffer sizes in their respective defconfig
files and defining the max file size as 8 MB which is the default dfu
buffer size.
environment: ti: k3_dfu: Increase the size allocated for bootloader images in dfu_alt_info_ram
The size of u-boot.img is above 1MB and that of tispl.bin is close to 1MB,
in case of j721e. Therefore, increase the sizes allocated for tispl.bin and
u-boot.img to 2 MB and 4 MB respectively, in dfu_alt_info_ram environment
variable.
arm: dts: k3-j721e-r5-*.dts: Fix clock-names property in the usb0 instance
In the cdns3 usb driver, the clock name looked for is ref. Therefore, fix
the clock-names property in usb0 instance for proper initialization of
cdns3 usb gadget driver.
projects / thirdparty / u-boot.git / log
