Harrison Mutai [Tue, 4 Mar 2025 16:52:01 +0000 (16:52 +0000)]
vepxress64: disable CRC32 by default to prevent aborts
On fast models, the CRC32 feature is disabled by default. When enabled
in U-Boot, it leads to synchronous aborts due to unrecognized
instructions. This change ensures CRC32 is disabled by default to
maintain compatibility.
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 4 Mar 2025 20:24:36 +0000 (14:24 -0600)]
serial: Add missing TPL_SYS_NS16550_SERIAL symbol
On PowerPC platforms with TPL enabled and SPL_SYS_NS16550_SERIAL
enabled, today this builds under TPL as well due to how $(XPL_) is
defined. Add the TPL_SYS_NS16550_SERIAL itself for consistency and
clarity.
Tom Rini [Tue, 18 Mar 2025 01:39:36 +0000 (19:39 -0600)]
Merge patch series "lmb: miscellaneous fixes and improvements"
Sughosh Ganu <sughosh.ganu@linaro.org> says:
The patch series contains some fixes and improvements in the lmb
code, along with addition of corresponding test cases for the changes
made.
The lmb_reserve() function currently does not check if the requested
reservation would overlap with existing reserved regions. While some
scenarios are being handled, some corner cases still exist. These are
being handled by patch 1, along with adding test cases for these
scenarios.
Patch 2 is handling the case of reserving a new region of memory, but
that region overlaps with an existing region. The current code only
handles one particular scenario, but prints a message for the other
scenario of an encompassing overlap and returns back. The patch
handles the encompassing overlap.
Patch 3 is an improvement whereby we allow coalescing a newly reserved
region with an existing region. The current code exits this check
prematurely.
Patch 4 is removing a now superfluous check for overlapping regions
with flag other than LMB_NONE. This now gets handled at an earlier
point in lmb_reserve().
Patch 5 is clubbing the functionality to check if two regions are
adjacent, or overlap, allowing some code re-use.
Patch 6 is optimising the lmb_alloc() function by having it call
_lmb_alloc_base() directly.
Sughosh Ganu [Mon, 3 Mar 2025 13:32:31 +0000 (19:02 +0530)]
lmb: optimise the lmb allocation functions
The actual logic to allocate a region of memory is in the
_lmb_alloc_base() function. The lmb_alloc() API function calls
lmb_alloc_base(), which then calls _lmb_alloc_base() to do the
allocation. Instead, call the _lmb_alloc_base() directly from both the
allocation API's, and move the error message to the _lmb_alloc_base().
Sughosh Ganu [Mon, 3 Mar 2025 13:32:30 +0000 (19:02 +0530)]
lmb: use a common function to check if regions overlap or are adjacent
The functions to check if the two said regions are adjacent or overlap
are pretty similar in nature. Club the functionality into a single
function lmb_regions_check() and return the appropriate return value
to signify this aspect.
Sughosh Ganu [Mon, 3 Mar 2025 13:32:29 +0000 (19:02 +0530)]
lmb: remove superfluous address overlap check from lmb_add_region_flags()
U-Boot allows re-use of already reserved memory through the
lmb_reserve() and lmb_alloc_addr() API's. This memory re-use is
allowed only when the flag of the existing reserved region and that of
the requested region is LMB_NONE. A check was put in the
lmb_add_region_flags() in commit 8b8b35a4f5e to handle the scenario
where an already reserved region was re-requested with region flag
other than LMB_NONE -- the function then returns -EEXIST in such a
scenario.
The lmb_reserve() function now does a check for a reservation request
with existing reserved regions, and returns -EEXIST in case of an
overlap but when the flag check fails. Remove this now redundant check
from lmb_add_region_flags().
Sughosh Ganu [Mon, 3 Mar 2025 13:32:28 +0000 (19:02 +0530)]
lmb: check for a region's coalescing with all existing regions
The lmb_add_region_flags() first checks if the new region to be added
can be coalesced with existing regions. The check stops if the two
regions are adjecent but their flags do not match. However, it is
possible that the newly added region might be adjacent with the next
existing region and with matching flags. Check for this possibility by
not breaking out of the loop.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Sughosh Ganu [Mon, 3 Mar 2025 13:32:27 +0000 (19:02 +0530)]
lmb: handle scenario of encompassing overlap
The lmb_fix_over_lap_regions() function is called if the added region
overlaps with an existing region. The function then fixes the overlap
and removes the redundant region. However, it makes certain
assumptions. One assumption is that the overlap would not encompass
the existing region. Another assumption is that the overlap only
occurs between two regions -- the scenario of the added region
overlapping multiple existing regions is not being handled. Handle
these cases by instead calling lmb_resize_regions(). Also remove the
now superfluous lmb_fix_over_lap_regions().
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Sughosh Ganu [Mon, 3 Mar 2025 13:32:26 +0000 (19:02 +0530)]
lmb: check if a region can be reserved by lmb_reserve()
The logic used in lmb_alloc() takes into consideration the existing
reserved regions, and ensures that the allocated region does not
overlap with any existing allocated regions. The lmb_reserve()
function is not doing any such checks -- the requested region might
overlap with an existing region. This also shows up with
lmb_alloc_addr() as this function ends up calling lmb_reserve().
Add a function which checks if the region requested is overlapping
with an existing reserved region, and allow for the reservation to
happen only if both the regions have LMB_NONE flag, which allows
re-requesting of the region. In any other scenario of an overlap, have
lmb_reserve() return -EEXIST, implying that the requested region is
already reserved.
Add corresponding test cases which check for overlapping reservation
requests made through lmb_reserve() and lmb_alloc_addr(). And while
here, fix some of the comments in the test function being touched.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Caleb Connolly [Fri, 14 Mar 2025 15:31:19 +0000 (15:31 +0000)]
clk/qcom: bubble up qcom_gate_clk_en() errors
If we try to enable a gate clock that doesn't exist, we used to just
fail silently. This may make sense for early bringup of some core
peripherals that we know are already enabled, but it only makes
debugging missing clocks more difficult.
Bubble up errors now that qcom_gate_clk_en() can return an error code to
catch any still-missing clocks and make it easier to find missing ones
as more complicated peripherals are enabled.
Michal Simek [Thu, 6 Mar 2025 10:12:30 +0000 (11:12 +0100)]
cmd: version: Get information about GCC and LD back
U-Boot version command is no longer showing information about GCC and LD.
The reason is that version.h has been removed that's why CC_VERSION_STRING
and LD_VERSION_STRING are not pass.
Values are generated to generated/version_autogenerated.h which is sourced
in version.h.
Fixes: 54ecce2cbf90 ("version: Separate our version string from the version command") Signed-off-by: Michal Simek <michal.simek@amd.com>
Tom Rini [Mon, 17 Mar 2025 13:59:39 +0000 (07:59 -0600)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
These are mainly DBSC5 DRAM controller specific fixes and updates for
current release. There is the long overdue BL31 start V4H board code as
well, that should be in the current release to make the V4H White Hawk
board usable with SPL, and a fallback U-Boot PSCI implementation
enablement to make sure the board always boots. And finally, there are
two comment fixes.
Depending on ARCH_IPQ40XX is too restrictive, as this architecture is
explicitly armv7. This driver is also used on msm8916 devices, which
have cortex-a53 armv8 cores.
Sam Day [Mon, 27 Jan 2025 14:48:55 +0000 (14:48 +0000)]
mach-snapdragon: handle platforms without PSCI support
Most MSM8916 devices shipped without PSCI support. The history is quite
nuanced (a good overview can be found in [1]), but the end result is
that the upstream DTs for this SoC pretend that PSCI exists, and it's
expected that the bootloader handles the case where it doesn't. This is
codified by the de-facto bootloader for MSM8916 devices, lk2nd [2].
So we handle it here by deleting the /psci node if we detect the absence
of PSCI. We need to do this early to ensure sysreset works correctly,
since the PSCI firmware driver is PRE_RELOC and binds the PSCI sysreset
driver.
Additionally, show_psci_version is updated to check that PSCI exists.
Currently this banner outputs "PSCI: 65535.65535" on devices without
PSCI support, which isn't very useful :)
Sam Day [Thu, 23 Jan 2025 12:12:14 +0000 (12:12 +0000)]
mach-snapdragon: support parsing memory info from external FDT
qcom_parse_memory is updated to return a -ENODATA error if the passed
FDT does not contain a /memory node, or that node is incomplete (size=0)
board_fdt_blob_setup first tries to call qcom_parse_memory with the
internal FDT (if present+valid). If that fails, it tries again with the
external FDT (again, if present+valid).
When booting with an internal FDT from upstream, it's likely that this
change results in a slight performance hit, since virtually all upstream
qcom DTs lack a fully specified memory node. The impact should be
negligible, though.
qcom_parse_memory was given a detailed docstring adapted from Caleb's
original commit message that introduced the function.
Sam Day [Wed, 12 Feb 2025 07:01:39 +0000 (07:01 +0000)]
rng: msm: don't enable PRNG if it's already enabled
msm_rng_enable is supposed to skip writing to LFSR_CFG + CONFIG
registers in the PRNG_ block if PRNG_CONFIG_HW_ENABLE is already set.
The logic to test for this was inverted.
Without this fix, the driver was causing SError aborts on my MSM8916
device. Stephan Gerhold suggested this was probably because TZ has
marked this as a protected register, since it would also be using it for
RNG.
Fixes: 033ec636fcb ("rng: Add Qualcomm MSM PRNG driver") Suggested-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Sam Day <me@samcday.com> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Link: https://lore.kernel.org/r/20250212-msm-rng-fixes-v2-3-645cf8d3fd3c@samcday.com Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
mmc: msm_sdhci: Reset clocks before reconfiguration
U-Boot has to reconfigure the clocks that were set in the boot
loaders. However, in IPQ9574, the clocks have to be reset before
they can be reconfigured. Hence add code to do the relevant
resets.
Presently, get_function_mux returns an unsigned int and cannot
differentiate between failure and correct function value. Change its
return type to int and check for failure in the caller.
Additionally, updated drivers/pinctrl/qcom/pinctrl-*.c to accommodate the
above return type change. Only compile test done.
Sam Edwards [Sat, 15 Mar 2025 22:18:10 +0000 (15:18 -0700)]
efi_loader: Move .dynamic out of .text in EFI
EFI applications need to be relocatable. Ordinarily, this is achieved
through a PE-format .reloc section, but since that requires toolchain
tricks to achieve, U-Boot's EFI applications instead embed ELF-flavored
relocation information and use it for self-relocation; thus, the
.dynamic section needs to be preserved.
Before this patch, it was tacked on to the end of .text, but this was
not proper: A .text section is SHT_PROGBITS, while the .dynamic section
is SHT_DYNAMIC. Attempting to combine them like this creates a section
type mismatch. While GNU ld doesn't seem to complain, LLVM's lld
considers this a fatal linking error.
This patch moves .dynamic out to its own section, so that the output ELF
has the correct types. (They're all mashed together when converting to
binary anyway, so this patch causes no change in the final .efi output.)
Signed-off-by: Sam Edwards <CFSworks@gmail.com> Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Sam Edwards [Sat, 15 Mar 2025 22:18:09 +0000 (15:18 -0700)]
arm: riscv: efi: Export _start symbol from crt0_*_efi stubs
While the _start label is only intended for use locally to populate the
(hand-written) PE header, the linker script includes ENTRY(_start) which
designates it as the entry point in the output ELF, resulting in linker
warnings under some linkers (e.g. LLVM's lld) due to _start not being a
globally-visible symbol. Since ELF is only an intermediary build
format, and the aforementioned PE header correctly points to _start, the
ENTRY(_start) directive could easily be removed to silence this warning.
However, since some developers who are debugging EFI by analyzing the
intermediary ELF may appreciate having correct entry-point information,
this patch instead promotes the _start labels to global symbols,
silencing the linker warning and making the intermediary ELF reflect the
true entry point.
This patch doesn't affect the final output binaries in any way.
Minda Chen [Thu, 6 Mar 2025 06:20:30 +0000 (14:20 +0800)]
spl: starfive: visionfive2: Disable USB overcurrent pin by default.
For some JH7110 boards, USB host overcurent pin is not reserved,
To make USB host work, overcurrent pin must be disabled. So set the
pin default disabled in spl stage.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Tested-by: E Shattow <lucent@gmail.com>
Minda Chen [Thu, 6 Mar 2025 06:20:28 +0000 (14:20 +0800)]
usb: cdns: starfive: Get dr mode from wrapper device dts node
Cdns core driver also get dr mode from wrapper devcie dts node
to make it is same with Starfive cdns USB Linux kernel driver,
Starfive 7110 OF_UPSTREAM is enabled
Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Reviewed-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 16 Mar 2025 13:51:44 +0000 (14:51 +0100)]
ram: renesas: dbsc5: Make struct renesas_dbsc5_board_config public
Make struct renesas_dbsc5_board_config {} definition public via
include/dbsc5.h, so this structure can be defined in board files
and passed into the DBSC5 DRAM driver by overriding weak function
dbsc5_get_board_data() on board level.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 16 Mar 2025 13:51:43 +0000 (14:51 +0100)]
ram: renesas: dbsc5: Add V4H-3/V4H-5/V4H-7 OTP based detection
Add auto-detection and handling of Renesas R-Car V4H-3 and V4H-5
in addition to V4H-7 SoC variants based on OTP fuse programming.
The V4H-3 and V4H-5 variants have reduced DRAM frequency options.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 16 Mar 2025 13:51:42 +0000 (14:51 +0100)]
ram: renesas: dbsc5: Synchronize initialization code to rev.1.10
Update the DRAM initialization code to match DBSC5 initialization code
rev.1.10 , which is currently the latest version available. This makes
DRAM initialization operational on Renesas R-Car V4H R8A779G0 rev.3.0.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 16 Mar 2025 13:51:41 +0000 (14:51 +0100)]
ram: renesas: dbsc5: Fix DBTR11 calculation
Reinstate missing increment by two in DBTR11 calculation based
on the original DBSC5 initialization code rev.0.80. The original
code did ... ODTLon - (js2[JS2_tODTon_min] - 1) + 1 , which was
incorrectly converted into ODTLon - js2[JS2_tODTon_min], but
should have been converted to ODTLon - js2[JS2_tODTon_min] + 2.
Add the missing +2 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 16 Mar 2025 13:51:40 +0000 (14:51 +0100)]
ram: renesas: dbsc5: Fix JS1 index calculation
The JS1 index is calculated correctly, but the limiter cannot
be the max() function because the index should be lower than
JS1_USABLEC_SPEC_HI and the max() function would unconditionally
override the JS1 index to JS1_USABLEC_SPEC_HI. Use clamp() to
limit the JS1 index instead.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 16 Mar 2025 13:51:38 +0000 (14:51 +0100)]
arm64: dts: renesas: Make OTP available in SPL on R8A779G0 V4H
The DBSC5 DRAM controller driver needs access to OTP fuses to discern
Renesas R-Car V4H-3, V4H-5 and V4H-7 SoC variants based on OTP fuse
programming. Make OTP block DT node available in U-Boot SPL DT so the
DBSC5 driver can determine its base address and read out the OTP fuses.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 16 Mar 2025 13:51:09 +0000 (14:51 +0100)]
arm64: renesas: Drop stale R-Car V4H SPL implementation description
The R-Car V4H SPL implementation was originally running on the Cortex-R52
core, but this is no longer the case. Majority of the SPL now runs on the
Cortex-A76 core. Drop the stale description.
Marek Vasut [Sun, 16 Mar 2025 13:50:41 +0000 (14:50 +0100)]
ARM: renesas: Drop stale common Makefile description
Remove stale Makefile description, this used to be valid for the
original Makefile from which the common Makefile was made generic,
but is no longer applicable to the common Makefile.
Marek Vasut [Sun, 2 Mar 2025 22:30:02 +0000 (23:30 +0100)]
arm64: renesas: Enable fallback PSCI on Renesas R-Car R8A779G0 V4H White Hawk
Enable fallback PSCI provider on Renesas R-Car R8A779G0 V4H White Hawk board.
This fallback PSCI provider provides basic PSCI interface which can be used
by the Linux kernel, but does not provide support for bringing up additional
CPU cores or any other functionality, except for SoC level reset.
This fallback PSCI provider is intended as a fallback in case a proper PSCI
provider is not started before the Linux kernel is started. Linux kernel on
ARMv8a will fail to boot in case a PSCI provider is not available, and this
basic fallback PSCI provider assures such a boot failure cannot occur, even
if that means the system will boot in degraded mode with only one CPU core
available, that is still sufficient to perform recovery.
In the common case, a proper PSCI provider should be started as part of
the Linux kernel fitImage, as the BL31 loadable, and replace this basic
fallback PSCI provider before the Linux kernel is started.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sun, 2 Mar 2025 20:59:11 +0000 (21:59 +0100)]
arm64: renesas: Add TFA BL31 handoff support on Renesas R-Car Gen4
Implement custom U_BOOT_FIT_LOADABLE_HANDLER and armv8_switch_to_el2_prep()
handling in case the TFA was loaded. The loadables handler sets up custom
handoff structure used by Renesas TFA fork in fixed location in DRAM and
indicates the TFA has been loaded.
The custom armv8_switch_to_el2_prep() handling tests whether the TFA BL31
was previously loaded and the custom handoff structure was set up, and if
so, jumps to TFA BL31 which switches from EL3 to EL2 and then returns to
U-Boot just past bl in armv8_switch_to_el2() to finish starting the Linux
kernel.
The jump to Linux through TFA works in such a way that the custom
armv8_switch_to_el2_prep() handler configures the custom handoff structure
such that the target jump address of the TFA BL31 on exit is set to the
armv8_switch_to_el2() + 4, which is just past the bl, and just before the
U-Boot code which implements the Linux kernel boot from either EL. The
registers passed through the TFA BL31 are all the registers passed into
armv8_switch_to_el2_prep() to assure maximum compatibility with all the
boot modes. The armv8_switch_to_el2_prep() handler jumps to the TFA BL31,
which does its setup, drops EL from EL3 to EL2 and finally jumps to the
armv8_switch_to_el2() + 4 entry point, which then allows U-Boot to boot
the Linux kernel the usual way.
In order to build suitable kernel fitImage, build TFA first, upstream
is currently under review:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/35799
Or if necessary, downstream repository:
remote: https://github.com/renesas-rcar/arm-trusted-firmware.git
branch: rcar_gen4_v2.7_v4x
Build Linux kernel Image and device tree from current mainline Linux
kernel repository, obtain 'Image' and 'r8a779g0-white-hawk.dtb' .
Bundle the files together using provided fit-image.its fitImage description:
```
$ mkimage -f fit-image.its fitImage
```
To start the kernel fiImage generated in previous step, load fitImage
to DRAM and use the 'bootm' command to start it:
=> load 0x58000000 ... fitImage && bootm 0x58000000
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Arseniy Krasnov [Sun, 22 Dec 2024 21:23:29 +0000 (00:23 +0300)]
mtd: rawnand: meson: always use OOB bytes during write
If 'oob_required' is not set by the caller (for example 'oobbuf' is NULL),
then driver doesn't copy OOB data from 'oob_poi' to special controller
structures, so zeroes will be written as OOB. But, generic raw NAND logic
in 'nand_base.c' already handles case when OOB is not required to write by
filling 'oob_poi' with 0xFF's. So let's remove 'oob_required' check to
always read 'oob_poi' data for OOB.
Kernel driver (drivers/mtd/nand/raw/meson_nand.c) works in the same way,
so need to keep same behaviour here.
Simon Glass [Sun, 9 Feb 2025 16:07:18 +0000 (09:07 -0700)]
test/py: Show info about module-loading
It is sometimes tricky to figure out what modules test.py is loading
when it starts up. The result can be a silent failure with no clue as to
what when wrong.
Add a section which lists the modules loaded as well as those not
found.
Add SYS_NAND_PAGE_SIZE dependency for cadence NAND.
This config is needed as the SPL driver will use this parameter
to read uboot-proper image in NAND during booting.
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:25 +0000 (00:18 +0800)]
drivers: mtd: nand: cadence: Use bounce buffer
Enable nand to use bounce buffer. In bounce buffer,
read/write buf will use cadence->buf which has been allocated
using malloc. This will align the memory and avoid memory to be
allocated in different addresses.
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:24 +0000 (00:18 +0800)]
drivers: mtd: nand: cadence: Poll for desc complete status
Poll for thread complete status to ensure the
descriptor processing is complete. If complete then can ensure
controller already update the descriptor status.
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:22 +0000 (00:18 +0800)]
drivers: mtd: nand: cadence: Support cmd SET_FEATURES & GET_FEATURES
Support NAND_CMD_SET_FEATURES & NAND_CMD_GET_FEATURES.
These commands is one of the basic commands of NAND. The parameters get
from these commands will be used to set timing mode
of NAND data interface.
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:17 +0000 (00:18 +0800)]
drivers: mtd: nand: Add driver for Cadence Nand
Enable driver for Cadence NAND for the family
device agilex5. This driver is leveraged from the path
/drivers/mtd/nand/raw/cadence-nand-controller.c from the
stable version 6.11.2.
Tom Rini [Fri, 14 Mar 2025 18:28:13 +0000 (12:28 -0600)]
Merge patch series "Enable USB MSC Boot for AM62, AM62A and AM62P"
Siddharth Vadapalli <s-vadapalli@ti.com> says:
This series adds config fragment for enabling USB MSC boot and USB
Storage devices which are applicable to AM62, AM62A and AM62P SoCs.
Series has been tested on AM62A7-SK, AM625-SK and AM62P5-SK for USB MSC
boot where the bootloaders were generated in the following manner:
1. AM62A7-SK (AM62A SoC):
- tiboot3.bin
=> am62ax_evm_r5_defconfig + am62x_r5_usbmsc.config
- tispl.bin and u-boot.img
=> am62ax_evm_a53_defconfig + am62x_a53_usbmsc.config
2. AM625-SK (AM62 SoC):
- tiboot3.bin
=> am62x_evm_r5_defconfig + am62x_r5_usbmsc.config
- tispl.bin and u-boot.img
=> am62x_evm_a53_defconfig + am62x_a53_usbmsc.config
3. AM62P5-SK (AM62P SoC):
- tiboot3.bin
=> am62px_evm_r5_defconfig + am62x_r5_usbmsc.config
- tispl.bin and u-boot.img
=> am62px_evm_a53_defconfig + am62x_a53_usbmsc.config
The images were flashed to a USB Flash Drive and were connected to the
Type-C interface on each of the boards which supports USB MSC Boot.
The following device-tree changes were made across all of the boards:
https://gist.github.com/Siddharth-Vadapalli-at-TI/2afb913838c1d4005bc059910c09ab4b
configs: am62x_a53: introduce fragment for USB MSC boot
Introduce the config fragment for enabling USB MSC boot. USB MSC boot
involves fetching the next stage of the bootloader from a USB Mass Storage
device such as a USB Flash Drive with the USB controller on the SoC acting
as the USB Host.
configs: am62x_r5: introduce fragment for USB MSC boot
Introduce the config fragment for enabling USB MSC boot. USB MSC boot
involves fetching the next stage of the bootloader from a USB Mass Storage
device such as a USB Flash Drive with the USB controller on the SoC acting
as the USB Host.
The configuration options CONFIG_VIDCONSOLE_AS_LCD and CONFIG_VIDCONSOLE_AS_
NAME have been marked as obsolete and scheduled for deletion in late 2020.
That's already long overdue and the last remaining consumers of these options
have already migrated to using "vidconsole" in their "stdout" and "stderr"
environment variables, so let's delete these two configuration options.
Tom Rini [Fri, 14 Mar 2025 15:31:36 +0000 (09:31 -0600)]
Merge tag 'mmu-next-14032025' of https://source.denx.de/u-boot/custodians/u-boot-tpm into next
Up to now we configure the entire memory space for U-Boot as RWX.
For modern architectures and security requirements, it's better to
map the memory properly.
This pull request adds basics support for mapping the U-Boot binary with
proper (RO, RW, RW^X) memory permissions on aarch64 right after we
relocate U-Boot in the top of DRAM.
It's worrth noting that the linker script annotations are only added for
the aarch64 architecture. We can, in the future, try to unify the linker --
at least for the architectures that have enough in common and expand this
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:43 +0000 (15:54 +0200)]
arm64: Enable RW, RX and RO mappings for the relocated binary
Now that we have everything in place switch the page permissions for
.rodata, .text and .data just after we relocate everything in top of the
RAM.
Unfortunately we can't enable this by default, since we have examples of
U-Boot crashing due to invalid access. This usually happens because code
defines const variables that it later writes. So hide it behind a Kconfig
option until we sort it out.
It's worth noting that EFI runtime services are not covered by this
patch on purpose. Since the OS can call SetVirtualAddressMap which can
relocate runtime services, we need to set them to RX initially but remap
them as RWX right before ExitBootServices.
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:42 +0000 (15:54 +0200)]
treewide: Add a function to change page permissions
For armv8 we are adding proper page permissions for the relocated U-Boot
binary. Add a weak function that can be used across architectures to change
the page permissions
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:41 +0000 (15:54 +0200)]
arm64: mmu_change_region_attr() add an option not to break PTEs
The ARM ARM (Rev L.a) on section 8.17.1 describes the cases where
break-before-make is required when changing live page tables.
Since we can use a function to tweak block and page permissions,
where BBM is not required split the existing mmu_change_region_attr()
into two functions and create one that doesn't require BBM. Subsequent
patches will use the new function to map the U-Boot binary with proper
page permissions.
While at it add function descriptions in their header files.
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:40 +0000 (15:54 +0200)]
arm: Prepare linker scripts for memory permissions
Upcoming patches are switching the memory mappings to RW, RO, RX
after the U-Boot binary and its data are relocated. Add
annotations in the linker scripts to and mark text, data, rodata
sections and align them to a page boundary.
It's worth noting that .efi_runtime memory permissions are left
untouched for now. There's two problems with EFI currently.
The first problem is that we bundle data, rodata and text in a single
.efi_runtime section which also must be close to .text for now.
As a result we also dont change the permissions for anything contained
in CPUDIR/start.o. In order to fix that we have to decoule .text_rest,
.text and .efi_runtime and have the runtime services on their own
section with proper memory permission annotations (efi_rodata etc).
The efi runtime regions (.efi_runtime_rel) can be relocated by the OS when
the latter is calling SetVirtualAddressMap. Which means we have to
configure those pages as RX for U-Boot but convert them to RWX just before
ExitBootServices. It also needs extra code in efi_tuntime relocation
code since R_AARCH64_NONE are emitted as well if we page align the
section.
Due to the above ignore EFI for now and fix it later once we have the
rest in place.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
projects / thirdparty / u-boot.git / log
