Julian Seward [Fri, 19 Aug 2016 11:47:59 +0000 (11:47 +0000)]
Add a dummy initialisation and a dummy path to avoid warnings with gcc -Og.
Neither are actually necessary, but gcc's flow analysis at -Og is weaker than
at -O or above and so it produces false warnings here. No functional change.
Most of these instructions required adding a new Iop as they could not
be emulated with existing Iops. In some cases, some of the above instrctions
could be emulated using another instruction from the above list.
Most of the instructions add support for 128-bit instructions. There are a
number of helper functions that check a values for zero, infinity, NaN, etc.
for various sizes. The new 128-bit instructions require a new version of these
existing functions for a 128-bit operand. Rather then adding another size
specific version of these functions, the existing size specific functions were
replaced with a single function that takes the size of operand to be operated
on. There are some additional helper functions that are added to support
the size independent version of these functions.
Note this is the last of the 5 patches required to complete the ISA 3.0
support.
Ivo Raisr [Fri, 12 Aug 2016 22:28:50 +0000 (22:28 +0000)]
Follow recent Solaris development with respect to
SUNWDTRACE program header. Newer Solaris no longer utilizes
this program header as a scratchspace for DTrace fasttrap
provider, before libc is loaded.
For the time being, it serves as a space for initial thread
pointer.
n-i-bz
Julian Seward [Wed, 10 Aug 2016 22:22:20 +0000 (22:22 +0000)]
Connect the v8crypto test to the build system, at least somewhat, so
as to make the post-regtest-tests happy. Still needs configure.ac
checking for "-mfpu=crypto-neon-fp-armv8" gcc flag support.
Petar Jovanovic [Wed, 10 Aug 2016 14:38:10 +0000 (14:38 +0000)]
mips32: add support for FPXX mode
With this patch, MIPS32 Valgrind compiled with -mfpxx can handle all types
(regarding FP_ABI flag) of MIPS32 ELFs.
- Functions arch_elf_pt_proc() and arch_check_elf() are added to elf reader
according to linux/fs/binfmt_elf.c from Linux 4.1;
- Processing .MIPS.abiflags section and initializing appropriate FPU mode
for MIPS32 are added;
- Emulation of prctl(GET/SET_FP_MODE) sys-calls are implemented for MIPS32.
Patch by Aleksandar Rikalo <Aleksandar.Rikalo@imgtec.com>
Julian Seward [Sat, 6 Aug 2016 12:33:59 +0000 (12:33 +0000)]
Fix uses of CPSR in these tests, so that (1) the relevant fields are
initialised properly before the test, and (2) after the test, we don't
print implementation-defined parts of the resulting CPSR.
Julian Seward [Sat, 6 Aug 2016 12:32:37 +0000 (12:32 +0000)]
do_vldm_vstm_check: don't use caller saved FP ('s') registers to hold
data that we expect to stay alive over calls to printf. Fixes erratic
failures of this test.
Julian Seward [Fri, 5 Aug 2016 14:54:27 +0000 (14:54 +0000)]
Reimplement pszB_to_listNo using a binary search rather than a linear search.
Unlikely as it seems, this saves a considerable number of instructions (2% of total)
on very heap-intensive code (perf/heap.c).
Julian Seward [Thu, 4 Aug 2016 21:11:28 +0000 (21:11 +0000)]
Make "ashmem" and "binder" ioctls be handled properly on 64-bit ARM Android,
rather than falling through to the generic handler and being mishandled.
Fixes #360574.
Julian Seward [Wed, 3 Aug 2016 11:53:11 +0000 (11:53 +0000)]
arm32 backend stuff needed to support IR artefacts resulting from
guest support of 32-bit V8 crypto instructions:
* add new pseudo-instruction ARMin_VXferQ, to move values between
two D regs and a Q reg, in either direction. Use this to implement
Iop_64HLtoV128 much more efficiently than before, and to implement
Iop_V128HIto64 and Iop_V128to64.
* Generate code for helper calls in which have four or more
(32-bit) word-sized arguments and a V128 return value.
These require passing arguments on the stack.
Ivo Raisr [Fri, 29 Jul 2016 20:52:21 +0000 (20:52 +0000)]
Fix test memcheck/tests/descr_belowsp a bit on Solaris.
On Solaris, '%p' outputs just a hexadecimal number
without '0x' prefix. This is perfectly valid but not
understood by VG_(strtok_get_address_and_size)().
Therefore use universal PRIxPTR.
n-i-bz
Carl Love [Thu, 28 Jul 2016 16:51:53 +0000 (16:51 +0000)]
When running the valgrind tests, the jm-insns test is segfaulting when it
attempts to patch instructions as it deals with the ppc64 (BE) function
descriptor. This is actually due to the RELRO option being enabled by default
for the ppc64 (BE) platform, per an upstream binutils change.
Bugzilla 365912 reported by Will Schmidt, Will supplied the patch to fix the
make file none/tests/ppc64/Makefile.a
dis_neon_data_3same: for the case A==12, don't silently produce invalid IR
which then causes the sanity checker to abort the run. Instead synthesise
a SIGILL in the normal way.
Add test cases for PCMPxSTRx cases 0x62 and 0x72, and reformat the associated
switch statements a bit more consistently. Pertains to #353384 and #353727.
If an instruction can't be decoded, print the first 10 bytes at RSP
rather than 8. 8 is not enough to disambiguate the instruction in
some situations, in particular where there is a control immediate byte
at the end of the instruction.
dis_pc_relative, case 0x002: remove a path that cannot be taken. That
stops gcc -Og complaining. It complains because at that relatively
low level of optimisation, its flow analysis is apparently too weak to
see that the removed path cannot be taken and so it complains
(wrongly) about a possibly uninitialised use of |result|. No
functional change.
Regression test for n-i-bz amd64: memcheck false positive with shr %edx
Valgrind side : reproducer for the false positive memcheck
+ announce the fix (VEX side in next commit)
Fix leak in m_redir.c
See below discussion for more details.
On Sat, 2016-07-02 at 14:20 +0200, Philippe Waroquiers wrote:
> I am testing a patch (provided by Julian) that solves a false positive
> memcheck found at my work.
>
> Testing this, I decided to run valgrind under valgrind (not done since
> a long time).
>
> This shows a leak in many tests, the stack trace being such as:
> ==26246== 336 bytes in 21 blocks are definitely lost in loss record 72 of 141
> ==26246== at 0x2801C01D: vgPlain_arena_malloc (m_mallocfree.c:1855)
> ==26246== by 0x2801D616: vgPlain_arena_strdup (m_mallocfree.c:2528)
> ==26246== by 0x2801D616: vgPlain_strdup (m_mallocfree.c:2600)
> ==26246== by 0x2801F5AD: vgPlain_redir_notify_new_DebugInfo (m_redir.c:619)
> ==26246== by 0x2803B650: di_notify_ACHIEVE_ACCEPT_STATE (debuginfo.c:771)
> ==26246== by 0x2803B650: vgPlain_di_notify_mmap (debuginfo.c:1067)
> ==26246== by 0x2806589C: vgModuleLocal_generic_PRE_sys_mmap (syswrap-generic.c:2368)
> ==26246== by 0x2809932A: vgSysWrap_amd64_linux_sys_mmap_before (syswrap-amd64-linux.c:637)
> ==26246== by 0x28061E11: vgPlain_client_syscall (syswrap-main.c:1906)
> ==26246== by 0x2805E9D2: handle_syscall (scheduler.c:1118)
> ==26246== by 0x280604A6: vgPlain_scheduler (scheduler.c:1435)
> ==26246== by 0x2806FF87: thread_wrapper (syswrap-linux.c:103)
> ==26246== by 0x2806FF87: run_a_thread_NORETURN (syswrap-linux.c:156)
>
>
> The strdup call in m_redir.c:619 was introduced by r15726.
>
> However, I am not sure this is a bug that is introduced by this change,
> or if it just reveals a leak that was already there.
> The "very original" replacement logic did not do memory allocation for
> the replacement: see m_redir.c in valgrind 3.10.1 : it was just copying
> some chars from VG_(clo_soname_synonyms) to demangled_sopatt
Yes, it should do exactly the same as the other code paths. If
replaced_sopatt != NULL then it is an allocated string that has been
assigned to demangled_sopatt. I had assumed that would take care of the
life-time issues of the allocated string. But now that I read the code
it is indeed not so clear.
> Then in 3.11, the fixed size demangled_sopatt was changed to be
> a dynamically allocated buffer.
> The revision log 14664 that introduced this explains that the ownership of
> returned buffer is not easy. It tells at the end:
> "So the rule of thunb here is: if in doubt strdup the string."
>
> but now we have to see when to free what, it seems ???
>
> Any thoughts ?
So if replaced_sopatt != NULL, then demangled_sopatt contains the
allocated string, and it is then immediately copied and assigned to
spec->from_sopatt. After that it is used under check_ppcTOCs. But there
it will first be reassigned a new value through maybe_Z_demangle
(overwriting any existing string being pointed to). So for this
particular leak it seem fine to free it right after the spec[List] has
been initialized (line 642).
Carl Love [Mon, 27 Jun 2016 15:50:29 +0000 (15:50 +0000)]
Add the HW register support for missing registers in get_otrack_shadow_offset_wrk(). The registers are: NRADDR, NRADDR_GPR2, (REDIR_STACK, TFHAR, TEXASR, TEXASRU, TFIAR, PPR, PSPB.
Don't check or try to copy sigmask if it is NULL. The sigmask might be
given in a struct, where the length is non-zero, but the signal set
pointer is NULL.
Testcase provided by Paul Eggert <eggert@cs.ucla.edu>.
Carl Love [Mon, 13 Jun 2016 17:27:03 +0000 (17:27 +0000)]
Fix mtfsfi usage of W bit. (isa2.05,ppc64)
Fix mtfsfi usage of W bit.
The Wbit field was added in ISA 2.05, allowing updates to the 'other'
half of the 64-bit FPSCR field.
Logic and Support for that bit is in place, but a 'reserved field
must contain zeros' check was not updated, preventing the desired
path from being taken.
Bugzilla 362894
Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com>
Patch reviewed and verified by: Carl Love <cel@ibm.com>
Rhys Kidd [Sat, 4 Jun 2016 15:34:56 +0000 (15:34 +0000)]
Fix tst->os_state.pthread - magic_delta assertion failure on OSX 10.11
bz#354883
Whilst I’ve seen different magic_delta values on one of my older development machines (Intel Nehalem-based), enough other users have reported success with this change.
If this causes regressions, please report your hardware details in our Bugzilla.
Petar Jovanovic [Sat, 21 May 2016 00:05:34 +0000 (00:05 +0000)]
mips: allow building code with -mfpxx
Some recent GCC-based toolchains and Debian as a distribution enable the
flag -mpfxx by default. -mfpxx implies -mno-odd-spreg, so use of odd-
numbered single-precision floating-point registers has to be avoided in
Valgrind inline assembly in that case.
Petar Jovanovic [Fri, 6 May 2016 17:34:55 +0000 (17:34 +0000)]
mips32: raise the limit for sizeof(TTEntryC)
Raise limit for sizeof(TTEntryC) due to 8-byte alignement requirement for
ULong on mips32 platforms. It is a follow up to the same change on ppc32
(see r15875), and it un-breaks mips32-linux (broken with r15784).
Un-break ppc32-linux following r15784. It appears that ppc32-ELF
layout constraints are different from x86-ELF and so the assertion on
the sizeof(TTEntryC) fails on ppc32-linux.
Split the structure TTEntry into hot (small) and cold (large) parts,
TTEntryH and TTEntryC. TTEntryH is a VexGuestExtents plus one more
field. For scenarios involving a lot of code discarding, when the
fast-path discard mechanism does not apply, this change reduces
significantly the number of LLC misses, because such discarding
involves sequentially searching the arrays of TTEntryH's. For recent
Firefoxes the miss rate in a 6MB L3 cache is reduced by about 1/3, as
measured by /usr/bin/perf.
Carl Love [Tue, 26 Apr 2016 19:53:56 +0000 (19:53 +0000)]
Power PC Fix V bit error in 128-bit BCD add and subtract instructions
The original code was using the bcdadd / bcdsub instruction on the operand
shadow bits to calculate the shadow bits for the result. This introduced
non-zero bits shadow bits in the result. The shadow bits for these
instructions should be set to all valid or all invalid. If one of the
argument shadow bits was one, then all of the shadow bits of the result should
be one. Otherwise the result shadow bits should be zero.
This patch fixes the above bug in memcheck/mc_translate.c
Fixing the above bug broke the v-bit test. The issue is the v-bit tester
assumes the shadow bits for the operands of a given Iop can be set to one
for testing purposes. The implementation of the bcdadd and bcdsub was passing
a constant value for the variable ps. The ps value is an argument to the
instruction that specifies how to set the sign code of the result. The
implementation of the instructions was changed to issue the instruction with
ps=0. Then the result of the instruction is updated in the VEX code if ps=1.
This changed also results in cleaning up the vbit test code.
This patch also fixes the issues with the v-bit test program.
Carl Love [Tue, 26 Apr 2016 19:52:56 +0000 (19:52 +0000)]
Power PC Fix V bit error in 128-bit BCD add and subtract instructions
The original code was using the bcdadd / bcdsub instruction on the operand
shadow bits to calculate the shadow bits for the result. This introduced
non-zero bits shadow bits in the result. The shadow bits for these
instructions should be set to all valid or all invalid. If one of the
argument shadow bits was one, then all of the shadow bits of the result should
be one. Otherwise the result shadow bits should be zero.
This patch fixes the above bug in memcheck/mc_translate.c
Fixing the above bug broke the v-bit test. The issue is the v-bit tester
assumes the shadow bits for the operands of a given Iop can be set to one
for testing purposes. The implementation of the bcdadd and bcdsub was passing
a constant value for the variable ps. The ps value is an argument to the
instruction that specifies how to set the sign code of the result. The
implementation of the instructions was changed to issue the instruction with
ps=0. Then the result of the instruction is updated in the VEX code if ps=1.
This changed also results in cleaning up the vbit test code.
This patch also fixes the issues with the v-bit test program.
projects / thirdparty / valgrind.git / log
