]> git.ipfire.org Git - thirdparty/linux.git/commit
perf/x86: Add PERF_CAP_PEBS_TIMING_INFO flag
authorDapeng Mi <dapeng1.mi@linux.intel.com>
Wed, 20 Aug 2025 02:30:29 +0000 (10:30 +0800)
committerPeter Zijlstra <peterz@infradead.org>
Thu, 21 Aug 2025 18:09:27 +0000 (20:09 +0200)
commit0c5caea762de31a85cbcce65d978cec83449f699
tree84034a5de2b37b7e4cfef3983d03d0feed2d13de
parent43796f30507802d93ead2dc44fc9637f34671a89
perf/x86: Add PERF_CAP_PEBS_TIMING_INFO flag

IA32_PERF_CAPABILITIES.PEBS_TIMING_INFO[bit 17] is introduced to
indicate whether timed PEBS is supported. Timed PEBS adds a new "retired
latency" field in basic info group to show the timing info. Please find
detailed information about timed PEBS in section 8.4.1 "Timed Processor
Event Based Sampling" of "Intel Architecture Instruction Set Extensions
and Future Features".

This patch adds PERF_CAP_PEBS_TIMING_INFO flag and KVM module leverages
this flag to expose timed PEBS feature to guest.

Moreover, opportunistically refine the indents and make the macros
share consistent indents.

Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Tested-by: Yi Lai <yi1.lai@intel.com>
Link: https://lore.kernel.org/r/20250820023032.17128-5-dapeng1.mi@linux.intel.com
arch/x86/include/asm/msr-index.h
tools/arch/x86/include/asm/msr-index.h