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(parent: 8defe9d) | patch
target/ppc: Fix e200 duplicate SPRs
authorNicholas Piggin <npiggin@gmail.com>
Thu, 20 Mar 2025 12:24:40 +0000 (22:24 +1000)
committerNicholas Piggin <npiggin@gmail.com>
Fri, 21 Mar 2025 03:54:36 +0000 (13:54 +1000)
commit73c0c904fc99e2ceecbbded84ec76d40d3f2daae
treecfd072d27c75dc7d141f1c061ae3198de0492995tree | snapshot
parent8defe9da08135d03e054f20cb8fea4389be96e18commit | diff
target/ppc: Fix e200 duplicate SPRs

DSRR0/1 registers are in the BookE ISA not e200 specific, so
remove the duplicate e200 register definitions.

Cc: Roman Kapl <rka@sysgo.com>
Cc: qemu-stable@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2768
Fixes: 0e3bf4890906 ("ppc: add DBCR based debugging")
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
target/ppc/cpu_init.c diff | blob | blame | history
Mirror of https://git.qemu.org/git/qemu.git