[RISC-V][PR target/120674] Avoid division by zero in dwarf emitter when vector is...

[RISC-V][PR target/120674] Avoid division by zero in dwarf emitter when vector is not enabled

This is a RISC-V specific failure in the dwarf2 emitter.  When vector is not
enabled riscv_convert_vector_chunks sets the riscv_vector_chunks poly_int to
[1, 0].

riscv_dwarf_poly_indeterminite_value pulls out that 0 coefficient and uses that
as FACTOR triggering a divide by zero here:

>               /* Add COEFF * ((REGNO / FACTOR) - BIAS) to the value:
>                  add COEFF * (REGNO / FACTOR) now and subtract
>                  COEFF * BIAS from the final constant part.  */
>               constant -= coeff * bias;
>               add_loc_descr (&ret, new_reg_loc_descr (regno, 0));
>               if (coeff % factor == 0)
>                 coeff /= factor;
>               else
>                 {
>                   int amount = exact_log2 (factor);
>                   gcc_assert (amount >= 0);
>                   add_loc_descr (&ret, int_loc_descriptor (amount));
>                   add_loc_descr (&ret, new_loc_descr (DW_OP_shr, 0, 0));
>                 }

Per Robin's recommendation this patch adjusts
riscv_dwarf_poly_indeterminite_value to never set FACTOR to 0, but instead
detect this case and adjust its value to 1.

That fixes the ICE and looks good across the board in my tester. Waiting on
pre-commit CI, of course.

	PR target/120674
gcc/
	* config/riscv/riscv.cc (riscv_dwarf_poly_indeterminite_value): Do not
	set FACTOR to zero, for that case use one instead.

gcc/testsuite

	* gcc.target/riscv/pr120674.c: New test.