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(parent: eeea445) | patch
RISC-V: prefetch: const offset needs to have 5 bits zero, not 4
authorVineet Gupta <vineetg@rivosinc.com>
Fri, 4 Jul 2025 19:33:09 +0000 (12:33 -0700)
committerVineet Gupta <vineetg@rivosinc.com>
Fri, 4 Jul 2025 23:12:36 +0000 (16:12 -0700)
commitb960201091fcab631a34a8c8d5b30e9f297dfbe5
tree53b1bbe68309f8a1b341af24a845e1697dc91f8ctree | snapshot
parenteeea445e1d0f0aac813d4eccd7b8f55477772dd0commit | diff
RISC-V: prefetch: const offset needs to have 5 bits zero, not 4

Spotted this by chance as I saw a similar fixup in comment.
From comments, I think this is needed, but I've not hit any issues due
to this.

gcc/ChangeLog:

* config/riscv/predicates.md (prefetch_operand): mack 5 bits.

Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
gcc/config/riscv/predicates.md diff | blob | blame | history
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