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author	Dave Liu <daveliu@freescale.com>
	Sat, 14 Mar 2009 04:48:30 +0000 (12:48 +0800)
committer	Kumar Gala <galak@kernel.crashing.org>
	Mon, 30 Mar 2009 18:33:50 +0000 (13:33 -0500)
commit	c360ceac0286159f94d9d1a9496fc9858c8d9bec
tree	fdd1868af478993fdb547171665c5c517ee6c071	tree \| snapshot
parent	6a8197836702991468cead5ead073f589e2623ad	commit \| diff

fsl-ddr: add the DDR3 SPD infrastructure

- support mirrored DIMMs, not support register DIMMs
- test passed on P2020DS board with MT9JSF12872AY-1G1D1
- test passed on MPC8569MDS board with MT8JSF12864HY-1G1D1

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com>

common/ddr_spd.c		diff \| blob \| blame \| history
cpu/mpc85xx/ddr-gen3.c		diff \| blob \| blame \| history
cpu/mpc8xxx/ddr/Makefile		diff \| blob \| blame \| history
cpu/mpc8xxx/ddr/ctrl_regs.c		diff \| blob \| blame \| history
cpu/mpc8xxx/ddr/ddr3_dimm_params.c	[new file with mode: 0644]	blob
cpu/mpc8xxx/ddr/lc_common_dimm_params.c		diff \| blob \| blame \| history
cpu/mpc8xxx/ddr/options.c		diff \| blob \| blame \| history
include/asm-ppc/fsl_ddr_dimm_params.h		diff \| blob \| blame \| history
include/asm-ppc/fsl_ddr_sdram.h		diff \| blob \| blame \| history
include/ddr_spd.h		diff \| blob \| blame \| history

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