From 088f142f23e84d399bb65535e7e47d3bedfd9029 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 19 Mar 2021 10:52:28 +0100 Subject: [PATCH] 4.14-stable patches added patches: arm64-unconditionally-set-virtual-cpu-id-registers.patch --- ...ionally-set-virtual-cpu-id-registers.patch | 66 +++++++++++++++++++ queue-4.14/series | 1 + 2 files changed, 67 insertions(+) create mode 100644 queue-4.14/arm64-unconditionally-set-virtual-cpu-id-registers.patch diff --git a/queue-4.14/arm64-unconditionally-set-virtual-cpu-id-registers.patch b/queue-4.14/arm64-unconditionally-set-virtual-cpu-id-registers.patch new file mode 100644 index 00000000000..3b7a11f9e2c --- /dev/null +++ b/queue-4.14/arm64-unconditionally-set-virtual-cpu-id-registers.patch @@ -0,0 +1,66 @@ +From vladimir.murzin@arm.com Fri Mar 19 10:43:20 2021 +From: Vladimir Murzin +Date: Tue, 16 Mar 2021 13:43:19 +0000 +Subject: arm64: Unconditionally set virtual cpu id registers +To: linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org +Cc: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, dbrazdil@google.com +Message-ID: <20210316134319.89472-1-vladimir.murzin@arm.com> + +From: Vladimir Murzin + +Commit 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro") +reorganized el2 setup in such way that virtual cpu id registers set +only in nVHE, yet they used (and need) to be set irrespective VHE +support. + +Fixes: 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro") +Signed-off-by: Vladimir Murzin +Acked-by: Will Deacon +Reviewed-by: Marc Zyngier +--- +Changelog + + v1 -> v2 + - Drop the reference to 32bit guests from commit message (per Marc) + +There is no upstream fix since issue went away due to code there has +been reworked in 5.12: nVHE comes first, so virtual cpu id register +are always set. + +Maintainers, please, Ack. + + arch/arm64/include/asm/el2_setup.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h +index f988e94cdf9e..db87daca6b8c 100644 +--- a/arch/arm64/include/asm/el2_setup.h ++++ b/arch/arm64/include/asm/el2_setup.h +@@ -113,7 +113,7 @@ + .endm + + /* Virtual CPU ID registers */ +-.macro __init_el2_nvhe_idregs ++.macro __init_el2_idregs + mrs x0, midr_el1 + mrs x1, mpidr_el1 + msr vpidr_el2, x0 +@@ -165,6 +165,7 @@ + __init_el2_stage2 + __init_el2_gicv3 + __init_el2_hstr ++ __init_el2_idregs + + /* + * When VHE is not in use, early init of EL2 needs to be done here. +@@ -173,7 +174,6 @@ + * will be done via the _EL1 system register aliases in __cpu_setup. + */ + .ifeqs "\mode", "nvhe" +- __init_el2_nvhe_idregs + __init_el2_nvhe_cptr + __init_el2_nvhe_sve + __init_el2_nvhe_prepare_eret +-- +2.24.0 + diff --git a/queue-4.14/series b/queue-4.14/series index e466cc94f53..cec9c9495e4 100644 --- a/queue-4.14/series +++ b/queue-4.14/series @@ -4,3 +4,4 @@ ext4-check-journal-inode-extents-more-carefully.patch bpf-fix-off-by-one-for-area-size-in-creating-mask-to-left.patch bpf-simplify-alu_limit-masking-for-pointer-arithmetic.patch bpf-add-sanity-check-for-upper-ptr_limit.patch +arm64-unconditionally-set-virtual-cpu-id-registers.patch -- 2.47.3