From 0a93d1f4bb8bb2f5bf739e42f07abd780221f34a Mon Sep 17 00:00:00 2001
From: VNSL Durga <vnsl.durga.challa@xilinx.com>
Date: Thu, 24 Mar 2016 22:45:11 +0530
Subject: [PATCH] dma: zynqmp: Added zynqmp DMA clks

zynqmp dma main clock and apb clock are
added in zynqmp-clk.dtsi

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
---
 arch/arm/dts/zynqmp-clk.dtsi | 38 ++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/arch/arm/dts/zynqmp-clk.dtsi b/arch/arm/dts/zynqmp-clk.dtsi
index 2c0643ea237..34189097592 100644
--- a/arch/arm/dts/zynqmp-clk.dtsi
+++ b/arch/arm/dts/zynqmp-clk.dtsi
@@ -39,6 +39,12 @@
 		clock-frequency = <300000000>;
 	};
 
+	clk600: clk600 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <600000000>;
+	};
+
 	dp_aclk: clock0 {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
@@ -75,6 +81,38 @@
 	clocks = <&clk100 &clk100>;
 };
 
+&fpd_dma_chan1 {
+	clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan2 {
+	clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan3 {
+	clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan4 {
+	clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan5 {
+	clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan6 {
+	clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan7 {
+	clocks = <&clk600>, <&clk100>;
+};
+
+&fpd_dma_chan8 {
+	clocks = <&clk600>, <&clk100>;
+};
+
 &nand0 {
 	clocks = <&clk100 &clk100>;
 };
-- 
2.47.3