From 0cf9583d802b095816adafe24be33f8332cf9d4b Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Mon, 10 Apr 2017 18:17:38 +0200 Subject: [PATCH] 4.10-stable patches added patches: acpi-button-change-default-behavior-to-lid_init_state-open.patch acpi-save-nvs-memory-for-lenovo-g50-45.patch arm-davinci-add-skeleton-for-pdata-quirks.patch arm-kernel-add-smc-structure-parameter.patch arm-omap2-fix-init-for-multiple-quirks-for-the-same-soc.patch arm-smccc-update-hvc-comment-to-describe-new-quirk-parameter.patch asoc-codecs-rt5670-add-quirk-for-lenovo-thinkpad-10.patch asoc-intel-baytrail-add-quirk-for-lenovo-thinkpad-10.patch asoc-intel-bytcr_rt5640-quirks-for-insyde-devices.patch asoc-intel-cht_bsw_rt5645-add-baytrail-mclk-support.patch asoc-intel-cht_bsw_rt5645-harden-acpi-device-detection.patch asoc-sun4i-i2s-add-quirks-to-handle-a31-compatible.patch can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch drm-edid-constify-edid-quirk-list.patch drm-i915-actually-drive-the-bdw-reserved-ids.patch drm-i915-fix-intel_bdw_ids-definition.patch drm-i915-more-.is_mobile-cleanups-for-bdw.patch drm-mga-remove-device_is_agp-callback.patch firmware-qcom-scm-fix-interrupted-scm-calls.patch hid-multitouch-enable-the-surface-4-type-cover-pro-jp-to-report-multitouch-data.patch hid-wacom-don-t-apply-generic-settings-to-old-devices.patch mmc-sdhci-of-esdhc-remove-default-broken-cd-for-arm.patch pci-add-acs-quirk-for-intel-union-point.patch pci-add-acs-quirk-for-qualcomm-qdf2400-and-qdf2432.patch pci-add-broadcom-northstar2-paxc-quirk-for-device-class-and-mpss.patch pci-disable-msi-for-hisilicon-hip06-hip07-root-ports.patch pci-sort-the-list-of-devices-with-d3-delay-quirk-by-id.patch pci-xgene-fix-double-free-on-init-error.patch platform-x86-asus-wmi-detect-quirk_no_rfkill-from-the-dsdt.patch rx51-broken-build.patch sata-ahci-da850-implement-a-workaround-for-the-softreset-quirk.patch serial-8250_omap-add-omap_dma_tx_kick-quirk-for-am437x.patch tools-power-turbostat-decode-baytrail-cc6-and-mc6-demotion-configuration.patch tools-power-turbostat-dump-atom-p-states-correctly.patch usb-chipidea-msm-rely-on-core-to-override-ahbburst.patch usb-dwc3-host-pass-quirk-broken-port-ped-property-for-known-broken-revisions.patch usb-host-xhci-plat-enable-broken_ped-quirk-if-platform-requested.patch usb-musb-da8xx-fix-host-mode-suspend.patch usb-storage-add-ignore-residue-quirk-for-initio-inic-3619.patch usb-xhci-add-quirk-flag-for-broken-ped-bits.patch watchdog-s3c2410-fix-infinite-interrupt-in-soft-mode.patch x86-reboot-quirks-add-asus-eeebook-x205ta-reboot-quirk.patch x86-reboot-quirks-add-asus-eeebook-x205ta-w-reboot-quirk.patch x86-reboot-quirks-fix-typo-in-asus-eeebook-x205ta-reboot-quirk.patch --- ...ault-behavior-to-lid_init_state-open.patch | 122 +++++++++++ ...pi-save-nvs-memory-for-lenovo-g50-45.patch | 66 ++++++ ...avinci-add-skeleton-for-pdata-quirks.patch | 102 +++++++++ ...m-kernel-add-smc-structure-parameter.patch | 195 ++++++++++++++++++ ...for-multiple-quirks-for-the-same-soc.patch | 32 +++ ...ment-to-describe-new-quirk-parameter.patch | 34 +++ ...670-add-quirk-for-lenovo-thinkpad-10.patch | 33 +++ ...ail-add-quirk-for-lenovo-thinkpad-10.patch | 91 ++++++++ ...tcr_rt5640-quirks-for-insyde-devices.patch | 45 ++++ ...bsw_rt5645-add-baytrail-mclk-support.patch | 173 ++++++++++++++++ ..._rt5645-harden-acpi-device-detection.patch | 62 ++++++ ...-add-quirks-to-handle-a31-compatible.patch | 151 ++++++++++++++ ...quirk-flexcan_quirk_enable_eacen_rrs.patch | 66 ++++++ .../drm-edid-constify-edid-quirk-list.patch | 52 +++++ ...-actually-drive-the-bdw-reserved-ids.patch | 61 ++++++ ...rm-i915-fix-intel_bdw_ids-definition.patch | 39 ++++ ...915-more-.is_mobile-cleanups-for-bdw.patch | 57 +++++ ...rm-mga-remove-device_is_agp-callback.patch | 118 +++++++++++ ...e-qcom-scm-fix-interrupted-scm-calls.patch | 122 +++++++++++ ...ver-pro-jp-to-report-multitouch-data.patch | 80 +++++++ ...pply-generic-settings-to-old-devices.patch | 42 ++++ ...dhc-remove-default-broken-cd-for-arm.patch | 71 +++++++ ...-add-acs-quirk-for-intel-union-point.patch | 67 ++++++ ...irk-for-qualcomm-qdf2400-and-qdf2432.patch | 77 +++++++ ...paxc-quirk-for-device-class-and-mpss.patch | 56 +++++ ...for-hisilicon-hip06-hip07-root-ports.patch | 51 +++++ ...of-devices-with-d3-delay-quirk-by-id.patch | 72 +++++++ ...-xgene-fix-double-free-on-init-error.patch | 46 +++++ ...detect-quirk_no_rfkill-from-the-dsdt.patch | 105 ++++++++++ queue-4.10/rx51-broken-build.patch | 45 ++++ ...a-workaround-for-the-softreset-quirk.patch | 74 +++++++ ...dd-omap_dma_tx_kick-quirk-for-am437x.patch | 57 +++++ queue-4.10/series | 44 ++++ ...l-cc6-and-mc6-demotion-configuration.patch | 92 +++++++++ ...rbostat-dump-atom-p-states-correctly.patch | 165 +++++++++++++++ ...sm-rely-on-core-to-override-ahbburst.patch | 49 +++++ ...-property-for-known-broken-revisions.patch | 67 ++++++ ...oken_ped-quirk-if-platform-requested.patch | 51 +++++ ...usb-musb-da8xx-fix-host-mode-suspend.patch | 39 ++++ ...e-residue-quirk-for-initio-inic-3619.patch | 52 +++++ ...i-add-quirk-flag-for-broken-ped-bits.patch | 67 ++++++ ...-fix-infinite-interrupt-in-soft-mode.patch | 130 ++++++++++++ ...add-asus-eeebook-x205ta-reboot-quirk.patch | 50 +++++ ...d-asus-eeebook-x205ta-w-reboot-quirk.patch | 42 ++++ ...-in-asus-eeebook-x205ta-reboot-quirk.patch | 40 ++++ 45 files changed, 3352 insertions(+) create mode 100644 queue-4.10/acpi-button-change-default-behavior-to-lid_init_state-open.patch create mode 100644 queue-4.10/acpi-save-nvs-memory-for-lenovo-g50-45.patch create mode 100644 queue-4.10/arm-davinci-add-skeleton-for-pdata-quirks.patch create mode 100644 queue-4.10/arm-kernel-add-smc-structure-parameter.patch create mode 100644 queue-4.10/arm-omap2-fix-init-for-multiple-quirks-for-the-same-soc.patch create mode 100644 queue-4.10/arm-smccc-update-hvc-comment-to-describe-new-quirk-parameter.patch create mode 100644 queue-4.10/asoc-codecs-rt5670-add-quirk-for-lenovo-thinkpad-10.patch create mode 100644 queue-4.10/asoc-intel-baytrail-add-quirk-for-lenovo-thinkpad-10.patch create mode 100644 queue-4.10/asoc-intel-bytcr_rt5640-quirks-for-insyde-devices.patch create mode 100644 queue-4.10/asoc-intel-cht_bsw_rt5645-add-baytrail-mclk-support.patch create mode 100644 queue-4.10/asoc-intel-cht_bsw_rt5645-harden-acpi-device-detection.patch create mode 100644 queue-4.10/asoc-sun4i-i2s-add-quirks-to-handle-a31-compatible.patch create mode 100644 queue-4.10/can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch create mode 100644 queue-4.10/drm-edid-constify-edid-quirk-list.patch create mode 100644 queue-4.10/drm-i915-actually-drive-the-bdw-reserved-ids.patch create mode 100644 queue-4.10/drm-i915-fix-intel_bdw_ids-definition.patch create mode 100644 queue-4.10/drm-i915-more-.is_mobile-cleanups-for-bdw.patch create mode 100644 queue-4.10/drm-mga-remove-device_is_agp-callback.patch create mode 100644 queue-4.10/firmware-qcom-scm-fix-interrupted-scm-calls.patch create mode 100644 queue-4.10/hid-multitouch-enable-the-surface-4-type-cover-pro-jp-to-report-multitouch-data.patch create mode 100644 queue-4.10/hid-wacom-don-t-apply-generic-settings-to-old-devices.patch create mode 100644 queue-4.10/mmc-sdhci-of-esdhc-remove-default-broken-cd-for-arm.patch create mode 100644 queue-4.10/pci-add-acs-quirk-for-intel-union-point.patch create mode 100644 queue-4.10/pci-add-acs-quirk-for-qualcomm-qdf2400-and-qdf2432.patch create mode 100644 queue-4.10/pci-add-broadcom-northstar2-paxc-quirk-for-device-class-and-mpss.patch create mode 100644 queue-4.10/pci-disable-msi-for-hisilicon-hip06-hip07-root-ports.patch create mode 100644 queue-4.10/pci-sort-the-list-of-devices-with-d3-delay-quirk-by-id.patch create mode 100644 queue-4.10/pci-xgene-fix-double-free-on-init-error.patch create mode 100644 queue-4.10/platform-x86-asus-wmi-detect-quirk_no_rfkill-from-the-dsdt.patch create mode 100644 queue-4.10/rx51-broken-build.patch create mode 100644 queue-4.10/sata-ahci-da850-implement-a-workaround-for-the-softreset-quirk.patch create mode 100644 queue-4.10/serial-8250_omap-add-omap_dma_tx_kick-quirk-for-am437x.patch create mode 100644 queue-4.10/tools-power-turbostat-decode-baytrail-cc6-and-mc6-demotion-configuration.patch create mode 100644 queue-4.10/tools-power-turbostat-dump-atom-p-states-correctly.patch create mode 100644 queue-4.10/usb-chipidea-msm-rely-on-core-to-override-ahbburst.patch create mode 100644 queue-4.10/usb-dwc3-host-pass-quirk-broken-port-ped-property-for-known-broken-revisions.patch create mode 100644 queue-4.10/usb-host-xhci-plat-enable-broken_ped-quirk-if-platform-requested.patch create mode 100644 queue-4.10/usb-musb-da8xx-fix-host-mode-suspend.patch create mode 100644 queue-4.10/usb-storage-add-ignore-residue-quirk-for-initio-inic-3619.patch create mode 100644 queue-4.10/usb-xhci-add-quirk-flag-for-broken-ped-bits.patch create mode 100644 queue-4.10/watchdog-s3c2410-fix-infinite-interrupt-in-soft-mode.patch create mode 100644 queue-4.10/x86-reboot-quirks-add-asus-eeebook-x205ta-reboot-quirk.patch create mode 100644 queue-4.10/x86-reboot-quirks-add-asus-eeebook-x205ta-w-reboot-quirk.patch create mode 100644 queue-4.10/x86-reboot-quirks-fix-typo-in-asus-eeebook-x205ta-reboot-quirk.patch diff --git a/queue-4.10/acpi-button-change-default-behavior-to-lid_init_state-open.patch b/queue-4.10/acpi-button-change-default-behavior-to-lid_init_state-open.patch new file mode 100644 index 00000000000..c5b0fe92305 --- /dev/null +++ b/queue-4.10/acpi-button-change-default-behavior-to-lid_init_state-open.patch @@ -0,0 +1,122 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:27 +0000 +Subject: ACPI / button: Change default behavior to lid_init_state=open +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-69-alexander.levin@verizon.com> + +From: Lv Zheng + +[ Upstream commit 77e9a4aa9de10cc1418bf9a892366988802a8025 ] + +More and more platforms need the button.lid_init_state=open quirk. This +patch sets it the default behavior. + +If a platform doesn't send lid open event or lid open event is lost due to +the underlying system problems, then we can compare various combinations: +1. systemd/acpid is used to suspend system or not, systemd has a special + logic forcing open event after resuming; +2. _LID returns a cached value or not. + +The result is as follows: + + 1. lid_init_state=method + 1. cached + 1. resumed by lid: + (x) event=close + (x) systemd=suspends again + (x) acpid=suspends again + (x) state=close + 2. resumed by other: + (o) event=close + (x) systemd=suspends again + (x) acpid=suspends again + (o) state=close + 2. non-cached + 1. resumed by lid: + (o) event=open + (o) systemd=resumes + (o) acpid=resumes + (o) state=open + 2. resumed by other: + (o) event=close + (x) systemd=suspends again + (x) acpid=suspends again + (o) state=close + 2. lid_init_state=open + 1. cached + 1. resumed by lid: + (o) event=open + (o) systemd=resumes + (o) acpid=resumes + (x) state=close + 2. resumed by other: + (x) event=open + (o) systemd=resumes + (o) acpid=resumes + (o) state=close + 2. non-cached + 1. resumed by lid: + (o) event=open + (o) systemd=resumes + (o) acpid=resumes + (o) state=open + 2. resumed by other: + (x) event=open + (o) systemd=resumes + (o) acpid=resumes + (o) state=close + 3. lid_init_state=ignore + 1. cached + 1. resumed by lid: + (o) event=none + (x) systemd=suspends again + (o) acpid=resumes + (x) state=close + 2. resumed by other: + (o) event=none + (x) systemd=suspends again + (o) acpid=resumes + (o) state=close + 2. non-cached + 1. resumed by lid: + (o) event=none + (x) systemd=suspends again + (o) acpid=resumes + (o) state=open + 2. resumed by other: + (o) event=none + (x) systemd=suspends again + (o) acpid=resumes + (o) state=close + +As a conclusion: + 1. With systemd changed, lid_init_state=ignore has only one problem and the + problem comes from an underlying issue, not userspace and kernel lid + handling. + 2. Without systemd changed, lid_init_state=open can be the default + behavior as the pass ratio is not much worse than lid_init_state=ignore. + 3. lid_init_state=method is buggy, we can have a separate patch to make it + deprectated. + +Link: https://bugzilla.kernel.org/show_bug.cgi?id=187271 +Signed-off-by: Lv Zheng +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/acpi/button.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/acpi/button.c ++++ b/drivers/acpi/button.c +@@ -113,7 +113,7 @@ struct acpi_button { + + static BLOCKING_NOTIFIER_HEAD(acpi_lid_notifier); + static struct acpi_device *lid_device; +-static u8 lid_init_state = ACPI_BUTTON_LID_INIT_METHOD; ++static u8 lid_init_state = ACPI_BUTTON_LID_INIT_OPEN; + + static unsigned long lid_report_interval __read_mostly = 500; + module_param(lid_report_interval, ulong, 0644); diff --git a/queue-4.10/acpi-save-nvs-memory-for-lenovo-g50-45.patch b/queue-4.10/acpi-save-nvs-memory-for-lenovo-g50-45.patch new file mode 100644 index 00000000000..8aa631a9c7e --- /dev/null +++ b/queue-4.10/acpi-save-nvs-memory-for-lenovo-g50-45.patch @@ -0,0 +1,66 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:29 +0000 +Subject: ACPI: save NVS memory for Lenovo G50-45 +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-75-alexander.levin@verizon.com> + +From: Zhang Rui + +[ Upstream commit cbc00c1310d34139a63946482b40a6b261a03fb9 ] + +In commit 821d6f0359b0 (ACPI / sleep: Do not save NVS for new machines to +accelerate S3), to optimize S3 suspend/resume speed, code is introduced +to ignore NVS memory saving during S3 for all the platforms later than +2012. + +But, Lenovo G50-45, a platform released in 2015, still needs NVS memory +saving during S3. A quirk is introduced for this platform. + +Link: https://bugzilla.kernel.org/show_bug.cgi?id=189431 +Tested-by: Przemek +Signed-off-by: Zhang Rui +[ rjw: Drop unnecessary code ] +Signed-off-by: Rafael J. Wysocki +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/acpi/sleep.c | 19 +++++++++++++++++++ + 1 file changed, 19 insertions(+) + +--- a/drivers/acpi/sleep.c ++++ b/drivers/acpi/sleep.c +@@ -130,6 +130,12 @@ void __init acpi_nvs_nosave_s3(void) + nvs_nosave_s3 = true; + } + ++static int __init init_nvs_save_s3(const struct dmi_system_id *d) ++{ ++ nvs_nosave_s3 = false; ++ return 0; ++} ++ + /* + * ACPI 1.0 wants us to execute _PTS before suspending devices, so we allow the + * user to request that behavior by using the 'acpi_old_suspend_ordering' +@@ -324,6 +330,19 @@ static struct dmi_system_id acpisleep_dm + DMI_MATCH(DMI_PRODUCT_NAME, "K54HR"), + }, + }, ++ /* ++ * https://bugzilla.kernel.org/show_bug.cgi?id=189431 ++ * Lenovo G50-45 is a platform later than 2012, but needs nvs memory ++ * saving during S3. ++ */ ++ { ++ .callback = init_nvs_save_s3, ++ .ident = "Lenovo G50-45", ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "80E3"), ++ }, ++ }, + {}, + }; + diff --git a/queue-4.10/arm-davinci-add-skeleton-for-pdata-quirks.patch b/queue-4.10/arm-davinci-add-skeleton-for-pdata-quirks.patch new file mode 100644 index 00000000000..3ba5f394f63 --- /dev/null +++ b/queue-4.10/arm-davinci-add-skeleton-for-pdata-quirks.patch @@ -0,0 +1,102 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:24 +0000 +Subject: ARM: davinci: add skeleton for pdata-quirks +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-59-alexander.levin@verizon.com> + +From: Kevin Hilman + +[ Upstream commit 9c9b1bc25291e275b04f758f2549c81e092954f5 ] + +Add skeleton pdata-quirks for davinci. + +Signed-off-by: Kevin Hilman +[nsekhar@ti.com: move changes to build pdata-quirks.c and call + to pdata_quirks_init() to this patch] +Signed-off-by: Sekhar Nori +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm/mach-davinci/Makefile | 2 - + arch/arm/mach-davinci/da8xx-dt.c | 1 + arch/arm/mach-davinci/include/mach/common.h | 2 + + arch/arm/mach-davinci/pdata-quirks.c | 39 ++++++++++++++++++++++++++++ + 4 files changed, 43 insertions(+), 1 deletion(-) + create mode 100644 arch/arm/mach-davinci/pdata-quirks.c + +--- a/arch/arm/mach-davinci/Makefile ++++ b/arch/arm/mach-davinci/Makefile +@@ -21,7 +21,7 @@ obj-$(CONFIG_AINTC) += irq.o + obj-$(CONFIG_CP_INTC) += cp_intc.o + + # Board specific +-obj-$(CONFIG_MACH_DA8XX_DT) += da8xx-dt.o ++obj-$(CONFIG_MACH_DA8XX_DT) += da8xx-dt.o pdata-quirks.o + obj-$(CONFIG_MACH_DAVINCI_EVM) += board-dm644x-evm.o + obj-$(CONFIG_MACH_SFFSDR) += board-sffsdr.o + obj-$(CONFIG_MACH_NEUROS_OSD2) += board-neuros-osd2.o +--- a/arch/arm/mach-davinci/da8xx-dt.c ++++ b/arch/arm/mach-davinci/da8xx-dt.c +@@ -62,6 +62,7 @@ static void __init da850_init_machine(vo + + of_platform_default_populate(NULL, da850_auxdata_lookup, NULL); + davinci_pm_init(); ++ pdata_quirks_init(); + } + + static const char *const da850_boards_compat[] __initconst = { +--- a/arch/arm/mach-davinci/include/mach/common.h ++++ b/arch/arm/mach-davinci/include/mach/common.h +@@ -102,6 +102,8 @@ int davinci_pm_init(void); + static inline int davinci_pm_init(void) { return 0; } + #endif + ++void __init pdata_quirks_init(void); ++ + #define SRAM_SIZE SZ_128K + + #endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */ +--- /dev/null ++++ b/arch/arm/mach-davinci/pdata-quirks.c +@@ -0,0 +1,39 @@ ++/* ++ * Legacy platform_data quirks ++ * ++ * Copyright (C) 2016 BayLibre, Inc ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include ++#include ++ ++#include ++ ++struct pdata_init { ++ const char *compatible; ++ void (*fn)(void); ++}; ++ ++static void pdata_quirks_check(struct pdata_init *quirks) ++{ ++ while (quirks->compatible) { ++ if (of_machine_is_compatible(quirks->compatible)) { ++ if (quirks->fn) ++ quirks->fn(); ++ break; ++ } ++ quirks++; ++ } ++} ++ ++static struct pdata_init pdata_quirks[] __initdata = { ++ { /* sentinel */ }, ++}; ++ ++void __init pdata_quirks_init(void) ++{ ++ pdata_quirks_check(pdata_quirks); ++} diff --git a/queue-4.10/arm-kernel-add-smc-structure-parameter.patch b/queue-4.10/arm-kernel-add-smc-structure-parameter.patch new file mode 100644 index 00000000000..14753e63a73 --- /dev/null +++ b/queue-4.10/arm-kernel-add-smc-structure-parameter.patch @@ -0,0 +1,195 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:31 +0000 +Subject: arm: kernel: Add SMC structure parameter +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-79-alexander.levin@verizon.com> + +From: Andy Gross + +[ Upstream commit 680a0873e193bae666439f4b5e32c758e68f114c ] + +This patch adds a quirk parameter to the arm_smccc_(smc/hvc) calls. +The quirk structure allows for specialized SMC operations due to SoC +specific requirements. The current arm_smccc_(smc/hvc) is renamed and +macros are used instead to specify the standard arm_smccc_(smc/hvc) or +the arm_smccc_(smc/hvc)_quirk function. + +This patch and partial implementation was suggested by Will Deacon. + +Signed-off-by: Andy Gross +Reviewed-by: Will Deacon +Signed-off-by: Will Deacon +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm/kernel/armksyms.c | 4 ++-- + arch/arm/kernel/smccc-call.S | 14 ++++++++------ + arch/arm64/kernel/arm64ksyms.c | 4 ++-- + arch/arm64/kernel/asm-offsets.c | 7 +++++-- + arch/arm64/kernel/smccc-call.S | 14 ++++++++------ + include/linux/arm-smccc.h | 40 ++++++++++++++++++++++++++++++++-------- + 6 files changed, 57 insertions(+), 26 deletions(-) + +--- a/arch/arm/kernel/armksyms.c ++++ b/arch/arm/kernel/armksyms.c +@@ -178,6 +178,6 @@ EXPORT_SYMBOL(__pv_offset); + #endif + + #ifdef CONFIG_HAVE_ARM_SMCCC +-EXPORT_SYMBOL(arm_smccc_smc); +-EXPORT_SYMBOL(arm_smccc_hvc); ++EXPORT_SYMBOL(__arm_smccc_smc); ++EXPORT_SYMBOL(__arm_smccc_hvc); + #endif +--- a/arch/arm/kernel/smccc-call.S ++++ b/arch/arm/kernel/smccc-call.S +@@ -46,17 +46,19 @@ UNWIND( .fnend) + /* + * void smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2, + * unsigned long a3, unsigned long a4, unsigned long a5, +- * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) ++ * unsigned long a6, unsigned long a7, struct arm_smccc_res *res, ++ * struct arm_smccc_quirk *quirk) + */ +-ENTRY(arm_smccc_smc) ++ENTRY(__arm_smccc_smc) + SMCCC SMCCC_SMC +-ENDPROC(arm_smccc_smc) ++ENDPROC(__arm_smccc_smc) + + /* + * void smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2, + * unsigned long a3, unsigned long a4, unsigned long a5, +- * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) ++ * unsigned long a6, unsigned long a7, struct arm_smccc_res *res, ++ * struct arm_smccc_quirk *quirk) + */ +-ENTRY(arm_smccc_hvc) ++ENTRY(__arm_smccc_hvc) + SMCCC SMCCC_HVC +-ENDPROC(arm_smccc_hvc) ++ENDPROC(__arm_smccc_hvc) +--- a/arch/arm64/kernel/arm64ksyms.c ++++ b/arch/arm64/kernel/arm64ksyms.c +@@ -73,5 +73,5 @@ NOKPROBE_SYMBOL(_mcount); + #endif + + /* arm-smccc */ +-EXPORT_SYMBOL(arm_smccc_smc); +-EXPORT_SYMBOL(arm_smccc_hvc); ++EXPORT_SYMBOL(__arm_smccc_smc); ++EXPORT_SYMBOL(__arm_smccc_hvc); +--- a/arch/arm64/kernel/asm-offsets.c ++++ b/arch/arm64/kernel/asm-offsets.c +@@ -143,8 +143,11 @@ int main(void) + DEFINE(SLEEP_STACK_DATA_SYSTEM_REGS, offsetof(struct sleep_stack_data, system_regs)); + DEFINE(SLEEP_STACK_DATA_CALLEE_REGS, offsetof(struct sleep_stack_data, callee_saved_regs)); + #endif +- DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0)); +- DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2)); ++ DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0)); ++ DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2)); ++ DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id)); ++ DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state)); ++ + BLANK(); + DEFINE(HIBERN_PBE_ORIG, offsetof(struct pbe, orig_address)); + DEFINE(HIBERN_PBE_ADDR, offsetof(struct pbe, address)); +--- a/arch/arm64/kernel/smccc-call.S ++++ b/arch/arm64/kernel/smccc-call.S +@@ -27,17 +27,19 @@ + /* + * void arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2, + * unsigned long a3, unsigned long a4, unsigned long a5, +- * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) ++ * unsigned long a6, unsigned long a7, struct arm_smccc_res *res, ++ * struct arm_smccc_quirk *quirk) + */ +-ENTRY(arm_smccc_smc) ++ENTRY(__arm_smccc_smc) + SMCCC smc +-ENDPROC(arm_smccc_smc) ++ENDPROC(__arm_smccc_smc) + + /* + * void arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2, + * unsigned long a3, unsigned long a4, unsigned long a5, +- * unsigned long a6, unsigned long a7, struct arm_smccc_res *res) ++ * unsigned long a6, unsigned long a7, struct arm_smccc_res *res, ++ * struct arm_smccc_quirk *quirk) + */ +-ENTRY(arm_smccc_hvc) ++ENTRY(__arm_smccc_hvc) + SMCCC hvc +-ENDPROC(arm_smccc_hvc) ++ENDPROC(__arm_smccc_hvc) +--- a/include/linux/arm-smccc.h ++++ b/include/linux/arm-smccc.h +@@ -72,33 +72,57 @@ struct arm_smccc_res { + }; + + /** +- * arm_smccc_smc() - make SMC calls ++ * struct arm_smccc_quirk - Contains quirk information ++ * @id: quirk identification ++ * @state: quirk specific information ++ * @a6: Qualcomm quirk entry for returning post-smc call contents of a6 ++ */ ++struct arm_smccc_quirk { ++ int id; ++ union { ++ unsigned long a6; ++ } state; ++}; ++ ++/** ++ * __arm_smccc_smc() - make SMC calls + * @a0-a7: arguments passed in registers 0 to 7 + * @res: result values from registers 0 to 3 ++ * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required. + * + * This function is used to make SMC calls following SMC Calling Convention. + * The content of the supplied param are copied to registers 0 to 7 prior + * to the SMC instruction. The return values are updated with the content +- * from register 0 to 3 on return from the SMC instruction. ++ * from register 0 to 3 on return from the SMC instruction. An optional ++ * quirk structure provides vendor specific behavior. + */ +-asmlinkage void arm_smccc_smc(unsigned long a0, unsigned long a1, ++asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1, + unsigned long a2, unsigned long a3, unsigned long a4, + unsigned long a5, unsigned long a6, unsigned long a7, +- struct arm_smccc_res *res); ++ struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); + + /** +- * arm_smccc_hvc() - make HVC calls ++ * __arm_smccc_hvc() - make HVC calls + * @a0-a7: arguments passed in registers 0 to 7 + * @res: result values from registers 0 to 3 + * + * This function is used to make HVC calls following SMC Calling + * Convention. The content of the supplied param are copied to registers 0 + * to 7 prior to the HVC instruction. The return values are updated with +- * the content from register 0 to 3 on return from the HVC instruction. ++ * the content from register 0 to 3 on return from the HVC instruction. An ++ * optional quirk structure provides vendor specific behavior. + */ +-asmlinkage void arm_smccc_hvc(unsigned long a0, unsigned long a1, ++asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1, + unsigned long a2, unsigned long a3, unsigned long a4, + unsigned long a5, unsigned long a6, unsigned long a7, +- struct arm_smccc_res *res); ++ struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); ++ ++#define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL) ++ ++#define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__) ++ ++#define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL) ++ ++#define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__) + + #endif /*__LINUX_ARM_SMCCC_H*/ diff --git a/queue-4.10/arm-omap2-fix-init-for-multiple-quirks-for-the-same-soc.patch b/queue-4.10/arm-omap2-fix-init-for-multiple-quirks-for-the-same-soc.patch new file mode 100644 index 00000000000..f9befe0fb41 --- /dev/null +++ b/queue-4.10/arm-omap2-fix-init-for-multiple-quirks-for-the-same-soc.patch @@ -0,0 +1,32 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:20 +0000 +Subject: ARM: OMAP2+: Fix init for multiple quirks for the same SoC +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-51-alexander.levin@verizon.com> + +From: Tony Lindgren + +[ Upstream commit 6e613ebf4405fc09e2a8c16ed193b47f80a3cbed ] + +It's possible that there are multiple quirks that need to be initialized +for the same SoC. Fix the issue by not returning on the first match. + +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm/mach-omap2/pdata-quirks.c | 1 - + 1 file changed, 1 deletion(-) + +--- a/arch/arm/mach-omap2/pdata-quirks.c ++++ b/arch/arm/mach-omap2/pdata-quirks.c +@@ -599,7 +599,6 @@ static void pdata_quirks_check(struct pd + if (of_machine_is_compatible(quirks->compatible)) { + if (quirks->fn) + quirks->fn(); +- break; + } + quirks++; + } diff --git a/queue-4.10/arm-smccc-update-hvc-comment-to-describe-new-quirk-parameter.patch b/queue-4.10/arm-smccc-update-hvc-comment-to-describe-new-quirk-parameter.patch new file mode 100644 index 00000000000..678faf88696 --- /dev/null +++ b/queue-4.10/arm-smccc-update-hvc-comment-to-describe-new-quirk-parameter.patch @@ -0,0 +1,34 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:32 +0000 +Subject: ARM: smccc: Update HVC comment to describe new quirk parameter +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-82-alexander.levin@verizon.com> + +From: Will Deacon + +[ Upstream commit 3046ec674d441562c6bb3e4284cd866743042ef3 ] + +Commit 680a0873e193 ("arm: kernel: Add SMC structure parameter") added +a new "quirk" parameter to the SMC and HVC SMCCC backends, but only +updated the comment for the SMC version. This patch adds the new +paramater to the comment describing the HVC version too. + +Signed-off-by: Will Deacon +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + include/linux/arm-smccc.h | 1 + + 1 file changed, 1 insertion(+) + +--- a/include/linux/arm-smccc.h ++++ b/include/linux/arm-smccc.h +@@ -109,6 +109,7 @@ asmlinkage void __arm_smccc_smc(unsigned + * __arm_smccc_hvc() - make HVC calls + * @a0-a7: arguments passed in registers 0 to 7 + * @res: result values from registers 0 to 3 ++ * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required. + * + * This function is used to make HVC calls following SMC Calling + * Convention. The content of the supplied param are copied to registers 0 diff --git a/queue-4.10/asoc-codecs-rt5670-add-quirk-for-lenovo-thinkpad-10.patch b/queue-4.10/asoc-codecs-rt5670-add-quirk-for-lenovo-thinkpad-10.patch new file mode 100644 index 00000000000..3f552270d50 --- /dev/null +++ b/queue-4.10/asoc-codecs-rt5670-add-quirk-for-lenovo-thinkpad-10.patch @@ -0,0 +1,33 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:28 +0000 +Subject: ASoC: codecs: rt5670: add quirk for Lenovo Thinkpad 10 +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-71-alexander.levin@verizon.com> + +From: Pierre-Louis Bossart + +[ Upstream commit 93ffeaa8ee3f10a0628ad135b552a2497e0bef2c ] + +the BIOS incorrectly reports this codec as 5640 but it is +really a rt5670 + +Signed-off-by: Pierre-Louis Bossart +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + sound/soc/codecs/rt5670.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/sound/soc/codecs/rt5670.c ++++ b/sound/soc/codecs/rt5670.c +@@ -2814,6 +2814,7 @@ MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id); + static const struct acpi_device_id rt5670_acpi_match[] = { + { "10EC5670", 0}, + { "10EC5672", 0}, ++ { "10EC5640", 0}, /* quirk */ + { }, + }; + MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match); diff --git a/queue-4.10/asoc-intel-baytrail-add-quirk-for-lenovo-thinkpad-10.patch b/queue-4.10/asoc-intel-baytrail-add-quirk-for-lenovo-thinkpad-10.patch new file mode 100644 index 00000000000..1d9be3ad3ca --- /dev/null +++ b/queue-4.10/asoc-intel-baytrail-add-quirk-for-lenovo-thinkpad-10.patch @@ -0,0 +1,91 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:28 +0000 +Subject: ASoC: Intel: Baytrail: add quirk for Lenovo Thinkpad 10 +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-72-alexander.levin@verizon.com> + +From: Pierre-Louis Bossart + +[ Upstream commit fd0138dc5d17c636477b371d99265c406437c583 ] + +the BIOS reports this codec as RT5640 but it's a rt5670. Use the +quirk mechanism to use the cht_bsw_rt5672 machine driver + +Signed-off-by: Pierre-Louis Bossart +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + sound/soc/intel/atom/sst/sst_acpi.c | 37 +++++++++++++++++++++++++++++++++++- + 1 file changed, 36 insertions(+), 1 deletion(-) + +--- a/sound/soc/intel/atom/sst/sst_acpi.c ++++ b/sound/soc/intel/atom/sst/sst_acpi.c +@@ -400,6 +400,7 @@ static int sst_acpi_remove(struct platfo + static unsigned long cht_machine_id; + + #define CHT_SURFACE_MACH 1 ++#define BYT_THINKPAD_10 2 + + static int cht_surface_quirk_cb(const struct dmi_system_id *id) + { +@@ -407,6 +408,23 @@ static int cht_surface_quirk_cb(const st + return 1; + } + ++static int byt_thinkpad10_quirk_cb(const struct dmi_system_id *id) ++{ ++ cht_machine_id = BYT_THINKPAD_10; ++ return 1; ++} ++ ++ ++static const struct dmi_system_id byt_table[] = { ++ { ++ .callback = byt_thinkpad10_quirk_cb, ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "20C3001VHH"), ++ }, ++ }, ++ { } ++}; + + static const struct dmi_system_id cht_table[] = { + { +@@ -424,6 +442,10 @@ static struct sst_acpi_mach cht_surface_ + "10EC5640", "cht-bsw-rt5645", "intel/fw_sst_22a8.bin", "cht-bsw", NULL, + &chv_platform_data }; + ++static struct sst_acpi_mach byt_thinkpad_10 = { ++ "10EC5640", "cht-bsw-rt5672", "intel/fw_sst_0f28.bin", "cht-bsw", NULL, ++ &byt_rvp_platform_data }; ++ + static struct sst_acpi_mach *cht_quirk(void *arg) + { + struct sst_acpi_mach *mach = arg; +@@ -436,8 +458,21 @@ static struct sst_acpi_mach *cht_quirk(v + return mach; + } + ++static struct sst_acpi_mach *byt_quirk(void *arg) ++{ ++ struct sst_acpi_mach *mach = arg; ++ ++ dmi_check_system(byt_table); ++ ++ if (cht_machine_id == BYT_THINKPAD_10) ++ return &byt_thinkpad_10; ++ else ++ return mach; ++} ++ ++ + static struct sst_acpi_mach sst_acpi_bytcr[] = { +- {"10EC5640", "bytcr_rt5640", "intel/fw_sst_0f28.bin", "bytcr_rt5640", NULL, ++ {"10EC5640", "bytcr_rt5640", "intel/fw_sst_0f28.bin", "bytcr_rt5640", byt_quirk, + &byt_rvp_platform_data }, + {"10EC5642", "bytcr_rt5640", "intel/fw_sst_0f28.bin", "bytcr_rt5640", NULL, + &byt_rvp_platform_data }, diff --git a/queue-4.10/asoc-intel-bytcr_rt5640-quirks-for-insyde-devices.patch b/queue-4.10/asoc-intel-bytcr_rt5640-quirks-for-insyde-devices.patch new file mode 100644 index 00000000000..424715f1d95 --- /dev/null +++ b/queue-4.10/asoc-intel-bytcr_rt5640-quirks-for-insyde-devices.patch @@ -0,0 +1,45 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:19 +0000 +Subject: ASoC: Intel: bytcr_rt5640: quirks for Insyde devices +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-48-alexander.levin@verizon.com> + +From: youling257 + +[ Upstream commit 571800487837263e914ef68681e4ad6a57d49c7f ] + +There are literally dozens of Insyde devices with a different +name but with the same audio routing. Use a generic quirk to +match on vendor name only to avoid recurring edits of the +same thing. + +Signed-off-by: youling257 +Signed-off-by: Pierre-Louis Bossart +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + sound/soc/intel/boards/bytcr_rt5640.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/sound/soc/intel/boards/bytcr_rt5640.c ++++ b/sound/soc/intel/boards/bytcr_rt5640.c +@@ -387,6 +387,16 @@ static const struct dmi_system_id byt_rt + BYT_RT5640_SSP0_AIF1), + + }, ++ { ++ .callback = byt_rt5640_quirk_cb, ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "Insyde"), ++ }, ++ .driver_data = (unsigned long *)(BYT_RT5640_IN3_MAP | ++ BYT_RT5640_MCLK_EN | ++ BYT_RT5640_SSP0_AIF1), ++ ++ }, + {} + }; + diff --git a/queue-4.10/asoc-intel-cht_bsw_rt5645-add-baytrail-mclk-support.patch b/queue-4.10/asoc-intel-cht_bsw_rt5645-add-baytrail-mclk-support.patch new file mode 100644 index 00000000000..edcf4736580 --- /dev/null +++ b/queue-4.10/asoc-intel-cht_bsw_rt5645-add-baytrail-mclk-support.patch @@ -0,0 +1,173 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:29 +0000 +Subject: ASoC: Intel: cht_bsw_rt5645: add Baytrail MCLK support +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-74-alexander.levin@verizon.com> + +From: Pierre-Louis Bossart + +[ Upstream commit a50477e55fff69e1028f25624ee9fc9182d59b1f ] + +The existing code assumes a 19.2 MHz MCLK as the default +hardware configuration. This is valid for CherryTrail but +not for Baytrail. + +Add explicit MCLK configuration to set the 19.2 clock on/off +depending on DAPM events. + +This is a prerequisite step to enable devices with Baytrail +and RT5645 such as Asus X205TA + +Signed-off-by: Pierre-Louis Bossart +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + sound/soc/intel/boards/cht_bsw_rt5645.c | 84 +++++++++++++++++++++++++++----- + 1 file changed, 71 insertions(+), 13 deletions(-) + +--- a/sound/soc/intel/boards/cht_bsw_rt5645.c ++++ b/sound/soc/intel/boards/cht_bsw_rt5645.c +@@ -24,6 +24,9 @@ + #include + #include + #include ++#include ++#include ++#include + #include + #include + #include +@@ -45,6 +48,7 @@ struct cht_mc_private { + struct snd_soc_jack jack; + struct cht_acpi_card *acpi_card; + char codec_name[16]; ++ struct clk *mclk; + }; + + static inline struct snd_soc_dai *cht_get_codec_dai(struct snd_soc_card *card) +@@ -65,6 +69,7 @@ static int platform_clock_control(struct + struct snd_soc_dapm_context *dapm = w->dapm; + struct snd_soc_card *card = dapm->card; + struct snd_soc_dai *codec_dai; ++ struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card); + int ret; + + codec_dai = cht_get_codec_dai(card); +@@ -73,19 +78,30 @@ static int platform_clock_control(struct + return -EIO; + } + +- if (!SND_SOC_DAPM_EVENT_OFF(event)) +- return 0; ++ if (SND_SOC_DAPM_EVENT_ON(event)) { ++ if (ctx->mclk) { ++ ret = clk_prepare_enable(ctx->mclk); ++ if (ret < 0) { ++ dev_err(card->dev, ++ "could not configure MCLK state"); ++ return ret; ++ } ++ } ++ } else { ++ /* Set codec sysclk source to its internal clock because codec PLL will ++ * be off when idle and MCLK will also be off when codec is ++ * runtime suspended. Codec needs clock for jack detection and button ++ * press. MCLK is turned off with clock framework or ACPI. ++ */ ++ ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_RCCLK, ++ 48000 * 512, SND_SOC_CLOCK_IN); ++ if (ret < 0) { ++ dev_err(card->dev, "can't set codec sysclk: %d\n", ret); ++ return ret; ++ } + +- /* Set codec sysclk source to its internal clock because codec PLL will +- * be off when idle and MCLK will also be off by ACPI when codec is +- * runtime suspended. Codec needs clock for jack detection and button +- * press. +- */ +- ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_RCCLK, +- 0, SND_SOC_CLOCK_IN); +- if (ret < 0) { +- dev_err(card->dev, "can't set codec sysclk: %d\n", ret); +- return ret; ++ if (ctx->mclk) ++ clk_disable_unprepare(ctx->mclk); + } + + return 0; +@@ -97,7 +113,7 @@ static const struct snd_soc_dapm_widget + SND_SOC_DAPM_MIC("Int Mic", NULL), + SND_SOC_DAPM_SPK("Ext Spk", NULL), + SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0, +- platform_clock_control, SND_SOC_DAPM_POST_PMD), ++ platform_clock_control, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), + }; + + static const struct snd_soc_dapm_route cht_rt5645_audio_map[] = { +@@ -225,6 +241,26 @@ static int cht_codec_init(struct snd_soc + + rt5645_set_jack_detect(codec, &ctx->jack, &ctx->jack, &ctx->jack); + ++ if (ctx->mclk) { ++ /* ++ * The firmware might enable the clock at ++ * boot (this information may or may not ++ * be reflected in the enable clock register). ++ * To change the rate we must disable the clock ++ * first to cover these cases. Due to common ++ * clock framework restrictions that do not allow ++ * to disable a clock that has not been enabled, ++ * we need to enable the clock first. ++ */ ++ ret = clk_prepare_enable(ctx->mclk); ++ if (!ret) ++ clk_disable_unprepare(ctx->mclk); ++ ++ ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ); ++ ++ if (ret) ++ dev_err(runtime->dev, "unable to set MCLK rate\n"); ++ } + return ret; + } + +@@ -349,6 +385,18 @@ static struct cht_acpi_card snd_soc_card + + static char cht_rt5640_codec_name[16]; /* i2c-:00 with HID being 8 chars */ + ++static bool is_valleyview(void) ++{ ++ static const struct x86_cpu_id cpu_ids[] = { ++ { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */ ++ {} ++ }; ++ ++ if (!x86_match_cpu(cpu_ids)) ++ return false; ++ return true; ++} ++ + static int snd_cht_mc_probe(struct platform_device *pdev) + { + int ret_val = 0; +@@ -401,6 +449,16 @@ static int snd_cht_mc_probe(struct platf + cht_dailink[dai_index].codec_name = cht_rt5640_codec_name; + } + ++ if (is_valleyview()) { ++ drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3"); ++ if (IS_ERR(drv->mclk)) { ++ dev_err(&pdev->dev, ++ "Failed to get MCLK from pmc_plt_clk_3: %ld\n", ++ PTR_ERR(drv->mclk)); ++ return PTR_ERR(drv->mclk); ++ } ++ } ++ + snd_soc_card_set_drvdata(card, drv); + ret_val = devm_snd_soc_register_card(&pdev->dev, card); + if (ret_val) { diff --git a/queue-4.10/asoc-intel-cht_bsw_rt5645-harden-acpi-device-detection.patch b/queue-4.10/asoc-intel-cht_bsw_rt5645-harden-acpi-device-detection.patch new file mode 100644 index 00000000000..80f6df67f5c --- /dev/null +++ b/queue-4.10/asoc-intel-cht_bsw_rt5645-harden-acpi-device-detection.patch @@ -0,0 +1,62 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:29 +0000 +Subject: ASoC: Intel: cht_bsw_rt5645: harden ACPI device detection +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-73-alexander.levin@verizon.com> + +From: Pierre-Louis Bossart + +[ Upstream commit 42648c2270ca0c96935dfc5d0f5c4f8d2406cf75 ] + +Fix classic issue of having multiple codecs listed in DSDT +but a single one actually enabled. The previous code did +not handle such errors and could also lead to uninitalized +configurations + +Signed-off-by: Pierre-Louis Bossart +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + sound/soc/intel/boards/cht_bsw_rt5645.c | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +--- a/sound/soc/intel/boards/cht_bsw_rt5645.c ++++ b/sound/soc/intel/boards/cht_bsw_rt5645.c +@@ -358,22 +358,32 @@ static int snd_cht_mc_probe(struct platf + struct sst_acpi_mach *mach; + const char *i2c_name = NULL; + int dai_index = 0; ++ bool found = false; + + drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_ATOMIC); + if (!drv) + return -ENOMEM; + ++ mach = (&pdev->dev)->platform_data; ++ + for (i = 0; i < ARRAY_SIZE(snd_soc_cards); i++) { +- if (acpi_dev_found(snd_soc_cards[i].codec_id)) { ++ if (acpi_dev_found(snd_soc_cards[i].codec_id) && ++ (!strncmp(snd_soc_cards[i].codec_id, mach->id, 8))) { + dev_dbg(&pdev->dev, + "found codec %s\n", snd_soc_cards[i].codec_id); + card = snd_soc_cards[i].soc_card; + drv->acpi_card = &snd_soc_cards[i]; ++ found = true; + break; + } + } ++ ++ if (!found) { ++ dev_err(&pdev->dev, "No matching HID found in supported list\n"); ++ return -ENODEV; ++ } ++ + card->dev = &pdev->dev; +- mach = card->dev->platform_data; + sprintf(drv->codec_name, "i2c-%s:00", drv->acpi_card->codec_id); + + /* set correct codec name */ diff --git a/queue-4.10/asoc-sun4i-i2s-add-quirks-to-handle-a31-compatible.patch b/queue-4.10/asoc-sun4i-i2s-add-quirks-to-handle-a31-compatible.patch new file mode 100644 index 00000000000..5e14e29893e --- /dev/null +++ b/queue-4.10/asoc-sun4i-i2s-add-quirks-to-handle-a31-compatible.patch @@ -0,0 +1,151 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:30 +0000 +Subject: ASoC: sun4i-i2s: Add quirks to handle a31 compatible +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-77-alexander.levin@verizon.com> + +From: Mylène Josserand + +[ Upstream commit 2ad6f30de7087515a0bc2a718fca6681a57739a0 ] + +Some SoCs have a reset line that must be asserted/deasserted. +This patch adds a quirk to handle the new compatible +"allwinner,sun6i-a31-i2s" which will deassert the reset +line on probe function and assert it on remove's one. + +This new compatible is useful in case of A33 codec driver, for example. + +Signed-off-by: Mylène Josserand +Acked-by: Maxime Ripard +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + sound/soc/sunxi/sun4i-i2s.c | 57 ++++++++++++++++++++++++++++++++++++++++++-- + 1 file changed, 55 insertions(+), 2 deletions(-) + +--- a/sound/soc/sunxi/sun4i-i2s.c ++++ b/sound/soc/sunxi/sun4i-i2s.c +@@ -14,9 +14,11 @@ + #include + #include + #include ++#include + #include + #include + #include ++#include + + #include + #include +@@ -92,6 +94,7 @@ struct sun4i_i2s { + struct clk *bus_clk; + struct clk *mod_clk; + struct regmap *regmap; ++ struct reset_control *rst; + + unsigned int mclk_freq; + +@@ -651,9 +654,22 @@ static int sun4i_i2s_runtime_suspend(str + return 0; + } + ++struct sun4i_i2s_quirks { ++ bool has_reset; ++}; ++ ++static const struct sun4i_i2s_quirks sun4i_a10_i2s_quirks = { ++ .has_reset = false, ++}; ++ ++static const struct sun4i_i2s_quirks sun6i_a31_i2s_quirks = { ++ .has_reset = true, ++}; ++ + static int sun4i_i2s_probe(struct platform_device *pdev) + { + struct sun4i_i2s *i2s; ++ const struct sun4i_i2s_quirks *quirks; + struct resource *res; + void __iomem *regs; + int irq, ret; +@@ -674,6 +690,12 @@ static int sun4i_i2s_probe(struct platfo + return irq; + } + ++ quirks = of_device_get_match_data(&pdev->dev); ++ if (!quirks) { ++ dev_err(&pdev->dev, "Failed to determine the quirks to use\n"); ++ return -ENODEV; ++ } ++ + i2s->bus_clk = devm_clk_get(&pdev->dev, "apb"); + if (IS_ERR(i2s->bus_clk)) { + dev_err(&pdev->dev, "Can't get our bus clock\n"); +@@ -692,7 +714,24 @@ static int sun4i_i2s_probe(struct platfo + dev_err(&pdev->dev, "Can't get our mod clock\n"); + return PTR_ERR(i2s->mod_clk); + } +- ++ ++ if (quirks->has_reset) { ++ i2s->rst = devm_reset_control_get(&pdev->dev, NULL); ++ if (IS_ERR(i2s->rst)) { ++ dev_err(&pdev->dev, "Failed to get reset control\n"); ++ return PTR_ERR(i2s->rst); ++ } ++ } ++ ++ if (!IS_ERR(i2s->rst)) { ++ ret = reset_control_deassert(i2s->rst); ++ if (ret) { ++ dev_err(&pdev->dev, ++ "Failed to deassert the reset control\n"); ++ return -EINVAL; ++ } ++ } ++ + i2s->playback_dma_data.addr = res->start + SUN4I_I2S_FIFO_TX_REG; + i2s->playback_dma_data.maxburst = 4; + +@@ -727,23 +766,37 @@ err_suspend: + sun4i_i2s_runtime_suspend(&pdev->dev); + err_pm_disable: + pm_runtime_disable(&pdev->dev); ++ if (!IS_ERR(i2s->rst)) ++ reset_control_assert(i2s->rst); + + return ret; + } + + static int sun4i_i2s_remove(struct platform_device *pdev) + { ++ struct sun4i_i2s *i2s = dev_get_drvdata(&pdev->dev); ++ + snd_dmaengine_pcm_unregister(&pdev->dev); + + pm_runtime_disable(&pdev->dev); + if (!pm_runtime_status_suspended(&pdev->dev)) + sun4i_i2s_runtime_suspend(&pdev->dev); + ++ if (!IS_ERR(i2s->rst)) ++ reset_control_assert(i2s->rst); ++ + return 0; + } + + static const struct of_device_id sun4i_i2s_match[] = { +- { .compatible = "allwinner,sun4i-a10-i2s", }, ++ { ++ .compatible = "allwinner,sun4i-a10-i2s", ++ .data = &sun4i_a10_i2s_quirks, ++ }, ++ { ++ .compatible = "allwinner,sun6i-a31-i2s", ++ .data = &sun6i_a31_i2s_quirks, ++ }, + {} + }; + MODULE_DEVICE_TABLE(of, sun4i_i2s_match); diff --git a/queue-4.10/can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch b/queue-4.10/can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch new file mode 100644 index 00000000000..2cca2489484 --- /dev/null +++ b/queue-4.10/can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch @@ -0,0 +1,66 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:39 +0000 +Subject: can: flexcan: add quirk FLEXCAN_QUIRK_ENABLE_EACEN_RRS +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-99-alexander.levin@verizon.com> + +From: Marc Kleine-Budde + +[ Upstream commit 9eb7aa891101a4a09114ff3191f9877ea35eae06 ] + +In order to receive RTR frames in the non HW FIFO mode the RSS and EACEN bits +of the reg_ctrl2 have to be activated. As this has no side effect in the FIFO +mode, we do this unconditionally on cores with the reg_ctrl2. + +Signed-off-by: Marc Kleine-Budde +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/can/flexcan.c | 18 +++++++++++++----- + 1 file changed, 13 insertions(+), 5 deletions(-) + +--- a/drivers/net/can/flexcan.c ++++ b/drivers/net/can/flexcan.c +@@ -189,7 +189,8 @@ + */ + #define FLEXCAN_QUIRK_BROKEN_ERR_STATE BIT(1) /* [TR]WRN_INT not connected */ + #define FLEXCAN_QUIRK_DISABLE_RXFG BIT(2) /* Disable RX FIFO Global mask */ +-#define FLEXCAN_QUIRK_DISABLE_MECR BIT(3) /* Disble Memory error detection */ ++#define FLEXCAN_QUIRK_ENABLE_EACEN_RRS BIT(3) /* Enable EACEN and RRS bit in ctrl2 */ ++#define FLEXCAN_QUIRK_DISABLE_MECR BIT(4) /* Disble Memory error detection */ + + /* Structure of the message buffer */ + struct flexcan_mb { +@@ -268,12 +269,13 @@ static struct flexcan_devtype_data fsl_p + + static struct flexcan_devtype_data fsl_imx28_devtype_data; + +-static struct flexcan_devtype_data fsl_imx6q_devtype_data = { +- .quirks = FLEXCAN_QUIRK_DISABLE_RXFG, ++static const struct flexcan_devtype_data fsl_imx6q_devtype_data = { ++ .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS, + }; + +-static struct flexcan_devtype_data fsl_vf610_devtype_data = { +- .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_DISABLE_MECR, ++static const struct flexcan_devtype_data fsl_vf610_devtype_data = { ++ .quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS | ++ FLEXCAN_QUIRK_DISABLE_MECR, + }; + + static const struct can_bittiming_const flexcan_bittiming_const = { +@@ -883,6 +885,12 @@ static int flexcan_chip_start(struct net + netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl); + flexcan_write(reg_ctrl, ®s->ctrl); + ++ if ((priv->devtype_data->quirks & FLEXCAN_QUIRK_ENABLE_EACEN_RRS)) { ++ reg_ctrl2 = flexcan_read(®s->ctrl2); ++ reg_ctrl2 |= FLEXCAN_CTRL2_EACEN | FLEXCAN_CTRL2_RRS; ++ flexcan_write(reg_ctrl2, ®s->ctrl2); ++ } ++ + /* clear and invalidate all mailboxes first */ + for (i = FLEXCAN_TX_BUF_ID; i < ARRAY_SIZE(regs->mb); i++) { + flexcan_write(FLEXCAN_MB_CODE_RX_INACTIVE, diff --git a/queue-4.10/drm-edid-constify-edid-quirk-list.patch b/queue-4.10/drm-edid-constify-edid-quirk-list.patch new file mode 100644 index 00000000000..79f5400d1fc --- /dev/null +++ b/queue-4.10/drm-edid-constify-edid-quirk-list.patch @@ -0,0 +1,52 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:18 +0000 +Subject: drm/edid: constify edid quirk list +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-44-alexander.levin@verizon.com> + +From: Jani Nikula + +[ Upstream commit 23c4cfbdab494568600ae6073a2bf02be4b10f4e ] + +No reason not to be const. + +Reviewed-by: Daniel Vetter +Signed-off-by: Jani Nikula +Link: http://patchwork.freedesktop.org/patch/msgid/1482923186-22430-1-git-send-email-jani.nikula@intel.com +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/drm_edid.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/drm_edid.c ++++ b/drivers/gpu/drm/drm_edid.c +@@ -90,7 +90,7 @@ struct detailed_mode_closure { + #define LEVEL_GTF2 2 + #define LEVEL_CVT 3 + +-static struct edid_quirk { ++static const struct edid_quirk { + char vendor[4]; + int product_id; + u32 quirks; +@@ -1480,7 +1480,7 @@ EXPORT_SYMBOL(drm_edid_duplicate); + * + * Returns true if @vendor is in @edid, false otherwise + */ +-static bool edid_vendor(struct edid *edid, char *vendor) ++static bool edid_vendor(struct edid *edid, const char *vendor) + { + char edid_vendor[3]; + +@@ -1500,7 +1500,7 @@ static bool edid_vendor(struct edid *edi + */ + static u32 edid_get_quirks(struct edid *edid) + { +- struct edid_quirk *quirk; ++ const struct edid_quirk *quirk; + int i; + + for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { diff --git a/queue-4.10/drm-i915-actually-drive-the-bdw-reserved-ids.patch b/queue-4.10/drm-i915-actually-drive-the-bdw-reserved-ids.patch new file mode 100644 index 00000000000..c3c7f77d120 --- /dev/null +++ b/queue-4.10/drm-i915-actually-drive-the-bdw-reserved-ids.patch @@ -0,0 +1,61 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:19 +0000 +Subject: drm/i915: actually drive the BDW reserved IDs +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-47-alexander.levin@verizon.com> + +From: Paulo Zanoni + +[ Upstream commit 98b2f01c8dfc8922a2af1fe82a1c40cac4911634 ] + +Back in 2014, commit fb7023e0e248 ("drm/i915: BDW: Adding Reserved PCI +IDs.") added the reserved PCI IDs in order to try to make sure we had +working drivers in case we ever released products using these IDs +(since we had instances of this type of problem in the past). The +problem is that the patch only touched the macros used by +early-quirks.c and by the user space components that rely on +i915_pciids.h, it didn't touch the macros used by i915_pci.c. So we +correctly handled the stolen memory for these theoretical IDs, but we +didn't actually drive the devices from i915.ko. + +So this patch fixes the original commit by actually making i915.ko +drive these IDs, which was the goal. There's no information on what +would be the GT count on these IDs, so we just go with the safer +intel_broadwell_info, at the risk of ignoring a possibly inexistent +BSD2_RING. + +I did some checking, and it seems that these IDs are driven by +intel-gpu-tools, xf86-video-intel and libdrm (since they contain old +copies of i915_pciids.h), but they are not checked by mesa. + +The alternative to this patch would be to just assume we're actually +never going to use these IDs, and then remove them from our ID lists +and make sure our user space components sync the latest i915_pciids.h +copy. I'm fine with either approaches, as long as we make sure that +every component tries to drive the same list of PCI IDs. + +Fixes: fb7023e0e248 ("drm/i915: BDW: Adding Reserved PCI IDs.") +Cc: Rodrigo Vivi +Cc: Ben Widawsky +Cc: Jani Nikula +Signed-off-by: Paulo Zanoni +Reviewed-by: Rodrigo Vivi +Link: http://patchwork.freedesktop.org/patch/msgid/1483473860-17644-3-git-send-email-paulo.r.zanoni@intel.com +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/i915/i915_pci.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/gpu/drm/i915/i915_pci.c ++++ b/drivers/gpu/drm/i915/i915_pci.c +@@ -421,6 +421,7 @@ static const struct pci_device_id pciidl + INTEL_VLV_IDS(&intel_valleyview_info), + INTEL_BDW_GT12_IDS(&intel_broadwell_info), + INTEL_BDW_GT3_IDS(&intel_broadwell_gt3_info), ++ INTEL_BDW_RSVD_IDS(&intel_broadwell_info), + INTEL_CHV_IDS(&intel_cherryview_info), + INTEL_SKL_GT1_IDS(&intel_skylake_info), + INTEL_SKL_GT2_IDS(&intel_skylake_info), diff --git a/queue-4.10/drm-i915-fix-intel_bdw_ids-definition.patch b/queue-4.10/drm-i915-fix-intel_bdw_ids-definition.patch new file mode 100644 index 00000000000..80b0c047b35 --- /dev/null +++ b/queue-4.10/drm-i915-fix-intel_bdw_ids-definition.patch @@ -0,0 +1,39 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:18 +0000 +Subject: drm/i915: fix INTEL_BDW_IDS definition +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-45-alexander.levin@verizon.com> + +From: Paulo Zanoni + +[ Upstream commit 7fbd995ce4241e98d30859405504c3fb279c4ccb ] + +Remove duplicated IDs from the list. Currently, this definition is +only used by early-quirks.c. From my understanding of the code, having +duplicated IDs shouldn't be causing any bugs. + +Fixes: 8d9c20e1d1e3 ("drm/i915: Remove .is_mobile field from platform struct") +Cc: Carlos Santa +Cc: Rodrigo Vivi +Signed-off-by: Paulo Zanoni +Reviewed-by: Rodrigo Vivi +Link: http://patchwork.freedesktop.org/patch/msgid/1483473860-17644-1-git-send-email-paulo.r.zanoni@intel.com +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + include/drm/i915_pciids.h | 2 -- + 1 file changed, 2 deletions(-) + +--- a/include/drm/i915_pciids.h ++++ b/include/drm/i915_pciids.h +@@ -240,8 +240,6 @@ + INTEL_BDW_GT12_IDS(info), \ + INTEL_BDW_GT3_IDS(info), \ + INTEL_BDW_RSVDM_IDS(info), \ +- INTEL_BDW_GT12_IDS(info), \ +- INTEL_BDW_GT3_IDS(info), \ + INTEL_BDW_RSVDD_IDS(info) + + #define INTEL_CHV_IDS(info) \ diff --git a/queue-4.10/drm-i915-more-.is_mobile-cleanups-for-bdw.patch b/queue-4.10/drm-i915-more-.is_mobile-cleanups-for-bdw.patch new file mode 100644 index 00000000000..59d3f7bc63e --- /dev/null +++ b/queue-4.10/drm-i915-more-.is_mobile-cleanups-for-bdw.patch @@ -0,0 +1,57 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:19 +0000 +Subject: drm/i915: more .is_mobile cleanups for BDW +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-46-alexander.levin@verizon.com> + +From: Paulo Zanoni + +[ Upstream commit 0784bc624ae9be4269f8129572ee164ca680ca7c ] + +Commit 8d9c20e1d1e3 ("drm/i915: Remove .is_mobile field from platform +struct") removed mobile vs desktop differences for HSW+, but forgot +the Broadwell reserved IDs, so do it now. + +It's interesting to notice that these IDs are used by early-quirks.c +but are *not* used by i915_pci.c. + +Cc: Carlos Santa +Cc: Rodrigo Vivi +Signed-off-by: Paulo Zanoni +Reviewed-by: Rodrigo Vivi +Link: http://patchwork.freedesktop.org/patch/msgid/1483473860-17644-2-git-send-email-paulo.r.zanoni@intel.com +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + include/drm/i915_pciids.h | 9 +++------ + 1 file changed, 3 insertions(+), 6 deletions(-) + +--- a/include/drm/i915_pciids.h ++++ b/include/drm/i915_pciids.h +@@ -226,21 +226,18 @@ + INTEL_VGA_DEVICE(0x162A, info), /* Server */ \ + INTEL_VGA_DEVICE(0x162D, info) /* Workstation */ + +-#define INTEL_BDW_RSVDM_IDS(info) \ ++#define INTEL_BDW_RSVD_IDS(info) \ + INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \ + INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \ + INTEL_VGA_DEVICE(0x163B, info), /* Iris */ \ +- INTEL_VGA_DEVICE(0x163E, info) /* ULX */ +- +-#define INTEL_BDW_RSVDD_IDS(info) \ ++ INTEL_VGA_DEVICE(0x163E, info), /* ULX */ \ + INTEL_VGA_DEVICE(0x163A, info), /* Server */ \ + INTEL_VGA_DEVICE(0x163D, info) /* Workstation */ + + #define INTEL_BDW_IDS(info) \ + INTEL_BDW_GT12_IDS(info), \ + INTEL_BDW_GT3_IDS(info), \ +- INTEL_BDW_RSVDM_IDS(info), \ +- INTEL_BDW_RSVDD_IDS(info) ++ INTEL_BDW_RSVD_IDS(info) + + #define INTEL_CHV_IDS(info) \ + INTEL_VGA_DEVICE(0x22b0, info), \ diff --git a/queue-4.10/drm-mga-remove-device_is_agp-callback.patch b/queue-4.10/drm-mga-remove-device_is_agp-callback.patch new file mode 100644 index 00000000000..d54090f40d6 --- /dev/null +++ b/queue-4.10/drm-mga-remove-device_is_agp-callback.patch @@ -0,0 +1,118 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:25 +0000 +Subject: drm/mga: remove device_is_agp callback +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-63-alexander.levin@verizon.com> + +From: Daniel Vetter + +[ Upstream commit 858b2c1bf820ebfba89c5e2867ab882bdb5b2f5a ] + +It's only for a device quirk, and we might as well do that in the load +callback. + +Acked-by: Alex Deucher +Signed-off-by: Daniel Vetter +Link: http://patchwork.freedesktop.org/patch/msgid/20170125062657.19270-10-daniel.vetter@ffwll.ch +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/mga/mga_dma.c | 20 +++++++++++++++++++- + drivers/gpu/drm/mga/mga_drv.c | 37 ------------------------------------- + 2 files changed, 19 insertions(+), 38 deletions(-) + +--- a/drivers/gpu/drm/mga/mga_dma.c ++++ b/drivers/gpu/drm/mga/mga_dma.c +@@ -392,6 +392,24 @@ int mga_driver_load(struct drm_device *d + drm_mga_private_t *dev_priv; + int ret; + ++ /* There are PCI versions of the G450. These cards have the ++ * same PCI ID as the AGP G450, but have an additional PCI-to-PCI ++ * bridge chip. We detect these cards, which are not currently ++ * supported by this driver, by looking at the device ID of the ++ * bus the "card" is on. If vendor is 0x3388 (Hint Corp) and the ++ * device is 0x0021 (HB6 Universal PCI-PCI bridge), we reject the ++ * device. ++ */ ++ if ((dev->pdev->device == 0x0525) && dev->pdev->bus->self ++ && (dev->pdev->bus->self->vendor == 0x3388) ++ && (dev->pdev->bus->self->device == 0x0021) ++ && dev->agp) { ++ /* FIXME: This should be quirked in the pci core, but oh well ++ * the hw probably stopped existing. */ ++ arch_phys_wc_del(dev->agp->agp_mtrr); ++ kfree(dev->agp); ++ dev->agp = NULL; ++ } + dev_priv = kzalloc(sizeof(drm_mga_private_t), GFP_KERNEL); + if (!dev_priv) + return -ENOMEM; +@@ -698,7 +716,7 @@ static int mga_do_pci_dma_bootstrap(stru + static int mga_do_dma_bootstrap(struct drm_device *dev, + drm_mga_dma_bootstrap_t *dma_bs) + { +- const int is_agp = (dma_bs->agp_mode != 0) && drm_pci_device_is_agp(dev); ++ const int is_agp = (dma_bs->agp_mode != 0) && dev->agp; + int err; + drm_mga_private_t *const dev_priv = + (drm_mga_private_t *) dev->dev_private; +--- a/drivers/gpu/drm/mga/mga_drv.c ++++ b/drivers/gpu/drm/mga/mga_drv.c +@@ -37,8 +37,6 @@ + + #include + +-static int mga_driver_device_is_agp(struct drm_device *dev); +- + static struct pci_device_id pciidlist[] = { + mga_PCI_IDS + }; +@@ -66,7 +64,6 @@ static struct drm_driver driver = { + .lastclose = mga_driver_lastclose, + .set_busid = drm_pci_set_busid, + .dma_quiescent = mga_driver_dma_quiescent, +- .device_is_agp = mga_driver_device_is_agp, + .get_vblank_counter = mga_get_vblank_counter, + .enable_vblank = mga_enable_vblank, + .disable_vblank = mga_disable_vblank, +@@ -107,37 +104,3 @@ module_exit(mga_exit); + MODULE_AUTHOR(DRIVER_AUTHOR); + MODULE_DESCRIPTION(DRIVER_DESC); + MODULE_LICENSE("GPL and additional rights"); +- +-/** +- * Determine if the device really is AGP or not. +- * +- * In addition to the usual tests performed by \c drm_device_is_agp, this +- * function detects PCI G450 cards that appear to the system exactly like +- * AGP G450 cards. +- * +- * \param dev The device to be tested. +- * +- * \returns +- * If the device is a PCI G450, zero is returned. Otherwise 2 is returned. +- */ +-static int mga_driver_device_is_agp(struct drm_device *dev) +-{ +- const struct pci_dev *const pdev = dev->pdev; +- +- /* There are PCI versions of the G450. These cards have the +- * same PCI ID as the AGP G450, but have an additional PCI-to-PCI +- * bridge chip. We detect these cards, which are not currently +- * supported by this driver, by looking at the device ID of the +- * bus the "card" is on. If vendor is 0x3388 (Hint Corp) and the +- * device is 0x0021 (HB6 Universal PCI-PCI bridge), we reject the +- * device. +- */ +- +- if ((pdev->device == 0x0525) && pdev->bus->self +- && (pdev->bus->self->vendor == 0x3388) +- && (pdev->bus->self->device == 0x0021)) { +- return 0; +- } +- +- return 2; +-} diff --git a/queue-4.10/firmware-qcom-scm-fix-interrupted-scm-calls.patch b/queue-4.10/firmware-qcom-scm-fix-interrupted-scm-calls.patch new file mode 100644 index 00000000000..14f39e57a55 --- /dev/null +++ b/queue-4.10/firmware-qcom-scm-fix-interrupted-scm-calls.patch @@ -0,0 +1,122 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:32 +0000 +Subject: firmware: qcom: scm: Fix interrupted SCM calls +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-80-alexander.levin@verizon.com> + +From: Andy Gross + +[ Upstream commit 82bcd087029f6056506ea929f11af02622230901 ] + +This patch adds a Qualcomm specific quirk to the arm_smccc_smc call. + +On Qualcomm ARM64 platforms, the SMC call can return before it has +completed. If this occurs, the call can be restarted, but it requires +using the returned session ID value from the interrupted SMC call. + +The quirk stores off the session ID from the interrupted call in the +quirk structure so that it can be used by the caller. + +This patch folds in a fix given by Sricharan R: +https://lkml.org/lkml/2016/9/28/272 + +Signed-off-by: Andy Gross +Reviewed-by: Will Deacon +Signed-off-by: Will Deacon +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/kernel/smccc-call.S | 9 ++++++++- + drivers/firmware/qcom_scm-64.c | 13 ++++++++++--- + include/linux/arm-smccc.h | 11 ++++++++--- + 3 files changed, 26 insertions(+), 7 deletions(-) + +--- a/arch/arm64/kernel/smccc-call.S ++++ b/arch/arm64/kernel/smccc-call.S +@@ -12,6 +12,7 @@ + * + */ + #include ++#include + #include + + .macro SMCCC instr +@@ -20,7 +21,13 @@ + ldr x4, [sp] + stp x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS] + stp x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS] +- ret ++ ldr x4, [sp, #8] ++ cbz x4, 1f /* no quirk structure */ ++ ldr x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS] ++ cmp x9, #ARM_SMCCC_QUIRK_QCOM_A6 ++ b.ne 1f ++ str x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS] ++1: ret + .cfi_endproc + .endm + +--- a/drivers/firmware/qcom_scm-64.c ++++ b/drivers/firmware/qcom_scm-64.c +@@ -91,6 +91,7 @@ static int qcom_scm_call(struct device * + dma_addr_t args_phys = 0; + void *args_virt = NULL; + size_t alloc_len; ++ struct arm_smccc_quirk quirk = {.id = ARM_SMCCC_QUIRK_QCOM_A6}; + + if (unlikely(arglen > N_REGISTER_ARGS)) { + alloc_len = N_EXT_QCOM_SCM_ARGS * sizeof(u64); +@@ -131,10 +132,16 @@ static int qcom_scm_call(struct device * + qcom_smccc_convention, + ARM_SMCCC_OWNER_SIP, fn_id); + ++ quirk.state.a6 = 0; ++ + do { +- arm_smccc_smc(cmd, desc->arginfo, desc->args[0], +- desc->args[1], desc->args[2], x5, 0, 0, +- res); ++ arm_smccc_smc_quirk(cmd, desc->arginfo, desc->args[0], ++ desc->args[1], desc->args[2], x5, ++ quirk.state.a6, 0, res, &quirk); ++ ++ if (res->a0 == QCOM_SCM_INTERRUPTED) ++ cmd = res->a0; ++ + } while (res->a0 == QCOM_SCM_INTERRUPTED); + + mutex_unlock(&qcom_scm_lock); +--- a/include/linux/arm-smccc.h ++++ b/include/linux/arm-smccc.h +@@ -14,9 +14,6 @@ + #ifndef __LINUX_ARM_SMCCC_H + #define __LINUX_ARM_SMCCC_H + +-#include +-#include +- + /* + * This file provides common defines for ARM SMC Calling Convention as + * specified in +@@ -60,6 +57,13 @@ + #define ARM_SMCCC_OWNER_TRUSTED_OS 50 + #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 + ++#define ARM_SMCCC_QUIRK_NONE 0 ++#define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */ ++ ++#ifndef __ASSEMBLY__ ++ ++#include ++#include + /** + * struct arm_smccc_res - Result from SMC/HVC call + * @a0-a3 result values from registers 0 to 3 +@@ -125,4 +129,5 @@ asmlinkage void __arm_smccc_hvc(unsigned + + #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__) + ++#endif /*__ASSEMBLY__*/ + #endif /*__LINUX_ARM_SMCCC_H*/ diff --git a/queue-4.10/hid-multitouch-enable-the-surface-4-type-cover-pro-jp-to-report-multitouch-data.patch b/queue-4.10/hid-multitouch-enable-the-surface-4-type-cover-pro-jp-to-report-multitouch-data.patch new file mode 100644 index 00000000000..c46197eefcd --- /dev/null +++ b/queue-4.10/hid-multitouch-enable-the-surface-4-type-cover-pro-jp-to-report-multitouch-data.patch @@ -0,0 +1,80 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:16 +0000 +Subject: HID: multitouch: enable the Surface 4 Type Cover Pro (JP) to report multitouch data +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-39-alexander.levin@verizon.com> + +From: Yuta Kobayashi + +[ Upstream commit 4fed0231994b27b3896bc63885ac66d02fff625b ] + +Since commit 8fe89ef076fa1 ("HID: multitouch: enable the Surface 3 Type +Cover to report multitouch data"), the TypeCover can be properly handled +by hid-multitouch and don't require any special quirk in the kernel. + +Remove the support of the Surface 4 Type Cover Pro (JP) from +hid-microsoft so it can properly report multitouch from the touchpad. + +Signed-off-by: Yuta Kobayashi +Reviewed-by: Benjamin Tissoires +Signed-off-by: Jiri Kosina +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/hid/hid-core.c | 2 -- + drivers/hid/hid-ids.h | 1 - + drivers/hid/hid-microsoft.c | 2 -- + drivers/hid/usbhid/hid-quirks.c | 1 - + 4 files changed, 6 deletions(-) + +--- a/drivers/hid/hid-core.c ++++ b/drivers/hid/hid-core.c +@@ -729,7 +729,6 @@ static void hid_scan_collection(struct h + hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP || + hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_4 || + hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2 || +- hid->product == USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP || + hid->product == USB_DEVICE_ID_MS_POWER_COVER) && + hid->group == HID_GROUP_MULTITOUCH) + hid->group = HID_GROUP_GENERIC; +@@ -1990,7 +1989,6 @@ static const struct hid_device_id hid_ha + { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP) }, + { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4) }, + { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2) }, +- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP) }, + { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_7K) }, + { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_600) }, + { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3KV1) }, +--- a/drivers/hid/hid-ids.h ++++ b/drivers/hid/hid-ids.h +@@ -730,7 +730,6 @@ + #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP 0x07dd + #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_4 0x07e4 + #define USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2 0x07e8 +-#define USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP 0x07e9 + #define USB_DEVICE_ID_MS_POWER_COVER 0x07da + + #define USB_VENDOR_ID_MOJO 0x8282 +--- a/drivers/hid/hid-microsoft.c ++++ b/drivers/hid/hid-microsoft.c +@@ -284,8 +284,6 @@ static const struct hid_device_id ms_dev + .driver_data = MS_HIDINPUT }, + { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2), + .driver_data = MS_HIDINPUT }, +- { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP), +- .driver_data = MS_HIDINPUT }, + { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER), + .driver_data = MS_HIDINPUT }, + { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_COMFORT_KEYBOARD), +--- a/drivers/hid/usbhid/hid-quirks.c ++++ b/drivers/hid/usbhid/hid-quirks.c +@@ -108,7 +108,6 @@ static const struct hid_blacklist { + { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_3_JP, HID_QUIRK_NO_INIT_REPORTS }, + { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4, HID_QUIRK_NO_INIT_REPORTS }, + { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_2, HID_QUIRK_NO_INIT_REPORTS }, +- { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_PRO_4_JP, HID_QUIRK_NO_INIT_REPORTS }, + { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_POWER_COVER, HID_QUIRK_NO_INIT_REPORTS }, + { USB_VENDOR_ID_MSI, USB_DEVICE_ID_MSI_GT683R_LED_PANEL, HID_QUIRK_NO_INIT_REPORTS }, + { USB_VENDOR_ID_NEXIO, USB_DEVICE_ID_NEXIO_MULTITOUCH_PTI0750, HID_QUIRK_NO_INIT_REPORTS }, diff --git a/queue-4.10/hid-wacom-don-t-apply-generic-settings-to-old-devices.patch b/queue-4.10/hid-wacom-don-t-apply-generic-settings-to-old-devices.patch new file mode 100644 index 00000000000..1fe0f73e6e5 --- /dev/null +++ b/queue-4.10/hid-wacom-don-t-apply-generic-settings-to-old-devices.patch @@ -0,0 +1,42 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:31 +0000 +Subject: HID: wacom: don't apply generic settings to old devices +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-78-alexander.levin@verizon.com> + +From: Ping Cheng + +[ Upstream commit e7deb1570a527d3c74be4e21a72b1b459605c501 ] + +Non-generic devices have numbered_buttons set for both pen and +touch interfaces by default. The actual number of buttons on the +interface is normally manually decided later, which is different +from what those HID generic devices are processed, where number +of buttons are directly retrieved from HID descriptors. + +This patch adds the missed HID_GENERIC check and moves the statement +to wacom_setup_pad_input_capabilities since it's not a quirk anymore. + +Signed-off-by: Ping Cheng +Reviewed-by: Jason Gerecke +Signed-off-by: Jiri Kosina +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/hid/wacom_wac.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/hid/wacom_wac.c ++++ b/drivers/hid/wacom_wac.c +@@ -3290,6 +3290,9 @@ int wacom_setup_pad_input_capabilities(s + { + struct wacom_features *features = &wacom_wac->features; + ++ if ((features->type == HID_GENERIC) && features->numbered_buttons > 0) ++ features->device_type |= WACOM_DEVICETYPE_PAD; ++ + if (!(features->device_type & WACOM_DEVICETYPE_PAD)) + return -ENODEV; + diff --git a/queue-4.10/mmc-sdhci-of-esdhc-remove-default-broken-cd-for-arm.patch b/queue-4.10/mmc-sdhci-of-esdhc-remove-default-broken-cd-for-arm.patch new file mode 100644 index 00000000000..4da90944ee7 --- /dev/null +++ b/queue-4.10/mmc-sdhci-of-esdhc-remove-default-broken-cd-for-arm.patch @@ -0,0 +1,71 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:33 +0000 +Subject: mmc: sdhci-of-esdhc: remove default broken-cd for ARM +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-85-alexander.levin@verizon.com> + +From: yangbo lu + +[ Upstream commit e9acc77dd046b22c7ebf70e35f68968978445f8b ] + +Initially all QorIQ platforms were PowerPC architecture and they didn't +support card detection except several platforms. The driver added the +quirk SDHCI_QUIRK_BROKEN_CARD_DETECTION as default and this made broken-cd +property in dts node didn't work. Now QorIQ platform turns to ARM +architecture and most of them could support card detection. However it's +a large number of dts trees that need to be fixed with broken-cd if we +remove the default SDHCI_QUIRK_BROKEN_CARD_DETECTION in driver. And the +users don't want to see this. So this patch is to remove this default +quirk just for ARM and keep it for PowerPC.(Note, QorIQ PowerPC platform +only has big-endian eSDHC while QorIQ ARM platform has big-endian or +little-endian eSDHC) This makes broken-cd property work again for ARM. + +Signed-off-by: Yangbo Lu +Acked-by: Adrian Hunter +Signed-off-by: Ulf Hansson +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/mmc/host/sdhci-of-esdhc.c | 18 ++++++++++-------- + 1 file changed, 10 insertions(+), 8 deletions(-) + +--- a/drivers/mmc/host/sdhci-of-esdhc.c ++++ b/drivers/mmc/host/sdhci-of-esdhc.c +@@ -569,16 +569,19 @@ static const struct sdhci_ops sdhci_esdh + }; + + static const struct sdhci_pltfm_data sdhci_esdhc_be_pdata = { +- .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION +- | SDHCI_QUIRK_NO_CARD_NO_RESET +- | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, ++ .quirks = ESDHC_DEFAULT_QUIRKS | ++#ifdef CONFIG_PPC ++ SDHCI_QUIRK_BROKEN_CARD_DETECTION | ++#endif ++ SDHCI_QUIRK_NO_CARD_NO_RESET | ++ SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, + .ops = &sdhci_esdhc_be_ops, + }; + + static const struct sdhci_pltfm_data sdhci_esdhc_le_pdata = { +- .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION +- | SDHCI_QUIRK_NO_CARD_NO_RESET +- | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, ++ .quirks = ESDHC_DEFAULT_QUIRKS | ++ SDHCI_QUIRK_NO_CARD_NO_RESET | ++ SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, + .ops = &sdhci_esdhc_le_ops, + }; + +@@ -643,8 +646,7 @@ static int sdhci_esdhc_probe(struct plat + of_device_is_compatible(np, "fsl,p5020-esdhc") || + of_device_is_compatible(np, "fsl,p4080-esdhc") || + of_device_is_compatible(np, "fsl,p1020-esdhc") || +- of_device_is_compatible(np, "fsl,t1040-esdhc") || +- of_device_is_compatible(np, "fsl,ls1021a-esdhc")) ++ of_device_is_compatible(np, "fsl,t1040-esdhc")) + host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION; + + if (of_device_is_compatible(np, "fsl,ls1021a-esdhc")) diff --git a/queue-4.10/pci-add-acs-quirk-for-intel-union-point.patch b/queue-4.10/pci-add-acs-quirk-for-intel-union-point.patch new file mode 100644 index 00000000000..f14b7644875 --- /dev/null +++ b/queue-4.10/pci-add-acs-quirk-for-intel-union-point.patch @@ -0,0 +1,67 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:26 +0000 +Subject: PCI: Add ACS quirk for Intel Union Point +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-65-alexander.levin@verizon.com> + +From: Alex Williamson + +[ Upstream commit 7184f5b451cf3dc61de79091d235b5d2bba2782d ] + +Intel 200-series chipsets have the same errata as 100-series: the ACS +capability doesn't follow the PCIe spec, the capability and control +registers are dwords rather than words. Add PCIe root port device IDs to +existing quirk. + +Signed-off-by: Alex Williamson +Signed-off-by: Bjorn Helgaas +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pci/quirks.c | 28 ++++++++++++++++++++++++---- + 1 file changed, 24 insertions(+), 4 deletions(-) + +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -4151,15 +4151,35 @@ static int pci_quirk_intel_pch_acs(struc + * + * N.B. This doesn't fix what lspci shows. + * ++ * The 100 series chipset specification update includes this as errata #23[3]. ++ * ++ * The 200 series chipset (Union Point) has the same bug according to the ++ * specification update (Intel 200 Series Chipset Family Platform Controller ++ * Hub, Specification Update, January 2017, Revision 001, Document# 335194-001, ++ * Errata 22)[4]. Per the datasheet[5], root port PCI Device IDs for this ++ * chipset include: ++ * ++ * 0xa290-0xa29f PCI Express Root port #{0-16} ++ * 0xa2e7-0xa2ee PCI Express Root port #{17-24} ++ * + * [1] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-2.html + * [2] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-1.html ++ * [3] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-spec-update.html ++ * [4] http://www.intel.com/content/www/us/en/chipsets/200-series-chipset-pch-spec-update.html ++ * [5] http://www.intel.com/content/www/us/en/chipsets/200-series-chipset-pch-datasheet-vol-1.html + */ + static bool pci_quirk_intel_spt_pch_acs_match(struct pci_dev *dev) + { +- return pci_is_pcie(dev) && +- pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT && +- ((dev->device & ~0xf) == 0xa110 || +- (dev->device >= 0xa167 && dev->device <= 0xa16a)); ++ if (!pci_is_pcie(dev) || pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) ++ return false; ++ ++ switch (dev->device) { ++ case 0xa110 ... 0xa11f: case 0xa167 ... 0xa16a: /* Sunrise Point */ ++ case 0xa290 ... 0xa29f: case 0xa2e7 ... 0xa2ee: /* Union Point */ ++ return true; ++ } ++ ++ return false; + } + + #define INTEL_SPT_ACS_CTRL (PCI_ACS_CAP + 4) diff --git a/queue-4.10/pci-add-acs-quirk-for-qualcomm-qdf2400-and-qdf2432.patch b/queue-4.10/pci-add-acs-quirk-for-qualcomm-qdf2400-and-qdf2432.patch new file mode 100644 index 00000000000..ec5b863a547 --- /dev/null +++ b/queue-4.10/pci-add-acs-quirk-for-qualcomm-qdf2400-and-qdf2432.patch @@ -0,0 +1,77 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:34 +0000 +Subject: PCI: Add ACS quirk for Qualcomm QDF2400 and QDF2432 +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-87-alexander.levin@verizon.com> + +From: Sinan Kaya + +[ Upstream commit 33be632b8443b6ac74aa293504f430604fb9abeb ] + +The Qualcomm QDF2xxx root ports don't advertise an ACS capability, but they +do provide ACS-like features to disable peer transactions and validate bus +numbers in requests. + +To be specific: +* Hardware supports source validation but it will report the issue as +Completer Abort instead of ACS Violation. + +* Hardware doesn't support peer-to-peer and each root port is a root +complex with unique segment numbers. + +* It is not possible for one root port to pass traffic to the other root +port. All PCIe transactions are terminated inside the root port. + +Add an ACS quirk for the QDF2400 and QDF2432 products. + +[bhelgaas: changelog] +Signed-off-by: Sinan Kaya +Signed-off-by: Bjorn Helgaas +Reviewed-by: Alex Williamson +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pci/quirks.c | 23 +++++++++++++++++++++++ + 1 file changed, 23 insertions(+) + +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -4161,6 +4161,26 @@ static int pci_quirk_intel_pch_acs(struc + } + + /* ++ * These QCOM root ports do provide ACS-like features to disable peer ++ * transactions and validate bus numbers in requests, but do not provide an ++ * actual PCIe ACS capability. Hardware supports source validation but it ++ * will report the issue as Completer Abort instead of ACS Violation. ++ * Hardware doesn't support peer-to-peer and each root port is a root ++ * complex with unique segment numbers. It is not possible for one root ++ * port to pass traffic to another root port. All PCIe transactions are ++ * terminated inside the root port. ++ */ ++static int pci_quirk_qcom_rp_acs(struct pci_dev *dev, u16 acs_flags) ++{ ++ u16 flags = (PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_SV); ++ int ret = acs_flags & ~flags ? 0 : 1; ++ ++ dev_info(&dev->dev, "Using QCOM ACS Quirk (%d)\n", ret); ++ ++ return ret; ++} ++ ++/* + * Sunrise Point PCH root ports implement ACS, but unfortunately as shown in + * the datasheet (Intel 100 Series Chipset Family PCH Datasheet, Vol. 2, + * 12.1.46, 12.1.47)[1] this chipset uses dwords for the ACS capability and +@@ -4316,6 +4336,9 @@ static const struct pci_dev_acs_enabled + /* I219 */ + { PCI_VENDOR_ID_INTEL, 0x15b7, pci_quirk_mf_endpoint_acs }, + { PCI_VENDOR_ID_INTEL, 0x15b8, pci_quirk_mf_endpoint_acs }, ++ /* QCOM QDF2xxx root ports */ ++ { 0x17cb, 0x400, pci_quirk_qcom_rp_acs }, ++ { 0x17cb, 0x401, pci_quirk_qcom_rp_acs }, + /* Intel PCH root ports */ + { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_pch_acs }, + { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_spt_pch_acs }, diff --git a/queue-4.10/pci-add-broadcom-northstar2-paxc-quirk-for-device-class-and-mpss.patch b/queue-4.10/pci-add-broadcom-northstar2-paxc-quirk-for-device-class-and-mpss.patch new file mode 100644 index 00000000000..b9c486c1c77 --- /dev/null +++ b/queue-4.10/pci-add-broadcom-northstar2-paxc-quirk-for-device-class-and-mpss.patch @@ -0,0 +1,56 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:33 +0000 +Subject: PCI: Add Broadcom Northstar2 PAXC quirk for device class and MPSS +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-83-alexander.levin@verizon.com> + +From: Jon Mason + +[ Upstream commit ce709f86501a013e941e9986cb072eae375ddf3e ] + +The Broadcom Northstar2 SoC has a number of quirks for the PAXC +(internal/fake) PCI bus. Specifically, the PCI config space is shared +between the root port and the first PF (ie., PF0), and a number of fields +are tied to zero (thus preventing them from being set). These cannot be +"fixed" in device firmware, so we must fix them with a quirk. + +Signed-off-by: Jon Mason +Signed-off-by: Bjorn Helgaas +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pci/quirks.c | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -2240,6 +2240,27 @@ DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_B + PCI_DEVICE_ID_TIGON3_5719, + quirk_brcm_5719_limit_mrrs); + ++#ifdef CONFIG_PCIE_IPROC_PLATFORM ++static void quirk_paxc_bridge(struct pci_dev *pdev) ++{ ++ /* The PCI config space is shared with the PAXC root port and the first ++ * Ethernet device. So, we need to workaround this by telling the PCI ++ * code that the bridge is not an Ethernet device. ++ */ ++ if (pdev->hdr_type == PCI_HEADER_TYPE_BRIDGE) ++ pdev->class = PCI_CLASS_BRIDGE_PCI << 8; ++ ++ /* MPSS is not being set properly (as it is currently 0). This is ++ * because that area of the PCI config space is hard coded to zero, and ++ * is not modifiable by firmware. Set this to 2 (e.g., 512 byte MPS) ++ * so that the MPS can be set to the real max value. ++ */ ++ pdev->pcie_mpss = 2; ++} ++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x16cd, quirk_paxc_bridge); ++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x16f0, quirk_paxc_bridge); ++#endif ++ + /* Originally in EDAC sources for i82875P: + * Intel tells BIOS developers to hide device 6 which + * configures the overflow device access containing diff --git a/queue-4.10/pci-disable-msi-for-hisilicon-hip06-hip07-root-ports.patch b/queue-4.10/pci-disable-msi-for-hisilicon-hip06-hip07-root-ports.patch new file mode 100644 index 00000000000..d2e6b9ee2fd --- /dev/null +++ b/queue-4.10/pci-disable-msi-for-hisilicon-hip06-hip07-root-ports.patch @@ -0,0 +1,51 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:33 +0000 +Subject: PCI: Disable MSI for HiSilicon Hip06/Hip07 Root Ports +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-84-alexander.levin@verizon.com> + +From: Dongdong Liu + +[ Upstream commit 72f2ff0deb870145a5a2d24cd75b4f9936159a62 ] + +The PCIe Root Port in Hip06/Hip07 SoCs advertises an MSI capability, but it +cannot generate MSIs. It can transfer MSI/MSI-X from downstream devices, +but does not support MSI/MSI-X itself. + +Add a quirk to prevent use of MSI/MSI-X by the Root Port. + +[bhelgaas: changelog, sort vendor ID #define, drop device ID #define] +Signed-off-by: Dongdong Liu +Signed-off-by: Bjorn Helgaas +Reviewed-by: Gabriele Paoloni +Reviewed-by: Zhou Wang +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pci/quirks.c | 1 + + include/linux/pci_ids.h | 2 ++ + 2 files changed, 3 insertions(+) + +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -1634,6 +1634,7 @@ static void quirk_pcie_mch(struct pci_de + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7520_MCH, quirk_pcie_mch); + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7320_MCH, quirk_pcie_mch); + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7525_MCH, quirk_pcie_mch); ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0x1610, quirk_pcie_mch); + + + /* +--- a/include/linux/pci_ids.h ++++ b/include/linux/pci_ids.h +@@ -2516,6 +2516,8 @@ + #define PCI_DEVICE_ID_KORENIX_JETCARDF2 0x1700 + #define PCI_DEVICE_ID_KORENIX_JETCARDF3 0x17ff + ++#define PCI_VENDOR_ID_HUAWEI 0x19e5 ++ + #define PCI_VENDOR_ID_NETRONOME 0x19ee + #define PCI_DEVICE_ID_NETRONOME_NFP3200 0x3200 + #define PCI_DEVICE_ID_NETRONOME_NFP3240 0x3240 diff --git a/queue-4.10/pci-sort-the-list-of-devices-with-d3-delay-quirk-by-id.patch b/queue-4.10/pci-sort-the-list-of-devices-with-d3-delay-quirk-by-id.patch new file mode 100644 index 00000000000..3e5301e4635 --- /dev/null +++ b/queue-4.10/pci-sort-the-list-of-devices-with-d3-delay-quirk-by-id.patch @@ -0,0 +1,72 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:34 +0000 +Subject: PCI: Sort the list of devices with D3 delay quirk by ID +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-86-alexander.levin@verizon.com> + +From: Andy Shevchenko + +[ Upstream commit cd3e2eb8905d14fe28a2fc75362b8ecec16f0fb6 ] + +Sort the list of Intel devices that have no PCI D3 delay by ID. Add a +comment for group of devices that had not been marked yet. + +There is no functional change. + +Signed-off-by: Andy Shevchenko +Signed-off-by: Bjorn Helgaas +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pci/quirks.c | 26 ++++++++++++++------------ + 1 file changed, 14 insertions(+), 12 deletions(-) + +--- a/drivers/pci/quirks.c ++++ b/drivers/pci/quirks.c +@@ -3136,30 +3136,32 @@ static void quirk_remove_d3_delay(struct + { + dev->d3_delay = 0; + } +-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0c00, quirk_remove_d3_delay); ++/* C600 Series devices do not need 10ms d3_delay */ + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0412, quirk_remove_d3_delay); ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0c00, quirk_remove_d3_delay); + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0c0c, quirk_remove_d3_delay); +-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c31, quirk_remove_d3_delay); +-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c3a, quirk_remove_d3_delay); +-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c3d, quirk_remove_d3_delay); +-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c2d, quirk_remove_d3_delay); +-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c20, quirk_remove_d3_delay); ++/* Lynxpoint-H PCH devices do not need 10ms d3_delay */ ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c02, quirk_remove_d3_delay); + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c18, quirk_remove_d3_delay); + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c1c, quirk_remove_d3_delay); ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c20, quirk_remove_d3_delay); ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c22, quirk_remove_d3_delay); + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c26, quirk_remove_d3_delay); ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c2d, quirk_remove_d3_delay); ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c31, quirk_remove_d3_delay); ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c3a, quirk_remove_d3_delay); ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c3d, quirk_remove_d3_delay); + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c4e, quirk_remove_d3_delay); +-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c02, quirk_remove_d3_delay); +-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x8c22, quirk_remove_d3_delay); + /* Intel Cherrytrail devices do not need 10ms d3_delay */ + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2280, quirk_remove_d3_delay); ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2298, quirk_remove_d3_delay); ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x229c, quirk_remove_d3_delay); + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b0, quirk_remove_d3_delay); ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b5, quirk_remove_d3_delay); ++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b7, quirk_remove_d3_delay); + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b8, quirk_remove_d3_delay); + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22d8, quirk_remove_d3_delay); + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22dc, quirk_remove_d3_delay); +-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b5, quirk_remove_d3_delay); +-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x22b7, quirk_remove_d3_delay); +-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2298, quirk_remove_d3_delay); +-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x229c, quirk_remove_d3_delay); + + /* + * Some devices may pass our check in pci_intx_mask_supported() if diff --git a/queue-4.10/pci-xgene-fix-double-free-on-init-error.patch b/queue-4.10/pci-xgene-fix-double-free-on-init-error.patch new file mode 100644 index 00000000000..65fec315fc6 --- /dev/null +++ b/queue-4.10/pci-xgene-fix-double-free-on-init-error.patch @@ -0,0 +1,46 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:26 +0000 +Subject: PCI: xgene: Fix double free on init error +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-66-alexander.levin@verizon.com> + +From: Dan Carpenter + +[ Upstream commit 1ded56df3247d358390ae6dc09ccee620262ac5f ] + +The "port" variable was allocated with devm_kzalloc() so if we free it with +kfree() it will be freed twice. Also I changed it to propogate the error +from devm_ioremap_resource() instead of returning -ENOMEM. + +Fixes: c5d460396100 ("PCI: Add MCFG quirks for X-Gene host controller") +Also-posted-by: Shawn Lin +Signed-off-by: Dan Carpenter +Signed-off-by: Bjorn Helgaas +Acked-by: Tanmay Inamdar +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pci/host/pci-xgene.c | 7 ++----- + 1 file changed, 2 insertions(+), 5 deletions(-) + +--- a/drivers/pci/host/pci-xgene.c ++++ b/drivers/pci/host/pci-xgene.c +@@ -246,14 +246,11 @@ static int xgene_pcie_ecam_init(struct p + ret = xgene_get_csr_resource(adev, &csr); + if (ret) { + dev_err(dev, "can't get CSR resource\n"); +- kfree(port); + return ret; + } + port->csr_base = devm_ioremap_resource(dev, &csr); +- if (IS_ERR(port->csr_base)) { +- kfree(port); +- return -ENOMEM; +- } ++ if (IS_ERR(port->csr_base)) ++ return PTR_ERR(port->csr_base); + + port->cfg_base = cfg->win; + port->version = ipversion; diff --git a/queue-4.10/platform-x86-asus-wmi-detect-quirk_no_rfkill-from-the-dsdt.patch b/queue-4.10/platform-x86-asus-wmi-detect-quirk_no_rfkill-from-the-dsdt.patch new file mode 100644 index 00000000000..589d199eb48 --- /dev/null +++ b/queue-4.10/platform-x86-asus-wmi-detect-quirk_no_rfkill-from-the-dsdt.patch @@ -0,0 +1,105 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:36 +0000 +Subject: platform/x86: asus-wmi: Detect quirk_no_rfkill from the DSDT +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-92-alexander.levin@verizon.com> + +From: João Paulo Rechi Vita + +[ Upstream commit 71050ae7bf83e4d71a859257d11adc5de517073e ] + +Some Asus laptops that have an airplane-mode indicator LED, also have +the WMI WLAN user bit set, and the following bits in their DSDT: + + Scope (_SB) + { + (...) + Device (ATKD) + { + (...) + Method (WMNB, 3, Serialized) + { + (...) + If (LEqual (IIA0, 0x00010002)) + { + OWGD (IIA1) + Return (One) + } + } + } + } + +So when asus-wmi uses ASUS_WMI_DEVID_WLAN_LED (0x00010002) to store the +wlan state, it drives the airplane-mode indicator LED (through the call +to OWGD) in an inverted fashion: the LED is ON when airplane mode is OFF +(since wlan is ON), and vice-versa. + +This commit skips registering RFKill switches at all for these laptops, +to allow the asus-wireless driver to drive the airplane mode LED +correctly through the ASHS ACPI device. Relying on the presence of ASHS +and ASUS_WMI_DSTS_USER_BIT avoids adding DMI-based quirks for at least +21 different laptops. + +Signed-off-by: João Paulo Rechi Vita +Signed-off-by: Andy Shevchenko +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/platform/x86/asus-wmi.c | 23 +++++++++++++++++++---- + 1 file changed, 19 insertions(+), 4 deletions(-) + +--- a/drivers/platform/x86/asus-wmi.c ++++ b/drivers/platform/x86/asus-wmi.c +@@ -159,6 +159,8 @@ MODULE_LICENSE("GPL"); + #define USB_INTEL_XUSB2PR 0xD0 + #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31 + ++static const char * const ashs_ids[] = { "ATK4001", "ATK4002", NULL }; ++ + struct bios_args { + u32 arg0; + u32 arg1; +@@ -2051,6 +2053,16 @@ static int asus_wmi_fan_init(struct asus + return 0; + } + ++static bool ashs_present(void) ++{ ++ int i = 0; ++ while (ashs_ids[i]) { ++ if (acpi_dev_found(ashs_ids[i++])) ++ return true; ++ } ++ return false; ++} ++ + /* + * WMI Driver + */ +@@ -2095,6 +2107,13 @@ static int asus_wmi_add(struct platform_ + if (err) + goto fail_leds; + ++ asus_wmi_get_devstate(asus, ASUS_WMI_DEVID_WLAN, &result); ++ if (result & (ASUS_WMI_DSTS_PRESENCE_BIT | ASUS_WMI_DSTS_USER_BIT)) ++ asus->driver->wlan_ctrl_by_user = 1; ++ ++ if (asus->driver->wlan_ctrl_by_user && ashs_present()) ++ asus->driver->quirks->no_rfkill = 1; ++ + if (!asus->driver->quirks->no_rfkill) { + err = asus_wmi_rfkill_init(asus); + if (err) +@@ -2134,10 +2153,6 @@ static int asus_wmi_add(struct platform_ + if (err) + goto fail_debugfs; + +- asus_wmi_get_devstate(asus, ASUS_WMI_DEVID_WLAN, &result); +- if (result & (ASUS_WMI_DSTS_PRESENCE_BIT | ASUS_WMI_DSTS_USER_BIT)) +- asus->driver->wlan_ctrl_by_user = 1; +- + return 0; + + fail_debugfs: diff --git a/queue-4.10/rx51-broken-build.patch b/queue-4.10/rx51-broken-build.patch new file mode 100644 index 00000000000..2b5dbb2b2eb --- /dev/null +++ b/queue-4.10/rx51-broken-build.patch @@ -0,0 +1,45 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:26 +0000 +Subject: [media] rx51: broken build +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-67-alexander.levin@verizon.com> + +From: Sean Young + +[ Upstream commit 922ee72da7c739157ed02ea04a5c100d19f67226 ] + +As reported by kernel build test: + + In file included from arch/arm/mach-omap2/pdata-quirks.c:15:0: +>> arch/arm/mach-omap2/pdata-quirks.c:536:49: error: 'rx51_lirc_data' undeclared here (not in a function) + OF_DEV_AUXDATA("nokia,n900-ir", 0, "n900-ir", &rx51_lirc_data), + ^ + include/linux/of_platform.h:52:21: note: in definition of macro 'OF_DEV_AUXDATA' + .platform_data = _pdata } + ^~~~~~ + +Since "a92def1 [media] ir-rx51: port to rc-core" the build fails on +some arm configurations. + +Reported-by: kbuild test robot +Signed-off-by: Sean Young +Signed-off-by: Mauro Carvalho Chehab +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm/mach-omap2/pdata-quirks.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/mach-omap2/pdata-quirks.c ++++ b/arch/arm/mach-omap2/pdata-quirks.c +@@ -533,7 +533,7 @@ static struct of_dev_auxdata omap_auxdat + &omap3_iommu_pdata), + OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x4809c000, "4809c000.mmc", &mmc_pdata[0]), + OF_DEV_AUXDATA("ti,omap3-hsmmc", 0x480b4000, "480b4000.mmc", &mmc_pdata[1]), +- OF_DEV_AUXDATA("nokia,n900-ir", 0, "n900-ir", &rx51_lirc_data), ++ OF_DEV_AUXDATA("nokia,n900-ir", 0, "n900-ir", &rx51_ir_data), + /* Only on am3517 */ + OF_DEV_AUXDATA("ti,davinci_mdio", 0x5c030000, "davinci_mdio.0", NULL), + OF_DEV_AUXDATA("ti,am3517-emac", 0x5c000000, "davinci_emac.0", diff --git a/queue-4.10/sata-ahci-da850-implement-a-workaround-for-the-softreset-quirk.patch b/queue-4.10/sata-ahci-da850-implement-a-workaround-for-the-softreset-quirk.patch new file mode 100644 index 00000000000..853a73ac218 --- /dev/null +++ b/queue-4.10/sata-ahci-da850-implement-a-workaround-for-the-softreset-quirk.patch @@ -0,0 +1,74 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:27 +0000 +Subject: sata: ahci-da850: implement a workaround for the softreset quirk +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-68-alexander.levin@verizon.com> + +From: Bartosz Golaszewski + +[ Upstream commit f4d435f3265661d04e5290a0a0450e3a38898128 ] + +There's an issue with the da850 SATA controller: if port multiplier +support is compiled in, but we're connecting the drive directly to +the SATA port on the board, the drive can't be detected. + +To make SATA work on the da850-lcdk board: first try to softreset +with pmp - if the operation fails with -EBUSY, retry without pmp. + +Signed-off-by: Bartosz Golaszewski +Acked-by: Tejun Heo +Signed-off-by: Sekhar Nori +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/ata/ahci_da850.c | 33 ++++++++++++++++++++++++++++++++- + 1 file changed, 32 insertions(+), 1 deletion(-) + +--- a/drivers/ata/ahci_da850.c ++++ b/drivers/ata/ahci_da850.c +@@ -54,11 +54,42 @@ static void da850_sata_init(struct devic + writel(val, ahci_base + SATA_P0PHYCR_REG); + } + ++static int ahci_da850_softreset(struct ata_link *link, ++ unsigned int *class, unsigned long deadline) ++{ ++ int pmp, ret; ++ ++ pmp = sata_srst_pmp(link); ++ ++ /* ++ * There's an issue with the SATA controller on da850 SoCs: if we ++ * enable Port Multiplier support, but the drive is connected directly ++ * to the board, it can't be detected. As a workaround: if PMP is ++ * enabled, we first call ahci_do_softreset() and pass it the result of ++ * sata_srst_pmp(). If this call fails, we retry with pmp = 0. ++ */ ++ ret = ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready); ++ if (pmp && ret == -EBUSY) ++ return ahci_do_softreset(link, class, 0, ++ deadline, ahci_check_ready); ++ ++ return ret; ++} ++ ++static struct ata_port_operations ahci_da850_port_ops = { ++ .inherits = &ahci_platform_ops, ++ .softreset = ahci_da850_softreset, ++ /* ++ * No need to override .pmp_softreset - it's only used for actual ++ * PMP-enabled ports. ++ */ ++}; ++ + static const struct ata_port_info ahci_da850_port_info = { + .flags = AHCI_FLAG_COMMON, + .pio_mask = ATA_PIO4, + .udma_mask = ATA_UDMA6, +- .port_ops = &ahci_platform_ops, ++ .port_ops = &ahci_da850_port_ops, + }; + + static struct scsi_host_template ahci_platform_sht = { diff --git a/queue-4.10/serial-8250_omap-add-omap_dma_tx_kick-quirk-for-am437x.patch b/queue-4.10/serial-8250_omap-add-omap_dma_tx_kick-quirk-for-am437x.patch new file mode 100644 index 00000000000..0b60432396c --- /dev/null +++ b/queue-4.10/serial-8250_omap-add-omap_dma_tx_kick-quirk-for-am437x.patch @@ -0,0 +1,57 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:22 +0000 +Subject: serial: 8250_omap: Add OMAP_DMA_TX_KICK quirk for AM437x +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-54-alexander.levin@verizon.com> + +From: Vignesh R + +[ Upstream commit b6ffcf21082300519bc4f9c3d24f61207cc9eae4 ] + +UART uses as EDMA as dma engine on AM437x SoC and therefore, requires +OMAP_DMA_TX_KICK quirk just like AM33xx. So, enable OMAP_DMA_TX_KICK +quirk for AM437x platform as well. While at that, drop use of +of_machine_is_compatible() and instead pass quirks via device data. + +Signed-off-by: Vignesh R +Acked-by: Tony Lindgren +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/tty/serial/8250/8250_omap.c | 9 +++------ + 1 file changed, 3 insertions(+), 6 deletions(-) + +--- a/drivers/tty/serial/8250/8250_omap.c ++++ b/drivers/tty/serial/8250/8250_omap.c +@@ -1075,15 +1075,15 @@ static int omap8250_no_handle_irq(struct + } + + static const u8 am3352_habit = OMAP_DMA_TX_KICK | UART_ERRATA_CLOCK_DISABLE; +-static const u8 am4372_habit = UART_ERRATA_CLOCK_DISABLE; ++static const u8 dra742_habit = UART_ERRATA_CLOCK_DISABLE; + + static const struct of_device_id omap8250_dt_ids[] = { + { .compatible = "ti,omap2-uart" }, + { .compatible = "ti,omap3-uart" }, + { .compatible = "ti,omap4-uart" }, + { .compatible = "ti,am3352-uart", .data = &am3352_habit, }, +- { .compatible = "ti,am4372-uart", .data = &am4372_habit, }, +- { .compatible = "ti,dra742-uart", .data = &am4372_habit, }, ++ { .compatible = "ti,am4372-uart", .data = &am3352_habit, }, ++ { .compatible = "ti,dra742-uart", .data = &dra742_habit, }, + {}, + }; + MODULE_DEVICE_TABLE(of, omap8250_dt_ids); +@@ -1218,9 +1218,6 @@ static int omap8250_probe(struct platfor + priv->omap8250_dma.rx_size = RX_TRIGGER; + priv->omap8250_dma.rxconf.src_maxburst = RX_TRIGGER; + priv->omap8250_dma.txconf.dst_maxburst = TX_TRIGGER; +- +- if (of_machine_is_compatible("ti,am33xx")) +- priv->habit |= OMAP_DMA_TX_KICK; + /* + * pause is currently not supported atleast on omap-sdma + * and edma on most earlier kernels. diff --git a/queue-4.10/series b/queue-4.10/series index 8427225a086..35b06416e8a 100644 --- a/queue-4.10/series +++ b/queue-4.10/series @@ -65,3 +65,47 @@ documentation-stable-kernel-rules-fix-stable-tag-format.patch mm-mempolicy.c-fix-error-handling-in-set_mempolicy-and-mbind.patch random-use-chacha20-for-get_random_int-long.patch kvm-fix-page-struct-leak-in-handle_vmon.patch +hid-multitouch-enable-the-surface-4-type-cover-pro-jp-to-report-multitouch-data.patch +drm-edid-constify-edid-quirk-list.patch +drm-i915-fix-intel_bdw_ids-definition.patch +drm-i915-more-.is_mobile-cleanups-for-bdw.patch +drm-i915-actually-drive-the-bdw-reserved-ids.patch +asoc-intel-bytcr_rt5640-quirks-for-insyde-devices.patch +arm-omap2-fix-init-for-multiple-quirks-for-the-same-soc.patch +usb-chipidea-msm-rely-on-core-to-override-ahbburst.patch +serial-8250_omap-add-omap_dma_tx_kick-quirk-for-am437x.patch +arm-davinci-add-skeleton-for-pdata-quirks.patch +usb-xhci-add-quirk-flag-for-broken-ped-bits.patch +usb-host-xhci-plat-enable-broken_ped-quirk-if-platform-requested.patch +usb-dwc3-host-pass-quirk-broken-port-ped-property-for-known-broken-revisions.patch +drm-mga-remove-device_is_agp-callback.patch +pci-add-acs-quirk-for-intel-union-point.patch +pci-xgene-fix-double-free-on-init-error.patch +rx51-broken-build.patch +sata-ahci-da850-implement-a-workaround-for-the-softreset-quirk.patch +acpi-button-change-default-behavior-to-lid_init_state-open.patch +asoc-codecs-rt5670-add-quirk-for-lenovo-thinkpad-10.patch +asoc-intel-baytrail-add-quirk-for-lenovo-thinkpad-10.patch +asoc-intel-cht_bsw_rt5645-harden-acpi-device-detection.patch +asoc-intel-cht_bsw_rt5645-add-baytrail-mclk-support.patch +acpi-save-nvs-memory-for-lenovo-g50-45.patch +usb-musb-da8xx-fix-host-mode-suspend.patch +asoc-sun4i-i2s-add-quirks-to-handle-a31-compatible.patch +hid-wacom-don-t-apply-generic-settings-to-old-devices.patch +arm-kernel-add-smc-structure-parameter.patch +firmware-qcom-scm-fix-interrupted-scm-calls.patch +arm-smccc-update-hvc-comment-to-describe-new-quirk-parameter.patch +pci-add-broadcom-northstar2-paxc-quirk-for-device-class-and-mpss.patch +pci-disable-msi-for-hisilicon-hip06-hip07-root-ports.patch +mmc-sdhci-of-esdhc-remove-default-broken-cd-for-arm.patch +pci-sort-the-list-of-devices-with-d3-delay-quirk-by-id.patch +pci-add-acs-quirk-for-qualcomm-qdf2400-and-qdf2432.patch +watchdog-s3c2410-fix-infinite-interrupt-in-soft-mode.patch +platform-x86-asus-wmi-detect-quirk_no_rfkill-from-the-dsdt.patch +tools-power-turbostat-decode-baytrail-cc6-and-mc6-demotion-configuration.patch +tools-power-turbostat-dump-atom-p-states-correctly.patch +x86-reboot-quirks-add-asus-eeebook-x205ta-reboot-quirk.patch +x86-reboot-quirks-add-asus-eeebook-x205ta-w-reboot-quirk.patch +usb-storage-add-ignore-residue-quirk-for-initio-inic-3619.patch +x86-reboot-quirks-fix-typo-in-asus-eeebook-x205ta-reboot-quirk.patch +can-flexcan-add-quirk-flexcan_quirk_enable_eacen_rrs.patch diff --git a/queue-4.10/tools-power-turbostat-decode-baytrail-cc6-and-mc6-demotion-configuration.patch b/queue-4.10/tools-power-turbostat-decode-baytrail-cc6-and-mc6-demotion-configuration.patch new file mode 100644 index 00000000000..adb35609d73 --- /dev/null +++ b/queue-4.10/tools-power-turbostat-decode-baytrail-cc6-and-mc6-demotion-configuration.patch @@ -0,0 +1,92 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:36 +0000 +Subject: tools/power turbostat: decode Baytrail CC6 and MC6 demotion configuration +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-93-alexander.levin@verizon.com> + +From: Len Brown + +[ Upstream commit 71616c8e936a6dd541f0627d7bf4ff09971d8ccb ] + +with --debug, see: + +cpu0: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x00000000 (DISable-CC6-Demotion) +cpu0: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x00000000 (DISable-MC6-Demotion) + +Note that the hardware default is to enable demotion, +and Linux started clearing these registers in 3.17. + +Signed-off-by: Len Brown +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + tools/power/x86/turbostat/turbostat.c | 42 ++++++++++++++++++++++++++++++++++ + 1 file changed, 42 insertions(+) + +--- a/tools/power/x86/turbostat/turbostat.c ++++ b/tools/power/x86/turbostat/turbostat.c +@@ -3097,6 +3097,27 @@ int has_snb_msrs(unsigned int family, un + } + + /* ++ * SLV client has supporet for unique MSRs: ++ * ++ * MSR_CC6_DEMOTION_POLICY_CONFIG ++ * MSR_MC6_DEMOTION_POLICY_CONFIG ++ */ ++ ++int has_slv_msrs(unsigned int family, unsigned int model) ++{ ++ if (!genuine_intel) ++ return 0; ++ ++ switch (model) { ++ case INTEL_FAM6_ATOM_SILVERMONT1: ++ case INTEL_FAM6_ATOM_MERRIFIELD: ++ case INTEL_FAM6_ATOM_MOOREFIELD: ++ return 1; ++ } ++ return 0; ++} ++ ++/* + * HSW adds support for additional MSRs: + * + * MSR_PKG_C8_RESIDENCY 0x00000630 +@@ -3327,6 +3348,24 @@ void decode_misc_pwr_mgmt_msr(void) + msr & (1 << 1) ? "EN" : "DIS", + msr & (1 << 8) ? "EN" : "DIS"); + } ++/* ++ * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG ++ * ++ * This MSRs are present on Silvermont processors, ++ * Intel Atom processor E3000 series (Baytrail), and friends. ++ */ ++void decode_c6_demotion_policy_msr(void) ++{ ++ unsigned long long msr; ++ ++ if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr)) ++ fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n", ++ base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS"); ++ ++ if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr)) ++ fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n", ++ base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS"); ++} + + void process_cpuid() + { +@@ -3509,6 +3548,9 @@ void process_cpuid() + if (debug) + decode_misc_pwr_mgmt_msr(); + ++ if (debug && has_slv_msrs(family, model)) ++ decode_c6_demotion_policy_msr(); ++ + rapl_probe(family, model); + perf_limit_reasons_probe(family, model); + diff --git a/queue-4.10/tools-power-turbostat-dump-atom-p-states-correctly.patch b/queue-4.10/tools-power-turbostat-dump-atom-p-states-correctly.patch new file mode 100644 index 00000000000..7d575ba28ea --- /dev/null +++ b/queue-4.10/tools-power-turbostat-dump-atom-p-states-correctly.patch @@ -0,0 +1,165 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:37 +0000 +Subject: tools/power turbostat: dump Atom P-states correctly +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-94-alexander.levin@verizon.com> + +From: Len Brown + +[ Upstream commit 0f7887c49b0c454aef9936a6eadabe1c91b5af55 ] + +Turbostat dumps MSR_TURBO_RATIO_LIMIT on Core Architecture. +But Atom Architecture uses MSR_ATOM_CORE_RATIOS and +MSR_ATOM_CORE_TURBO_RATIOS. + +Signed-off-by: Len Brown +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + tools/power/x86/turbostat/turbostat.c | 103 +++++++++++++++++++++++++++------- + 1 file changed, 82 insertions(+), 21 deletions(-) + +--- a/tools/power/x86/turbostat/turbostat.c ++++ b/tools/power/x86/turbostat/turbostat.c +@@ -1598,6 +1598,54 @@ dump_nhm_turbo_ratio_limits(void) + } + + static void ++dump_atom_turbo_ratio_limits(void) ++{ ++ unsigned long long msr; ++ unsigned int ratio; ++ ++ get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr); ++ fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF); ++ ++ ratio = (msr >> 0) & 0x3F; ++ if (ratio) ++ fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n", ++ ratio, bclk, ratio * bclk); ++ ++ ratio = (msr >> 8) & 0x3F; ++ if (ratio) ++ fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n", ++ ratio, bclk, ratio * bclk); ++ ++ ratio = (msr >> 16) & 0x3F; ++ if (ratio) ++ fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n", ++ ratio, bclk, ratio * bclk); ++ ++ get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr); ++ fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF); ++ ++ ratio = (msr >> 24) & 0x3F; ++ if (ratio) ++ fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n", ++ ratio, bclk, ratio * bclk); ++ ++ ratio = (msr >> 16) & 0x3F; ++ if (ratio) ++ fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n", ++ ratio, bclk, ratio * bclk); ++ ++ ratio = (msr >> 8) & 0x3F; ++ if (ratio) ++ fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n", ++ ratio, bclk, ratio * bclk); ++ ++ ratio = (msr >> 0) & 0x3F; ++ if (ratio) ++ fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n", ++ ratio, bclk, ratio * bclk); ++} ++ ++static void + dump_knl_turbo_ratio_limits(void) + { + const unsigned int buckets_no = 7; +@@ -2368,8 +2416,32 @@ int probe_nhm_msrs(unsigned int family, + has_base_hz = 1; + return 1; + } ++/* ++ * SLV client has supporet for unique MSRs: ++ * ++ * MSR_CC6_DEMOTION_POLICY_CONFIG ++ * MSR_MC6_DEMOTION_POLICY_CONFIG ++ */ ++ ++int has_slv_msrs(unsigned int family, unsigned int model) ++{ ++ if (!genuine_intel) ++ return 0; ++ ++ switch (model) { ++ case INTEL_FAM6_ATOM_SILVERMONT1: ++ case INTEL_FAM6_ATOM_MERRIFIELD: ++ case INTEL_FAM6_ATOM_MOOREFIELD: ++ return 1; ++ } ++ return 0; ++} ++ + int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model) + { ++ if (has_slv_msrs(family, model)) ++ return 0; ++ + switch (model) { + /* Nehalem compatible, but do not include turbo-ratio limit support */ + case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */ +@@ -2381,6 +2453,13 @@ int has_nhm_turbo_ratio_limit(unsigned i + return 1; + } + } ++int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model) ++{ ++ if (has_slv_msrs(family, model)) ++ return 1; ++ ++ return 0; ++} + int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model) + { + if (!genuine_intel) +@@ -2478,6 +2557,9 @@ dump_cstate_pstate_config_info(unsigned + if (has_nhm_turbo_ratio_limit(family, model)) + dump_nhm_turbo_ratio_limits(); + ++ if (has_atom_turbo_ratio_limit(family, model)) ++ dump_atom_turbo_ratio_limits(); ++ + if (has_knl_turbo_ratio_limit(family, model)) + dump_knl_turbo_ratio_limits(); + +@@ -3094,27 +3176,6 @@ int has_snb_msrs(unsigned int family, un + return 1; + } + return 0; +-} +- +-/* +- * SLV client has supporet for unique MSRs: +- * +- * MSR_CC6_DEMOTION_POLICY_CONFIG +- * MSR_MC6_DEMOTION_POLICY_CONFIG +- */ +- +-int has_slv_msrs(unsigned int family, unsigned int model) +-{ +- if (!genuine_intel) +- return 0; +- +- switch (model) { +- case INTEL_FAM6_ATOM_SILVERMONT1: +- case INTEL_FAM6_ATOM_MERRIFIELD: +- case INTEL_FAM6_ATOM_MOOREFIELD: +- return 1; +- } +- return 0; + } + + /* diff --git a/queue-4.10/usb-chipidea-msm-rely-on-core-to-override-ahbburst.patch b/queue-4.10/usb-chipidea-msm-rely-on-core-to-override-ahbburst.patch new file mode 100644 index 00000000000..b8abc0a43ec --- /dev/null +++ b/queue-4.10/usb-chipidea-msm-rely-on-core-to-override-ahbburst.patch @@ -0,0 +1,49 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:21 +0000 +Subject: usb: chipidea: msm: Rely on core to override AHBBURST +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-53-alexander.levin@verizon.com> + +From: Stephen Boyd + +[ Upstream commit dd3749099cfa2c80039193c438b90f3160eaf7f9 ] + +The core framework already handles setting this parameter with a +platform quirk. Add the appropriate flag so that we always set +AHBBURST to 0. Technically DT should be doing this, but we always +do it for msm chipidea devices so setting the flag in the driver +works just as well. If the burst needs to be anything besides 0, +we expect the 'ahb-burst-config' dts property to be present. + +Acked-by: Peter Chen +Cc: Greg Kroah-Hartman +Signed-off-by: Stephen Boyd +Signed-off-by: Peter Chen +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/usb/chipidea/ci_hdrc_msm.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/usb/chipidea/ci_hdrc_msm.c ++++ b/drivers/usb/chipidea/ci_hdrc_msm.c +@@ -24,7 +24,6 @@ static void ci_hdrc_msm_notify_event(str + switch (event) { + case CI_HDRC_CONTROLLER_RESET_EVENT: + dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n"); +- writel(0, USB_AHBBURST); + /* use AHB transactor, allow posted data writes */ + writel(0x8, USB_AHBMODE); + usb_phy_init(ci->usb_phy); +@@ -47,7 +46,8 @@ static struct ci_hdrc_platform_data ci_h + .name = "ci_hdrc_msm", + .capoffset = DEF_CAPOFFSET, + .flags = CI_HDRC_REGS_SHARED | +- CI_HDRC_DISABLE_STREAMING, ++ CI_HDRC_DISABLE_STREAMING | ++ CI_HDRC_OVERRIDE_AHB_BURST, + + .notify_event = ci_hdrc_msm_notify_event, + }; diff --git a/queue-4.10/usb-dwc3-host-pass-quirk-broken-port-ped-property-for-known-broken-revisions.patch b/queue-4.10/usb-dwc3-host-pass-quirk-broken-port-ped-property-for-known-broken-revisions.patch new file mode 100644 index 00000000000..364ade346e2 --- /dev/null +++ b/queue-4.10/usb-dwc3-host-pass-quirk-broken-port-ped-property-for-known-broken-revisions.patch @@ -0,0 +1,67 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:25 +0000 +Subject: usb: dwc3: host: pass quirk-broken-port-ped property for known broken revisions +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-62-alexander.levin@verizon.com> + +From: Felipe Balbi + +[ Upstream commit e42a5dbb8a3d14f5a35bffa3bf7dcb87883f767a ] + +dwc3 revisions <=3.00a have a limitation where Port Disable command +doesn't work. Set the quirk-broken-port-ped property for such +controllers so XHCI core can do the necessary workaround. + +[rogerq@ti.com] Updated code from platform data to device property. + +Signed-off-by: Roger Quadros +Signed-off-by: Felipe Balbi +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/usb/dwc3/host.c | 21 ++++++++++++++++++--- + 1 file changed, 18 insertions(+), 3 deletions(-) + +--- a/drivers/usb/dwc3/host.c ++++ b/drivers/usb/dwc3/host.c +@@ -54,11 +54,12 @@ out: + + int dwc3_host_init(struct dwc3 *dwc) + { +- struct property_entry props[2]; ++ struct property_entry props[3]; + struct platform_device *xhci; + int ret, irq; + struct resource *res; + struct platform_device *dwc3_pdev = to_platform_device(dwc->dev); ++ int prop_idx = 0; + + irq = dwc3_host_get_irq(dwc); + if (irq < 0) +@@ -97,8 +98,22 @@ int dwc3_host_init(struct dwc3 *dwc) + + memset(props, 0, sizeof(struct property_entry) * ARRAY_SIZE(props)); + +- if (dwc->usb3_lpm_capable) { +- props[0].name = "usb3-lpm-capable"; ++ if (dwc->usb3_lpm_capable) ++ props[prop_idx++].name = "usb3-lpm-capable"; ++ ++ /** ++ * WORKAROUND: dwc3 revisions <=3.00a have a limitation ++ * where Port Disable command doesn't work. ++ * ++ * The suggested workaround is that we avoid Port Disable ++ * completely. ++ * ++ * This following flag tells XHCI to do just that. ++ */ ++ if (dwc->revision <= DWC3_REVISION_300A) ++ props[prop_idx++].name = "quirk-broken-port-ped"; ++ ++ if (prop_idx) { + ret = platform_device_add_properties(xhci, props); + if (ret) { + dev_err(dwc->dev, "failed to add properties to xHCI\n"); diff --git a/queue-4.10/usb-host-xhci-plat-enable-broken_ped-quirk-if-platform-requested.patch b/queue-4.10/usb-host-xhci-plat-enable-broken_ped-quirk-if-platform-requested.patch new file mode 100644 index 00000000000..20082040c64 --- /dev/null +++ b/queue-4.10/usb-host-xhci-plat-enable-broken_ped-quirk-if-platform-requested.patch @@ -0,0 +1,51 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:24 +0000 +Subject: usb: host: xhci-plat: enable BROKEN_PED quirk if platform requested +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-61-alexander.levin@verizon.com> + +From: Felipe Balbi + +[ Upstream commit 21939f003ad09355d9c975735750bb22aa37d8de ] + +In case 'quirk-broken-port-ped' property is passed in via device property, +we should enable the corresponding BROKEN_PED quirk flag for XHCI core. + +[rogerq@ti.com] Updated code from platform data to device property +and added DT binding. + +Signed-off-by: Felipe Balbi +Signed-off-by: Roger Quadros +Signed-off-by: Mathias Nyman +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + Documentation/devicetree/bindings/usb/usb-xhci.txt | 1 + + drivers/usb/host/xhci-plat.c | 3 +++ + 2 files changed, 4 insertions(+) + +--- a/Documentation/devicetree/bindings/usb/usb-xhci.txt ++++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt +@@ -27,6 +27,7 @@ Required properties: + Optional properties: + - clocks: reference to a clock + - usb3-lpm-capable: determines if platform is USB3 LPM capable ++ - quirk-broken-port-ped: set if the controller has broken port disable mechanism + + Example: + usb@f0931000 { +--- a/drivers/usb/host/xhci-plat.c ++++ b/drivers/usb/host/xhci-plat.c +@@ -232,6 +232,9 @@ static int xhci_plat_probe(struct platfo + if (device_property_read_bool(&pdev->dev, "usb3-lpm-capable")) + xhci->quirks |= XHCI_LPM_SUPPORT; + ++ if (device_property_read_bool(&pdev->dev, "quirk-broken-port-ped")) ++ xhci->quirks |= XHCI_BROKEN_PORT_PED; ++ + hcd->usb_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "usb-phy", 0); + if (IS_ERR(hcd->usb_phy)) { + ret = PTR_ERR(hcd->usb_phy); diff --git a/queue-4.10/usb-musb-da8xx-fix-host-mode-suspend.patch b/queue-4.10/usb-musb-da8xx-fix-host-mode-suspend.patch new file mode 100644 index 00000000000..1af40619c38 --- /dev/null +++ b/queue-4.10/usb-musb-da8xx-fix-host-mode-suspend.patch @@ -0,0 +1,39 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:30 +0000 +Subject: usb: musb: da8xx: Fix host mode suspend +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-76-alexander.levin@verizon.com> + +From: Alexandre Bailon + +[ Upstream commit 486fc20ac8391338a42b015801b846acda4db7b7 ] + +On da8xx, VBUS is not maintained during suspend when musb is in host mode. +On resume, all the connected devices will be disconnected and then will +be enumerated again. +This happens because MUSB_DEVCTL is cleared during suspend. + +Use the quirk MUSB_PRESERVE_SESSION to preseve MUSB_DEVCTL during suspend. + +Signed-off-by: Alexandre Bailon +Signed-off-by: Bin Liu +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/usb/musb/da8xx.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/usb/musb/da8xx.c ++++ b/drivers/usb/musb/da8xx.c +@@ -458,7 +458,7 @@ static inline u8 get_vbus_power(struct d + } + + static const struct musb_platform_ops da8xx_ops = { +- .quirks = MUSB_INDEXED_EP, ++ .quirks = MUSB_INDEXED_EP | MUSB_PRESERVE_SESSION, + .init = da8xx_musb_init, + .exit = da8xx_musb_exit, + diff --git a/queue-4.10/usb-storage-add-ignore-residue-quirk-for-initio-inic-3619.patch b/queue-4.10/usb-storage-add-ignore-residue-quirk-for-initio-inic-3619.patch new file mode 100644 index 00000000000..6b7c7894290 --- /dev/null +++ b/queue-4.10/usb-storage-add-ignore-residue-quirk-for-initio-inic-3619.patch @@ -0,0 +1,52 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:38 +0000 +Subject: usb-storage: Add ignore-residue quirk for Initio INIC-3619 +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-97-alexander.levin@verizon.com> + +From: Tobias Jakobi + +[ Upstream commit d595259fbb7a7afed241b1afb2c4fe4b47de47fa ] + +This USB-SATA bridge chip is used in a StarTech enclosure for +optical drives. + +Without the quirk MakeMKV fails during the key exchange with an +installed BluRay drive: +> Error 'Scsi error - ILLEGAL REQUEST:COPY PROTECTION KEY EXCHANGE FAILURE - KEY NOT ESTABLISHED' +> occurred while issuing SCSI command AD010..080002400 to device 'SG:dev_11:2' + +Signed-off-by: Tobias Jakobi +Acked-by: Alan Stern +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/usb/storage/unusual_devs.h | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +--- a/drivers/usb/storage/unusual_devs.h ++++ b/drivers/usb/storage/unusual_devs.h +@@ -2071,6 +2071,20 @@ UNUSUAL_DEV( 0x1370, 0x6828, 0x0110, 0x + USB_SC_DEVICE, USB_PR_DEVICE, NULL, + US_FL_IGNORE_RESIDUE ), + ++/* ++ * Reported by Tobias Jakobi ++ * The INIC-3619 bridge is used in the StarTech SLSODDU33B ++ * SATA-USB enclosure for slimline optical drives. ++ * ++ * The quirk enables MakeMKV to properly exchange keys with ++ * an installed BD drive. ++ */ ++UNUSUAL_DEV( 0x13fd, 0x3609, 0x0209, 0x0209, ++ "Initio Corporation", ++ "INIC-3619", ++ USB_SC_DEVICE, USB_PR_DEVICE, NULL, ++ US_FL_IGNORE_RESIDUE ), ++ + /* Reported by Qinglin Ye */ + UNUSUAL_DEV( 0x13fe, 0x3600, 0x0100, 0x0100, + "Kingston", diff --git a/queue-4.10/usb-xhci-add-quirk-flag-for-broken-ped-bits.patch b/queue-4.10/usb-xhci-add-quirk-flag-for-broken-ped-bits.patch new file mode 100644 index 00000000000..b921bfb9bd1 --- /dev/null +++ b/queue-4.10/usb-xhci-add-quirk-flag-for-broken-ped-bits.patch @@ -0,0 +1,67 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:24 +0000 +Subject: usb: xhci: add quirk flag for broken PED bits +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-60-alexander.levin@verizon.com> + +From: Felipe Balbi + +[ Upstream commit 41135de1e7fd14c6fcb9158404ba5c8fb97bf259 ] + +Some devices from Texas Instruments [1] suffer from +a silicon bug where Port Enabled/Disabled bit +should not be used to silence an erroneous device. + +The bug is so that if port is disabled with PED +bit, an IRQ for device removal (or attachment) +will never fire. + +Just for the sake of completeness, the actual +problem lies with SNPS USB IP and this affects +all known versions up to 3.00a. A separate +patch will be added to dwc3 to enabled this +quirk flag if version is <= 3.00a. + +[1] - AM572x Silicon Errata http://www.ti.com/lit/er/sprz429j/sprz429j.pdf +Section i896— USB xHCI Port Disable Feature Does Not Work + +Signed-off-by: Felipe Balbi +Signed-off-by: Roger Quadros +Signed-off-by: Mathias Nyman +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/usb/host/xhci-hub.c | 6 ++++++ + drivers/usb/host/xhci.h | 3 +++ + 2 files changed, 9 insertions(+) + +--- a/drivers/usb/host/xhci-hub.c ++++ b/drivers/usb/host/xhci-hub.c +@@ -458,6 +458,12 @@ static void xhci_disable_port(struct usb + return; + } + ++ if (xhci->quirks & XHCI_BROKEN_PORT_PED) { ++ xhci_dbg(xhci, ++ "Broken Port Enabled/Disabled, ignoring port disable request.\n"); ++ return; ++ } ++ + /* Write 1 to disable the port */ + writel(port_status | PORT_PE, addr); + port_status = readl(addr); +--- a/drivers/usb/host/xhci.h ++++ b/drivers/usb/host/xhci.h +@@ -1650,6 +1650,9 @@ struct xhci_hcd { + #define XHCI_SSIC_PORT_UNUSED (1 << 22) + #define XHCI_NO_64BIT_SUPPORT (1 << 23) + #define XHCI_MISSING_CAS (1 << 24) ++/* For controller with a broken Port Disable implementation */ ++#define XHCI_BROKEN_PORT_PED (1 << 25) ++ + unsigned int num_active_eps; + unsigned int limit_active_eps; + /* There are two roothubs to keep track of bus suspend info for */ diff --git a/queue-4.10/watchdog-s3c2410-fix-infinite-interrupt-in-soft-mode.patch b/queue-4.10/watchdog-s3c2410-fix-infinite-interrupt-in-soft-mode.patch new file mode 100644 index 00000000000..f13274eb6bc --- /dev/null +++ b/queue-4.10/watchdog-s3c2410-fix-infinite-interrupt-in-soft-mode.patch @@ -0,0 +1,130 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:35 +0000 +Subject: watchdog: s3c2410: Fix infinite interrupt in soft mode +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-90-alexander.levin@verizon.com> + +From: Krzysztof Kozlowski + +[ Upstream commit 0b445549ea6f91ffea78a976fe89b932db6e077a ] + +In soft (no-reboot) mode, the driver self-pings watchdog upon expiration +of an interrupt. However the interrupt itself was not cleared thus on +first hit, the system enters infinite interrupt handling loop. + +On Odroid U3 (Exynos4412), when booted with s3c2410_wdt.soft_noboot=1 +argument the console is flooded: + # killall -9 watchdog + [ 60.523760] s3c2410-wdt 10060000.watchdog: watchdog timer expired (irq) + [ 60.536744] s3c2410-wdt 10060000.watchdog: watchdog timer expired (irq) + +Fix this by writing something to the WTCLRINT register to clear the +interrupt. The register WTCLRINT however appeared in S3C6410 so a new +watchdog quirk and flavor are needed. + +Signed-off-by: Krzysztof Kozlowski +Reviewed-by: Guenter Roeck +Signed-off-by: Guenter Roeck +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + Documentation/devicetree/bindings/watchdog/samsung-wdt.txt | 9 +++-- + drivers/watchdog/s3c2410_wdt.c | 21 +++++++++++-- + 2 files changed, 23 insertions(+), 7 deletions(-) + +--- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt ++++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt +@@ -6,10 +6,11 @@ occurred. + + Required properties: + - compatible : should be one among the following +- (a) "samsung,s3c2410-wdt" for Exynos4 and previous SoCs +- (b) "samsung,exynos5250-wdt" for Exynos5250 +- (c) "samsung,exynos5420-wdt" for Exynos5420 +- (c) "samsung,exynos7-wdt" for Exynos7 ++ - "samsung,s3c2410-wdt" for S3C2410 ++ - "samsung,s3c6410-wdt" for S3C6410, S5PV210 and Exynos4 ++ - "samsung,exynos5250-wdt" for Exynos5250 ++ - "samsung,exynos5420-wdt" for Exynos5420 ++ - "samsung,exynos7-wdt" for Exynos7 + + - reg : base physical address of the controller and length of memory mapped + region. +--- a/drivers/watchdog/s3c2410_wdt.c ++++ b/drivers/watchdog/s3c2410_wdt.c +@@ -46,6 +46,7 @@ + #define S3C2410_WTCON 0x00 + #define S3C2410_WTDAT 0x04 + #define S3C2410_WTCNT 0x08 ++#define S3C2410_WTCLRINT 0x0c + + #define S3C2410_WTCNT_MAXCNT 0xffff + +@@ -72,6 +73,7 @@ + #define EXYNOS5_WDT_MASK_RESET_REG_OFFSET 0x040c + #define QUIRK_HAS_PMU_CONFIG (1 << 0) + #define QUIRK_HAS_RST_STAT (1 << 1) ++#define QUIRK_HAS_WTCLRINT_REG (1 << 2) + + /* These quirks require that we have a PMU register map */ + #define QUIRKS_HAVE_PMUREG (QUIRK_HAS_PMU_CONFIG | \ +@@ -143,13 +145,18 @@ static const struct s3c2410_wdt_variant + }; + + #ifdef CONFIG_OF ++static const struct s3c2410_wdt_variant drv_data_s3c6410 = { ++ .quirks = QUIRK_HAS_WTCLRINT_REG, ++}; ++ + static const struct s3c2410_wdt_variant drv_data_exynos5250 = { + .disable_reg = EXYNOS5_WDT_DISABLE_REG_OFFSET, + .mask_reset_reg = EXYNOS5_WDT_MASK_RESET_REG_OFFSET, + .mask_bit = 20, + .rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET, + .rst_stat_bit = 20, +- .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT, ++ .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT \ ++ | QUIRK_HAS_WTCLRINT_REG, + }; + + static const struct s3c2410_wdt_variant drv_data_exynos5420 = { +@@ -158,7 +165,8 @@ static const struct s3c2410_wdt_variant + .mask_bit = 0, + .rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET, + .rst_stat_bit = 9, +- .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT, ++ .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT \ ++ | QUIRK_HAS_WTCLRINT_REG, + }; + + static const struct s3c2410_wdt_variant drv_data_exynos7 = { +@@ -167,12 +175,15 @@ static const struct s3c2410_wdt_variant + .mask_bit = 23, + .rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET, + .rst_stat_bit = 23, /* A57 WDTRESET */ +- .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT, ++ .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT \ ++ | QUIRK_HAS_WTCLRINT_REG, + }; + + static const struct of_device_id s3c2410_wdt_match[] = { + { .compatible = "samsung,s3c2410-wdt", + .data = &drv_data_s3c2410 }, ++ { .compatible = "samsung,s3c6410-wdt", ++ .data = &drv_data_s3c6410 }, + { .compatible = "samsung,exynos5250-wdt", + .data = &drv_data_exynos5250 }, + { .compatible = "samsung,exynos5420-wdt", +@@ -418,6 +429,10 @@ static irqreturn_t s3c2410wdt_irq(int ir + dev_info(wdt->dev, "watchdog timer expired (irq)\n"); + + s3c2410wdt_keepalive(&wdt->wdt_device); ++ ++ if (wdt->drv_data->quirks & QUIRK_HAS_WTCLRINT_REG) ++ writel(0x1, wdt->reg_base + S3C2410_WTCLRINT); ++ + return IRQ_HANDLED; + } + diff --git a/queue-4.10/x86-reboot-quirks-add-asus-eeebook-x205ta-reboot-quirk.patch b/queue-4.10/x86-reboot-quirks-add-asus-eeebook-x205ta-reboot-quirk.patch new file mode 100644 index 00000000000..612028f2f7d --- /dev/null +++ b/queue-4.10/x86-reboot-quirks-add-asus-eeebook-x205ta-reboot-quirk.patch @@ -0,0 +1,50 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:37 +0000 +Subject: x86/reboot/quirks: Add ASUS EeeBook X205TA reboot quirk +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-95-alexander.levin@verizon.com> + +From: Matjaz Hegedic + +[ Upstream commit 90b28ded88dda8bea82b4a86923e73ba0746d884 ] + +Without the parameter reboot=a, ASUS EeeBook X205TA will hang when it should reboot. + +This adds the appropriate quirk, thus fixing the problem. + +Signed-off-by: Matjaz Hegedic +Cc: Andy Lutomirski +Cc: Borislav Petkov +Cc: Brian Gerst +Cc: Denys Vlasenko +Cc: H. Peter Anvin +Cc: Josh Poimboeuf +Cc: Linus Torvalds +Cc: Peter Zijlstra +Cc: Thomas Gleixner +Signed-off-by: Ingo Molnar +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + arch/x86/kernel/reboot.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/arch/x86/kernel/reboot.c ++++ b/arch/x86/kernel/reboot.c +@@ -223,6 +223,14 @@ static struct dmi_system_id __initdata r + DMI_MATCH(DMI_BOARD_NAME, "P4S800"), + }, + }, ++ { /* Handle problems with rebooting on ASUS EeeBook X205TA */ ++ .callback = set_acpi_reboot, ++ .ident = "ASUS EeeBook X205TA", ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), ++ DMI_MATCH(DMI_PRODUCT_NAME, "X205TAW"), ++ }, ++ }, + + /* Certec */ + { /* Handle problems with rebooting on Certec BPC600 */ diff --git a/queue-4.10/x86-reboot-quirks-add-asus-eeebook-x205ta-w-reboot-quirk.patch b/queue-4.10/x86-reboot-quirks-add-asus-eeebook-x205ta-w-reboot-quirk.patch new file mode 100644 index 00000000000..2b8860bf7bd --- /dev/null +++ b/queue-4.10/x86-reboot-quirks-add-asus-eeebook-x205ta-w-reboot-quirk.patch @@ -0,0 +1,42 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:38 +0000 +Subject: x86/reboot/quirks: Add ASUS EeeBook X205TA/W reboot quirk +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-96-alexander.levin@verizon.com> + +From: Matjaz Hegedic + +[ Upstream commit 3b3e78552d3077ec70d2640e629e07e3ab416a6a ] + +Without the parameter reboot=a, ASUS EeeBook X205TA/W will hang +when it should reboot. This adds the appropriate quirk, thus +fixing the problem. + +Signed-off-by: Matjaz Hegedic +Link: http://lkml.kernel.org/r/1488737804-20681-1-git-send-email-matjaz.hegedic@gmail.com +Signed-off-by: Thomas Gleixner +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + arch/x86/kernel/reboot.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/arch/x86/kernel/reboot.c ++++ b/arch/x86/kernel/reboot.c +@@ -231,6 +231,14 @@ static struct dmi_system_id __initdata r + DMI_MATCH(DMI_PRODUCT_NAME, "X205TAW"), + }, + }, ++ { /* Handle problems with rebooting on ASUS EeeBook X205TAW */ ++ .callback = set_acpi_reboot, ++ .ident = "ASUS EeeBook X205TAW", ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), ++ DMI_MATCH(DMI_PRODUCT_NAME, "X205TAW"), ++ }, ++ }, + + /* Certec */ + { /* Handle problems with rebooting on Certec BPC600 */ diff --git a/queue-4.10/x86-reboot-quirks-fix-typo-in-asus-eeebook-x205ta-reboot-quirk.patch b/queue-4.10/x86-reboot-quirks-fix-typo-in-asus-eeebook-x205ta-reboot-quirk.patch new file mode 100644 index 00000000000..6d3ee9c3a8c --- /dev/null +++ b/queue-4.10/x86-reboot-quirks-fix-typo-in-asus-eeebook-x205ta-reboot-quirk.patch @@ -0,0 +1,40 @@ +From foo@baz Mon Apr 10 18:08:16 CEST 2017 +From: alexander.levin@verizon.com +Date: Tue, 4 Apr 2017 19:32:38 +0000 +Subject: x86/reboot/quirks: Fix typo in ASUS EeeBook X205TA reboot quirk +To: "gregkh@linuxfoundation.org" +Cc: "stable@vger.kernel.org" +Message-ID: <20170404193158.19041-98-alexander.levin@verizon.com> + +From: Matjaz Hegedic + +[ Upstream commit bba8376aea1dcbbe22bbda118c52abee317c7609 ] + +The reboot quirk for ASUS EeeBook X205TA contains a typo in +DMI_PRODUCT_NAME, improperly referring to X205TAW instead of +X205TA, which prevents the quirk from being triggered. The +model X205TAW already has a reboot quirk of its own. + +This fix simply removes the inappropriate final letter W. + +Fixes: 90b28ded88dd ("x86/reboot/quirks: Add ASUS EeeBook X205TA reboot quirk") +Signed-off-by: Matjaz Hegedic +Link: http://lkml.kernel.org/r/1489064417-7445-1-git-send-email-matjaz.hegedic@gmail.com +Signed-off-by: Thomas Gleixner +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + arch/x86/kernel/reboot.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/x86/kernel/reboot.c ++++ b/arch/x86/kernel/reboot.c +@@ -228,7 +228,7 @@ static struct dmi_system_id __initdata r + .ident = "ASUS EeeBook X205TA", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), +- DMI_MATCH(DMI_PRODUCT_NAME, "X205TAW"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "X205TA"), + }, + }, + { /* Handle problems with rebooting on ASUS EeeBook X205TAW */ -- 2.47.3