From 1467e751b827b4caaa961227c702081bbd052e41 Mon Sep 17 00:00:00 2001 From: Siva Durga Prasad Paladugu Date: Tue, 1 Aug 2017 11:06:15 +0530 Subject: [PATCH] zynqmp: tapdelays: Remove usage of SD0_OTAPDLYENA and SD1_OTAPDLYENA This patch removes usage SD0_OTAPDLYENA and SD1_OTAPDLYENA bits. This bits have impact on functionality of RTL due to one issue in RTL where SD0_OTAPDLYENA (Bit 6) has been wrongly connected to both SD0 and SD1 instances. This makes SD1_OTPDLYENA redundant. Also, these signals are not used anywhere in silicon and hence there is really no need to set these bits. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek --- board/xilinx/zynqmp/tap_delays.c | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/board/xilinx/zynqmp/tap_delays.c b/board/xilinx/zynqmp/tap_delays.c index aa0825a6a9d..9c932915031 100644 --- a/board/xilinx/zynqmp/tap_delays.c +++ b/board/xilinx/zynqmp/tap_delays.c @@ -34,10 +34,6 @@ #define SD1_ITAPDLYSEL_SD_DDR50 0x003D0000 #define SD1_ITAPDLYSEL_MMC_DDR50 0x00120000 -#define SD0_OTAPDLYENA_MASK 0x00000040 -#define SD0_OTAPDLYENA 0x00000040 -#define SD1_OTAPDLYENA_MASK 0x00400000 -#define SD1_OTAPDLYENA 0x00400000 #define SD0_OTAPDLYSEL_MASK 0x0000003F #define SD0_OTAPDLYSEL_MMC_HSD 0x00000006 #define SD0_OTAPDLYSEL_SD_HSD 0x00000005 @@ -90,8 +86,6 @@ static void arasan_zynqmp_tap_sdr104(u8 deviceid, u8 timing, u8 bank) { if (deviceid == 0) { /* Program OTAP */ - zynqmp_mmio_write(SD_OTAP_DLY, SD0_OTAPDLYENA_MASK, - SD0_OTAPDLYENA); if (bank == MMC_BANK2) zynqmp_mmio_write(SD_OTAP_DLY, SD0_OTAPDLYSEL_MASK, SD0_OTAPDLYSEL_SDR104_B2); @@ -100,8 +94,6 @@ static void arasan_zynqmp_tap_sdr104(u8 deviceid, u8 timing, u8 bank) SD0_OTAPDLYSEL_SDR104_B0); } else { /* Program OTAP */ - zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYENA_MASK, - SD1_OTAPDLYENA); if (bank == MMC_BANK2) zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, SD1_OTAPDLYSEL_SDR104_B2); @@ -123,8 +115,6 @@ static void arasan_zynqmp_tap_hs(u8 deviceid, u8 timing, u8 bank) SD0_ITAPDLYSEL_HSD); zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, 0x0); /* Program OTAP */ - zynqmp_mmio_write(SD_OTAP_DLY, SD0_OTAPDLYENA_MASK, - SD0_OTAPDLYENA); if (timing == MMC_TIMING_MMC_HS) zynqmp_mmio_write(SD_OTAP_DLY, SD0_OTAPDLYSEL_MASK, SD0_OTAPDLYSEL_MMC_HSD); @@ -141,8 +131,6 @@ static void arasan_zynqmp_tap_hs(u8 deviceid, u8 timing, u8 bank) SD1_ITAPDLYSEL_HSD); zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK, 0x0); /* Program OTAP */ - zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYENA_MASK, - SD1_OTAPDLYENA); if (timing == MMC_TIMING_MMC_HS) zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, SD1_OTAPDLYSEL_MMC_HSD); @@ -168,8 +156,6 @@ static void arasan_zynqmp_tap_ddr50(u8 deviceid, u8 timing, u8 bank) SD0_ITAPDLYSEL_MMC_DDR50); zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, 0x0); /* Program OTAP */ - zynqmp_mmio_write(SD_OTAP_DLY, SD0_OTAPDLYENA_MASK, - SD0_OTAPDLYENA); if (timing == MMC_TIMING_UHS_DDR50) zynqmp_mmio_write(SD_OTAP_DLY, SD0_OTAPDLYSEL_MASK, SD0_OTAPDLYSEL_SD_DDR50); @@ -190,8 +176,6 @@ static void arasan_zynqmp_tap_ddr50(u8 deviceid, u8 timing, u8 bank) SD1_ITAPDLYSEL_MMC_DDR50); zynqmp_mmio_write(SD_ITAP_DLY, SD1_ITAPCHGWIN_MASK, 0x0); /* Program OTAP */ - zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYENA_MASK, - SD1_OTAPDLYENA); if (timing == MMC_TIMING_UHS_DDR50) zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, SD1_OTAPDLYSEL_SD_DDR50); @@ -205,14 +189,10 @@ static void arasan_zynqmp_tap_sdr50(u8 deviceid, u8 timing, u8 bank) { if (deviceid == 0) { /* Program OTAP */ - zynqmp_mmio_write(SD_OTAP_DLY, SD0_OTAPDLYENA_MASK, - SD0_OTAPDLYENA); zynqmp_mmio_write(SD_OTAP_DLY, SD0_OTAPDLYSEL_MASK, SD0_OTAPDLYSEL_SDR50); } else { /* Program OTAP */ - zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYENA_MASK, - SD1_OTAPDLYENA); zynqmp_mmio_write(SD_OTAP_DLY, SD1_OTAPDLYSEL_MASK, SD1_OTAPDLYSEL_SDR50); } -- 2.47.3