From 158639cb0ce16537ba8df0e274594cdcecb48889 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Mon, 24 Jun 2024 19:48:24 +0200 Subject: [PATCH] 6.1-stable patches added patches: arm64-dts-imx8qm-mek-fix-gpio-number-for-reg_usdhc2_vmmc.patch dt-bindings-i2c-google-cros-ec-i2c-tunnel-correct-path-to-i2c-controller-schema.patch i2c-ocores-set-iack-bit-after-core-is-enabled.patch mips-pci-lantiq-restore-reset-gpio-polarity.patch mm-mmap-allow-for-the-maximum-number-of-bits-for-randomizing-mmap_base-by-default.patch mm-page_table_check-fix-crash-on-zone_device.patch spi-stm32-qspi-clamp-stm32_qspi_get_mode-output-to-ccr_buswidth_4.patch spi-stm32-qspi-fix-dual-flash-mode-sanity-test-in-stm32_qspi_setup.patch tcp-clear-tp-retrans_stamp-in-tcp_rcv_fastopen_synack.patch --- ...-fix-gpio-number-for-reg_usdhc2_vmmc.patch | 32 ++++++++ ...orrect-path-to-i2c-controller-schema.patch | 33 +++++++++ ...s-set-iack-bit-after-core-is-enabled.patch | 39 ++++++++++ ...i-lantiq-restore-reset-gpio-polarity.patch | 73 +++++++++++++++++++ ...for-randomizing-mmap_base-by-default.patch | 70 ++++++++++++++++++ ...table_check-fix-crash-on-zone_device.patch | 71 ++++++++++++++++++ queue-6.1/series | 9 +++ ...pi_get_mode-output-to-ccr_buswidth_4.patch | 35 +++++++++ ...mode-sanity-test-in-stm32_qspi_setup.patch | 52 +++++++++++++ ...ans_stamp-in-tcp_rcv_fastopen_synack.patch | 57 +++++++++++++++ 10 files changed, 471 insertions(+) create mode 100644 queue-6.1/arm64-dts-imx8qm-mek-fix-gpio-number-for-reg_usdhc2_vmmc.patch create mode 100644 queue-6.1/dt-bindings-i2c-google-cros-ec-i2c-tunnel-correct-path-to-i2c-controller-schema.patch create mode 100644 queue-6.1/i2c-ocores-set-iack-bit-after-core-is-enabled.patch create mode 100644 queue-6.1/mips-pci-lantiq-restore-reset-gpio-polarity.patch create mode 100644 queue-6.1/mm-mmap-allow-for-the-maximum-number-of-bits-for-randomizing-mmap_base-by-default.patch create mode 100644 queue-6.1/mm-page_table_check-fix-crash-on-zone_device.patch create mode 100644 queue-6.1/spi-stm32-qspi-clamp-stm32_qspi_get_mode-output-to-ccr_buswidth_4.patch create mode 100644 queue-6.1/spi-stm32-qspi-fix-dual-flash-mode-sanity-test-in-stm32_qspi_setup.patch create mode 100644 queue-6.1/tcp-clear-tp-retrans_stamp-in-tcp_rcv_fastopen_synack.patch diff --git a/queue-6.1/arm64-dts-imx8qm-mek-fix-gpio-number-for-reg_usdhc2_vmmc.patch b/queue-6.1/arm64-dts-imx8qm-mek-fix-gpio-number-for-reg_usdhc2_vmmc.patch new file mode 100644 index 00000000000..ac1f7b3d4e6 --- /dev/null +++ b/queue-6.1/arm64-dts-imx8qm-mek-fix-gpio-number-for-reg_usdhc2_vmmc.patch @@ -0,0 +1,32 @@ +From dfd239a039b3581ca25f932e66b6e2c2bf77c798 Mon Sep 17 00:00:00 2001 +From: Frank Li +Date: Fri, 14 Jun 2024 11:06:32 -0400 +Subject: arm64: dts: imx8qm-mek: fix gpio number for reg_usdhc2_vmmc + +From: Frank Li + +commit dfd239a039b3581ca25f932e66b6e2c2bf77c798 upstream. + +The gpio in "reg_usdhc2_vmmc" should be 7 instead of 19. + +Cc: stable@vger.kernel.org +Fixes: 307fd14d4b14 ("arm64: dts: imx: add imx8qm mek support") +Reviewed-by: Peng Fan +Signed-off-by: Frank Li +Signed-off-by: Shawn Guo +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts ++++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts +@@ -32,7 +32,7 @@ + regulator-name = "SD1_SPWR"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; +- gpio = <&lsio_gpio4 19 GPIO_ACTIVE_HIGH>; ++ gpio = <&lsio_gpio4 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + }; diff --git a/queue-6.1/dt-bindings-i2c-google-cros-ec-i2c-tunnel-correct-path-to-i2c-controller-schema.patch b/queue-6.1/dt-bindings-i2c-google-cros-ec-i2c-tunnel-correct-path-to-i2c-controller-schema.patch new file mode 100644 index 00000000000..5d202edeb9f --- /dev/null +++ b/queue-6.1/dt-bindings-i2c-google-cros-ec-i2c-tunnel-correct-path-to-i2c-controller-schema.patch @@ -0,0 +1,33 @@ +From 5c8cfd592bb7632200b4edac8f2c7ec892ed9d81 Mon Sep 17 00:00:00 2001 +From: Krzysztof Kozlowski +Date: Thu, 20 Jun 2024 13:34:50 +0200 +Subject: dt-bindings: i2c: google,cros-ec-i2c-tunnel: correct path to i2c-controller schema + +From: Krzysztof Kozlowski + +commit 5c8cfd592bb7632200b4edac8f2c7ec892ed9d81 upstream. + +The referenced i2c-controller.yaml schema is provided by dtschema +package (outside of Linux kernel), so use full path to reference it. + +Cc: stable@vger.kernel.org +Fixes: 1acd4577a66f ("dt-bindings: i2c: convert i2c-cros-ec-tunnel to json-schema") +Signed-off-by: Krzysztof Kozlowski +Reviewed-by: Conor Dooley +Signed-off-by: Andi Shyti +Signed-off-by: Greg Kroah-Hartman +--- + Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml ++++ b/Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml +@@ -21,7 +21,7 @@ description: | + google,cros-ec-spi or google,cros-ec-i2c. + + allOf: +- - $ref: i2c-controller.yaml# ++ - $ref: /schemas/i2c/i2c-controller.yaml# + + properties: + compatible: diff --git a/queue-6.1/i2c-ocores-set-iack-bit-after-core-is-enabled.patch b/queue-6.1/i2c-ocores-set-iack-bit-after-core-is-enabled.patch new file mode 100644 index 00000000000..a1e5dadd98b --- /dev/null +++ b/queue-6.1/i2c-ocores-set-iack-bit-after-core-is-enabled.patch @@ -0,0 +1,39 @@ +From 5a72477273066b5b357801ab2d315ef14949d402 Mon Sep 17 00:00:00 2001 +From: Grygorii Tertychnyi +Date: Mon, 20 May 2024 17:39:32 +0200 +Subject: i2c: ocores: set IACK bit after core is enabled + +From: Grygorii Tertychnyi + +commit 5a72477273066b5b357801ab2d315ef14949d402 upstream. + +Setting IACK bit when core is disabled does not clear the "Interrupt Flag" +bit in the status register, and the interrupt remains pending. + +Sometimes it causes failure for the very first message transfer, that is +usually a device probe. + +Hence, set IACK bit after core is enabled to clear pending interrupt. + +Fixes: 18f98b1e3147 ("[PATCH] i2c: New bus driver for the OpenCores I2C controller") +Signed-off-by: Grygorii Tertychnyi +Acked-by: Peter Korsgaard +Cc: stable@vger.kernel.org +Signed-off-by: Andi Shyti +Signed-off-by: Greg Kroah-Hartman +--- + drivers/i2c/busses/i2c-ocores.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/i2c/busses/i2c-ocores.c ++++ b/drivers/i2c/busses/i2c-ocores.c +@@ -442,8 +442,8 @@ static int ocores_init(struct device *de + oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8); + + /* Init the device */ +- oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK); + oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_EN); ++ oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK); + + return 0; + } diff --git a/queue-6.1/mips-pci-lantiq-restore-reset-gpio-polarity.patch b/queue-6.1/mips-pci-lantiq-restore-reset-gpio-polarity.patch new file mode 100644 index 00000000000..d21de2bd82d --- /dev/null +++ b/queue-6.1/mips-pci-lantiq-restore-reset-gpio-polarity.patch @@ -0,0 +1,73 @@ +From 277a0363120276645ae598d8d5fea7265e076ae9 Mon Sep 17 00:00:00 2001 +From: Martin Schiller +Date: Fri, 7 Jun 2024 11:04:00 +0200 +Subject: MIPS: pci: lantiq: restore reset gpio polarity + +From: Martin Schiller + +commit 277a0363120276645ae598d8d5fea7265e076ae9 upstream. + +Commit 90c2d2eb7ab5 ("MIPS: pci: lantiq: switch to using gpiod API") not +only switched to the gpiod API, but also inverted / changed the polarity +of the GPIO. + +According to the PCI specification, the RST# pin is an active-low +signal. However, most of the device trees that have been widely used for +a long time (mainly in the openWrt project) define this GPIO as +active-high and the old driver code inverted the signal internally. + +Apparently there are actually boards where the reset gpio must be +operated inverted. For this reason, we cannot use the GPIOD_OUT_LOW/HIGH +flag for initialization. Instead, we must explicitly set the gpio to +value 1 in order to take into account any "GPIO_ACTIVE_LOW" flag that +may have been set. + +In order to remain compatible with all these existing device trees, we +should therefore keep the logic as it was before the commit. + +Fixes: 90c2d2eb7ab5 ("MIPS: pci: lantiq: switch to using gpiod API") +Cc: stable@vger.kernel.org +Signed-off-by: Martin Schiller +Signed-off-by: Thomas Bogendoerfer +Signed-off-by: Greg Kroah-Hartman +--- + arch/mips/pci/pci-lantiq.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c +index 68a8cefed420..0844db34022e 100644 +--- a/arch/mips/pci/pci-lantiq.c ++++ b/arch/mips/pci/pci-lantiq.c +@@ -124,14 +124,14 @@ static int ltq_pci_startup(struct platform_device *pdev) + clk_disable(clk_external); + + /* setup reset gpio used by pci */ +- reset_gpio = devm_gpiod_get_optional(&pdev->dev, "reset", +- GPIOD_OUT_LOW); ++ reset_gpio = devm_gpiod_get_optional(&pdev->dev, "reset", GPIOD_ASIS); + error = PTR_ERR_OR_ZERO(reset_gpio); + if (error) { + dev_err(&pdev->dev, "failed to request gpio: %d\n", error); + return error; + } + gpiod_set_consumer_name(reset_gpio, "pci_reset"); ++ gpiod_direction_output(reset_gpio, 1); + + /* enable auto-switching between PCI and EBU */ + ltq_pci_w32(0xa, PCI_CR_CLK_CTRL); +@@ -194,10 +194,10 @@ static int ltq_pci_startup(struct platform_device *pdev) + + /* toggle reset pin */ + if (reset_gpio) { +- gpiod_set_value_cansleep(reset_gpio, 1); ++ gpiod_set_value_cansleep(reset_gpio, 0); + wmb(); + mdelay(1); +- gpiod_set_value_cansleep(reset_gpio, 0); ++ gpiod_set_value_cansleep(reset_gpio, 1); + } + return 0; + } +-- +2.45.2 + diff --git a/queue-6.1/mm-mmap-allow-for-the-maximum-number-of-bits-for-randomizing-mmap_base-by-default.patch b/queue-6.1/mm-mmap-allow-for-the-maximum-number-of-bits-for-randomizing-mmap_base-by-default.patch new file mode 100644 index 00000000000..827b1067648 --- /dev/null +++ b/queue-6.1/mm-mmap-allow-for-the-maximum-number-of-bits-for-randomizing-mmap_base-by-default.patch @@ -0,0 +1,70 @@ +From 3afb76a66b5559a7b595155803ce23801558a7a9 Mon Sep 17 00:00:00 2001 +From: Rafael Aquini +Date: Thu, 6 Jun 2024 14:06:22 -0400 +Subject: mm: mmap: allow for the maximum number of bits for randomizing mmap_base by default + +From: Rafael Aquini + +commit 3afb76a66b5559a7b595155803ce23801558a7a9 upstream. + +An ASLR regression was noticed [1] and tracked down to file-mapped areas +being backed by THP in recent kernels. The 21-bit alignment constraint +for such mappings reduces the entropy for randomizing the placement of +64-bit library mappings and breaks ASLR completely for 32-bit libraries. + +The reported issue is easily addressed by increasing vm.mmap_rnd_bits and +vm.mmap_rnd_compat_bits. This patch just provides a simple way to set +ARCH_MMAP_RND_BITS and ARCH_MMAP_RND_COMPAT_BITS to their maximum values +allowed by the architecture at build time. + +[1] https://zolutal.github.io/aslrnt/ + +[akpm@linux-foundation.org: default to `y' if 32-bit, per Rafael] +Link: https://lkml.kernel.org/r/20240606180622.102099-1-aquini@redhat.com +Fixes: 1854bc6e2420 ("mm/readahead: Align file mappings for non-DAX") +Signed-off-by: Rafael Aquini +Cc: Arnd Bergmann +Cc: Heiko Carstens +Cc: Mike Rapoport (IBM) +Cc: Paul E. McKenney +Cc: Petr Mladek +Cc: Samuel Holland +Cc: +Signed-off-by: Andrew Morton +Signed-off-by: Greg Kroah-Hartman +--- + arch/Kconfig | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +--- a/arch/Kconfig ++++ b/arch/Kconfig +@@ -981,10 +981,21 @@ config ARCH_MMAP_RND_BITS_MAX + config ARCH_MMAP_RND_BITS_DEFAULT + int + ++config FORCE_MAX_MMAP_RND_BITS ++ bool "Force maximum number of bits to use for ASLR of mmap base address" ++ default y if !64BIT ++ help ++ ARCH_MMAP_RND_BITS and ARCH_MMAP_RND_COMPAT_BITS represent the number ++ of bits to use for ASLR and if no custom value is assigned (EXPERT) ++ then the architecture's lower bound (minimum) value is assumed. ++ This toggle changes that default assumption to assume the arch upper ++ bound (maximum) value instead. ++ + config ARCH_MMAP_RND_BITS + int "Number of bits to use for ASLR of mmap base address" if EXPERT + range ARCH_MMAP_RND_BITS_MIN ARCH_MMAP_RND_BITS_MAX + default ARCH_MMAP_RND_BITS_DEFAULT if ARCH_MMAP_RND_BITS_DEFAULT ++ default ARCH_MMAP_RND_BITS_MAX if FORCE_MAX_MMAP_RND_BITS + default ARCH_MMAP_RND_BITS_MIN + depends on HAVE_ARCH_MMAP_RND_BITS + help +@@ -1019,6 +1030,7 @@ config ARCH_MMAP_RND_COMPAT_BITS + int "Number of bits to use for ASLR of mmap base address for compatible applications" if EXPERT + range ARCH_MMAP_RND_COMPAT_BITS_MIN ARCH_MMAP_RND_COMPAT_BITS_MAX + default ARCH_MMAP_RND_COMPAT_BITS_DEFAULT if ARCH_MMAP_RND_COMPAT_BITS_DEFAULT ++ default ARCH_MMAP_RND_COMPAT_BITS_MAX if FORCE_MAX_MMAP_RND_BITS + default ARCH_MMAP_RND_COMPAT_BITS_MIN + depends on HAVE_ARCH_MMAP_RND_COMPAT_BITS + help diff --git a/queue-6.1/mm-page_table_check-fix-crash-on-zone_device.patch b/queue-6.1/mm-page_table_check-fix-crash-on-zone_device.patch new file mode 100644 index 00000000000..dd1e13e95f6 --- /dev/null +++ b/queue-6.1/mm-page_table_check-fix-crash-on-zone_device.patch @@ -0,0 +1,71 @@ +From 8bb592c2eca8fd2bc06db7d80b38da18da4a2f43 Mon Sep 17 00:00:00 2001 +From: Peter Xu +Date: Wed, 5 Jun 2024 17:21:46 -0400 +Subject: mm/page_table_check: fix crash on ZONE_DEVICE + +From: Peter Xu + +commit 8bb592c2eca8fd2bc06db7d80b38da18da4a2f43 upstream. + +Not all pages may apply to pgtable check. One example is ZONE_DEVICE +pages: they map PFNs directly, and they don't allocate page_ext at all +even if there's struct page around. One may reference +devm_memremap_pages(). + +When both ZONE_DEVICE and page-table-check enabled, then try to map some +dax memories, one can trigger kernel bug constantly now when the kernel +was trying to inject some pfn maps on the dax device: + + kernel BUG at mm/page_table_check.c:55! + +While it's pretty legal to use set_pxx_at() for ZONE_DEVICE pages for page +fault resolutions, skip all the checks if page_ext doesn't even exist in +pgtable checker, which applies to ZONE_DEVICE but maybe more. + +Link: https://lkml.kernel.org/r/20240605212146.994486-1-peterx@redhat.com +Fixes: df4e817b7108 ("mm: page table check") +Signed-off-by: Peter Xu +Reviewed-by: Pasha Tatashin +Reviewed-by: Dan Williams +Reviewed-by: Alistair Popple +Cc: +Signed-off-by: Andrew Morton +Signed-off-by: Greg Kroah-Hartman +--- + mm/page_table_check.c | 11 ++++++++++- + 1 file changed, 10 insertions(+), 1 deletion(-) + +--- a/mm/page_table_check.c ++++ b/mm/page_table_check.c +@@ -70,6 +70,9 @@ static void page_table_check_clear(struc + page = pfn_to_page(pfn); + page_ext = page_ext_get(page); + ++ if (!page_ext) ++ return; ++ + BUG_ON(PageSlab(page)); + anon = PageAnon(page); + +@@ -108,6 +111,9 @@ static void page_table_check_set(struct + page = pfn_to_page(pfn); + page_ext = page_ext_get(page); + ++ if (!page_ext) ++ return; ++ + BUG_ON(PageSlab(page)); + anon = PageAnon(page); + +@@ -138,7 +144,10 @@ void __page_table_check_zero(struct page + BUG_ON(PageSlab(page)); + + page_ext = page_ext_get(page); +- BUG_ON(!page_ext); ++ ++ if (!page_ext) ++ return; ++ + for (i = 0; i < (1ul << order); i++) { + struct page_table_check *ptc = get_page_table_check(page_ext); + diff --git a/queue-6.1/series b/queue-6.1/series index e19350afb7a..0ca9563f932 100644 --- a/queue-6.1/series +++ b/queue-6.1/series @@ -106,3 +106,12 @@ drm-radeon-fix-ubsan-warning-in-kv_dpm.c.patch drm-amdgpu-fix-ubsan-warning-in-kv_dpm.c.patch gcov-add-support-for-gcc-14.patch kcov-don-t-lose-track-of-remote-references-during-softirqs.patch +mips-pci-lantiq-restore-reset-gpio-polarity.patch +mm-mmap-allow-for-the-maximum-number-of-bits-for-randomizing-mmap_base-by-default.patch +tcp-clear-tp-retrans_stamp-in-tcp_rcv_fastopen_synack.patch +mm-page_table_check-fix-crash-on-zone_device.patch +i2c-ocores-set-iack-bit-after-core-is-enabled.patch +dt-bindings-i2c-google-cros-ec-i2c-tunnel-correct-path-to-i2c-controller-schema.patch +spi-stm32-qspi-fix-dual-flash-mode-sanity-test-in-stm32_qspi_setup.patch +arm64-dts-imx8qm-mek-fix-gpio-number-for-reg_usdhc2_vmmc.patch +spi-stm32-qspi-clamp-stm32_qspi_get_mode-output-to-ccr_buswidth_4.patch diff --git a/queue-6.1/spi-stm32-qspi-clamp-stm32_qspi_get_mode-output-to-ccr_buswidth_4.patch b/queue-6.1/spi-stm32-qspi-clamp-stm32_qspi_get_mode-output-to-ccr_buswidth_4.patch new file mode 100644 index 00000000000..5df9c08b24b --- /dev/null +++ b/queue-6.1/spi-stm32-qspi-clamp-stm32_qspi_get_mode-output-to-ccr_buswidth_4.patch @@ -0,0 +1,35 @@ +From 63deee52811b2f84ed2da55ad47252f0e8145d62 Mon Sep 17 00:00:00 2001 +From: Patrice Chotard +Date: Tue, 18 Jun 2024 15:29:50 +0200 +Subject: spi: stm32: qspi: Clamp stm32_qspi_get_mode() output to CCR_BUSWIDTH_4 + +From: Patrice Chotard + +commit 63deee52811b2f84ed2da55ad47252f0e8145d62 upstream. + +In case usage of OCTAL mode, buswidth parameter can take the value 8. +As return value of stm32_qspi_get_mode() is used to configure fields +of CCR registers that are 2 bits only (fields IMODE, ADMODE, ADSIZE, + DMODE), clamp return value of stm32_qspi_get_mode() to 4. + +Fixes: a557fca630cc ("spi: stm32_qspi: Add transfer_one_message() spi callback") +Cc: stable@vger.kernel.org +Signed-off-by: Patrice Chotard +Link: https://msgid.link/r/20240618132951.2743935-3-patrice.chotard@foss.st.com +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman +--- + drivers/spi/spi-stm32-qspi.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/spi/spi-stm32-qspi.c ++++ b/drivers/spi/spi-stm32-qspi.c +@@ -350,7 +350,7 @@ static int stm32_qspi_wait_poll_status(s + + static int stm32_qspi_get_mode(u8 buswidth) + { +- if (buswidth == 4) ++ if (buswidth >= 4) + return CCR_BUSWIDTH_4; + + return buswidth; diff --git a/queue-6.1/spi-stm32-qspi-fix-dual-flash-mode-sanity-test-in-stm32_qspi_setup.patch b/queue-6.1/spi-stm32-qspi-fix-dual-flash-mode-sanity-test-in-stm32_qspi_setup.patch new file mode 100644 index 00000000000..61caebcebfd --- /dev/null +++ b/queue-6.1/spi-stm32-qspi-fix-dual-flash-mode-sanity-test-in-stm32_qspi_setup.patch @@ -0,0 +1,52 @@ +From c2bd0791c5f02e964402624dfff45ca8995f5397 Mon Sep 17 00:00:00 2001 +From: Patrice Chotard +Date: Tue, 18 Jun 2024 15:29:49 +0200 +Subject: spi: stm32: qspi: Fix dual flash mode sanity test in stm32_qspi_setup() + +From: Patrice Chotard + +commit c2bd0791c5f02e964402624dfff45ca8995f5397 upstream. + +Misplaced parenthesis make test of mode wrong in case mode is equal to +SPI_TX_OCTAL or SPI_RX_OCTAL. + +Simplify this sanity test, if one of this bit is set, property +cs-gpio must be present in DT. + +Fixes: a557fca630cc ("spi: stm32_qspi: Add transfer_one_message() spi callback") +Cc: stable@vger.kernel.org +Signed-off-by: Patrice Chotard +Link: https://msgid.link/r/20240618132951.2743935-2-patrice.chotard@foss.st.com +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman +--- + drivers/spi/spi-stm32-qspi.c | 10 ++++------ + 1 file changed, 4 insertions(+), 6 deletions(-) + +--- a/drivers/spi/spi-stm32-qspi.c ++++ b/drivers/spi/spi-stm32-qspi.c +@@ -654,9 +654,7 @@ static int stm32_qspi_setup(struct spi_d + return -EINVAL; + + mode = spi->mode & (SPI_TX_OCTAL | SPI_RX_OCTAL); +- if ((mode == SPI_TX_OCTAL || mode == SPI_RX_OCTAL) || +- ((mode == (SPI_TX_OCTAL | SPI_RX_OCTAL)) && +- gpiod_count(qspi->dev, "cs") == -ENOENT)) { ++ if (mode && gpiod_count(qspi->dev, "cs") == -ENOENT) { + dev_err(qspi->dev, "spi-rx-bus-width\\/spi-tx-bus-width\\/cs-gpios\n"); + dev_err(qspi->dev, "configuration not supported\n"); + +@@ -677,10 +675,10 @@ static int stm32_qspi_setup(struct spi_d + qspi->cr_reg = CR_APMS | 3 << CR_FTHRES_SHIFT | CR_SSHIFT | CR_EN; + + /* +- * Dual flash mode is only enable in case SPI_TX_OCTAL and SPI_TX_OCTAL +- * are both set in spi->mode and "cs-gpios" properties is found in DT ++ * Dual flash mode is only enable in case SPI_TX_OCTAL or SPI_RX_OCTAL ++ * is set in spi->mode and "cs-gpios" properties is found in DT + */ +- if (mode == (SPI_TX_OCTAL | SPI_RX_OCTAL)) { ++ if (mode) { + qspi->cr_reg |= CR_DFM; + dev_dbg(qspi->dev, "Dual flash mode enable"); + } diff --git a/queue-6.1/tcp-clear-tp-retrans_stamp-in-tcp_rcv_fastopen_synack.patch b/queue-6.1/tcp-clear-tp-retrans_stamp-in-tcp_rcv_fastopen_synack.patch new file mode 100644 index 00000000000..24ff94adae7 --- /dev/null +++ b/queue-6.1/tcp-clear-tp-retrans_stamp-in-tcp_rcv_fastopen_synack.patch @@ -0,0 +1,57 @@ +From 9e046bb111f13461d3f9331e24e974324245140e Mon Sep 17 00:00:00 2001 +From: Eric Dumazet +Date: Fri, 14 Jun 2024 13:06:15 +0000 +Subject: tcp: clear tp->retrans_stamp in tcp_rcv_fastopen_synack() + +From: Eric Dumazet + +commit 9e046bb111f13461d3f9331e24e974324245140e upstream. + +Some applications were reporting ETIMEDOUT errors on apparently +good looking flows, according to packet dumps. + +We were able to root cause the issue to an accidental setting +of tp->retrans_stamp in the following scenario: + +- client sends TFO SYN with data. +- server has TFO disabled, ACKs only SYN but not payload. +- client receives SYNACK covering only SYN. +- tcp_ack() eats SYN and sets tp->retrans_stamp to 0. +- tcp_rcv_fastopen_synack() calls tcp_xmit_retransmit_queue() + to retransmit TFO payload w/o SYN, sets tp->retrans_stamp to "now", + but we are not in any loss recovery state. +- TFO payload is ACKed. +- we are not in any loss recovery state, and don't see any dupacks, + so we don't get to any code path that clears tp->retrans_stamp. +- tp->retrans_stamp stays non-zero for the lifetime of the connection. +- after first RTO, tcp_clamp_rto_to_user_timeout() clamps second RTO + to 1 jiffy due to bogus tp->retrans_stamp. +- on clamped RTO with non-zero icsk_retransmits, retransmits_timed_out() + sets start_ts from tp->retrans_stamp from TFO payload retransmit + hours/days ago, and computes bogus long elapsed time for loss recovery, + and suffers ETIMEDOUT early. + +Fixes: a7abf3cd76e1 ("tcp: consider using standard rtx logic in tcp_rcv_fastopen_synack()") +CC: stable@vger.kernel.org +Co-developed-by: Neal Cardwell +Signed-off-by: Neal Cardwell +Co-developed-by: Yuchung Cheng +Signed-off-by: Yuchung Cheng +Signed-off-by: Eric Dumazet +Link: https://lore.kernel.org/r/20240614130615.396837-1-edumazet@google.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Greg Kroah-Hartman +--- + net/ipv4/tcp_input.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/net/ipv4/tcp_input.c ++++ b/net/ipv4/tcp_input.c +@@ -6146,6 +6146,7 @@ static bool tcp_rcv_fastopen_synack(stru + skb_rbtree_walk_from(data) + tcp_mark_skb_lost(sk, data); + tcp_xmit_retransmit_queue(sk); ++ tp->retrans_stamp = 0; + NET_INC_STATS(sock_net(sk), + LINUX_MIB_TCPFASTOPENACTIVEFAIL); + return true; -- 2.47.3