From 165e4634c31cecdf4888de115a05e4ad04bc7961 Mon Sep 17 00:00:00 2001 From: Quentin Schulz Date: Tue, 28 Oct 2025 17:57:36 +0100 Subject: [PATCH] rockchip: rk3399: fix TIMER_FMODE constant The free running mode is 0 at bit offset 1. User mode is 1 at bit offset 1. Currently, free running mode is 1 at offset 0, which is already the case thanks to TIME_EN. So, this essentially does not change the actual value written to the register as it is TIME_EN | TIMER_FMODE which currently is 0x1 | BIT(0) = 0b1, and will become 0x1 | (0 << 1) = 0b1. Signed-off-by: Quentin Schulz Reviewed-by: Kever Yang --- arch/arm/mach-rockchip/rk3399/rk3399.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 43d151708e4..8687a9347ec 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -61,8 +61,8 @@ struct mm_region *mem_map = rk3399_mem_map; #define TIMER_CONTROL_REG 0x1c #define TIMER_EN 0x1 -#define TIMER_FMODE BIT(0) -#define TIMER_RMODE BIT(1) +#define TIMER_FMODE (0 << 1) +#define TIMER_RMODE (1 << 1) void rockchip_stimer_init(void) { -- 2.47.3