From 16f25c3855d04e30346983c484e1145414969f86 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Tue, 6 Sep 2011 12:55:46 -0700 Subject: [PATCH] 3.0 patches --- ...equest-size-is-valid-on-evergreen-v2.patch | 93 +++++++++++++++++++ ...on-kms-set-a-default-max_pixel_clock.patch | 34 +++++++ ...rrupting-structure-while-waiting-for.patch | 33 +++++++ queue-3.0/series | 3 + 4 files changed, 163 insertions(+) create mode 100644 queue-3.0/drm-radeon-kms-make-sure-pci-max-read-request-size-is-valid-on-evergreen-v2.patch create mode 100644 queue-3.0/drm-radeon-kms-set-a-default-max_pixel_clock.patch create mode 100644 queue-3.0/md-linear-avoid-corrupting-structure-while-waiting-for.patch diff --git a/queue-3.0/drm-radeon-kms-make-sure-pci-max-read-request-size-is-valid-on-evergreen-v2.patch b/queue-3.0/drm-radeon-kms-make-sure-pci-max-read-request-size-is-valid-on-evergreen-v2.patch new file mode 100644 index 00000000000..6814b9c92bc --- /dev/null +++ b/queue-3.0/drm-radeon-kms-make-sure-pci-max-read-request-size-is-valid-on-evergreen-v2.patch @@ -0,0 +1,93 @@ +From d054ac16eeb658bccadb06b12c39cee22243b10f Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Thu, 1 Sep 2011 17:46:15 +0000 +Subject: drm/radeon/kms: make sure pci max read request size is valid on evergreen+ (v2) +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Alex Deucher + +commit d054ac16eeb658bccadb06b12c39cee22243b10f upstream. + +If the bios or OS sets the pci max read request size to 0 or an +invalid value (6,7), it can result in a hang or slowdown. Check +and set it to something sane if it's invalid. + +Fixes: +https://bugzilla.kernel.org/show_bug.cgi?id=42162 + +v2: use pci reg defines from include/linux/pci_regs.h + +Signed-off-by: Alex Deucher +Reviewed-by: Michel Dänzer +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/evergreen.c | 27 +++++++++++++++++++++++++++ + drivers/gpu/drm/radeon/ni.c | 3 +++ + 2 files changed, 30 insertions(+) + +--- a/drivers/gpu/drm/radeon/evergreen.c ++++ b/drivers/gpu/drm/radeon/evergreen.c +@@ -41,6 +41,31 @@ static void evergreen_gpu_init(struct ra + void evergreen_fini(struct radeon_device *rdev); + static void evergreen_pcie_gen2_enable(struct radeon_device *rdev); + ++void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev) ++{ ++ u16 ctl, v; ++ int cap, err; ++ ++ cap = pci_pcie_cap(rdev->pdev); ++ if (!cap) ++ return; ++ ++ err = pci_read_config_word(rdev->pdev, cap + PCI_EXP_DEVCTL, &ctl); ++ if (err) ++ return; ++ ++ v = (ctl & PCI_EXP_DEVCTL_READRQ) >> 12; ++ ++ /* if bios or OS sets MAX_READ_REQUEST_SIZE to an invalid value, fix it ++ * to avoid hangs or perfomance issues ++ */ ++ if ((v == 0) || (v == 6) || (v == 7)) { ++ ctl &= ~PCI_EXP_DEVCTL_READRQ; ++ ctl |= (2 << 12); ++ pci_write_config_word(rdev->pdev, cap + PCI_EXP_DEVCTL, ctl); ++ } ++} ++ + void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc) + { + /* enable the pflip int */ +@@ -1866,6 +1891,8 @@ static void evergreen_gpu_init(struct ra + + WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff)); + ++ evergreen_fix_pci_max_read_req_size(rdev); ++ + cc_gc_shader_pipe_config = RREG32(CC_GC_SHADER_PIPE_CONFIG) & ~2; + + cc_gc_shader_pipe_config |= +--- a/drivers/gpu/drm/radeon/ni.c ++++ b/drivers/gpu/drm/radeon/ni.c +@@ -39,6 +39,7 @@ extern int evergreen_mc_wait_for_idle(st + extern void evergreen_mc_program(struct radeon_device *rdev); + extern void evergreen_irq_suspend(struct radeon_device *rdev); + extern int evergreen_mc_init(struct radeon_device *rdev); ++extern void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev); + + #define EVERGREEN_PFP_UCODE_SIZE 1120 + #define EVERGREEN_PM4_UCODE_SIZE 1376 +@@ -669,6 +670,8 @@ static void cayman_gpu_init(struct radeo + + WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff)); + ++ evergreen_fix_pci_max_read_req_size(rdev); ++ + mc_shared_chmap = RREG32(MC_SHARED_CHMAP); + mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); + diff --git a/queue-3.0/drm-radeon-kms-set-a-default-max_pixel_clock.patch b/queue-3.0/drm-radeon-kms-set-a-default-max_pixel_clock.patch new file mode 100644 index 00000000000..2a35a2334db --- /dev/null +++ b/queue-3.0/drm-radeon-kms-set-a-default-max_pixel_clock.patch @@ -0,0 +1,34 @@ +From 9adceaa5b3d2480e2252c4a7f9c4bd7d66b8c4a2 Mon Sep 17 00:00:00 2001 +From: Dave Airlie +Date: Tue, 30 Aug 2011 20:22:04 +0100 +Subject: drm/radeon/kms: set a default max_pixel_clock + +From: Dave Airlie + +commit 9adceaa5b3d2480e2252c4a7f9c4bd7d66b8c4a2 upstream. + +On some Power rv100 cards, we have no ATY OF table, but we have +no combios table either, and hence we refuse all modes on VGA-0 +since we end up with a 0 max pixel clock. + +Signed-off-by: Dave Airlie +Reviewed-by: Alex Deucher +Reviewed-by: Jerome Glisse +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_clocks.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/gpu/drm/radeon/radeon_clocks.c ++++ b/drivers/gpu/drm/radeon/radeon_clocks.c +@@ -219,6 +219,9 @@ void radeon_get_clock_info(struct drm_de + } else { + DRM_INFO("Using generic clock info\n"); + ++ /* may need to be per card */ ++ rdev->clock.max_pixel_clock = 35000; ++ + if (rdev->flags & RADEON_IS_IGP) { + p1pll->reference_freq = 1432; + p2pll->reference_freq = 1432; diff --git a/queue-3.0/md-linear-avoid-corrupting-structure-while-waiting-for.patch b/queue-3.0/md-linear-avoid-corrupting-structure-while-waiting-for.patch new file mode 100644 index 00000000000..ad0995d791f --- /dev/null +++ b/queue-3.0/md-linear-avoid-corrupting-structure-while-waiting-for.patch @@ -0,0 +1,33 @@ +From 1b6afa17581027218088a18a9ceda600e0ddba7a Mon Sep 17 00:00:00 2001 +From: NeilBrown +Date: Thu, 25 Aug 2011 14:43:53 +1000 +Subject: md/linear: avoid corrupting structure while waiting for rcu_free to complete. + +From: NeilBrown + +commit 1b6afa17581027218088a18a9ceda600e0ddba7a upstream. + +I don't know what I was thinking putting 'rcu' after a dynamically +sized array! The array could still be in use when we call rcu_free() +(That is the point) so we mustn't corrupt it. + +Signed-off-by: NeilBrown +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/md/linear.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/md/linear.h ++++ b/drivers/md/linear.h +@@ -10,9 +10,9 @@ typedef struct dev_info dev_info_t; + + struct linear_private_data + { ++ struct rcu_head rcu; + sector_t array_sectors; + dev_info_t disks[0]; +- struct rcu_head rcu; + }; + + diff --git a/queue-3.0/series b/queue-3.0/series index 414fd970578..f4377b86878 100644 --- a/queue-3.0/series +++ b/queue-3.0/series @@ -47,3 +47,6 @@ sparc64-only-panther-cheetah-chips-have-popc.patch drm-radeon-kms-add-s-r-quirk-for-compaq-presario-v5245eu.patch drm-radeon-kms-evergreen-ni-reset-spi-block-on-cp-resume.patch arm-7014-1-cache-l2x0-fix-l2-cache-size-calculation.patch +md-linear-avoid-corrupting-structure-while-waiting-for.patch +drm-radeon-kms-set-a-default-max_pixel_clock.patch +drm-radeon-kms-make-sure-pci-max-read-request-size-is-valid-on-evergreen-v2.patch -- 2.47.3