From 1a9480e4fe7b18109793cfd7e9cf49e596661351 Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Fri, 15 Aug 2025 18:23:17 +0800 Subject: [PATCH] arm64: dts: imx8mn-evk: support more sample rates for wm8524 card The wm8524 codec is connected to the SAI interface. There are two audio plls on i.MX8MN, one pll can be the clock source of 44kHz series rates, another pll can be clock source of 48kHz series rates. Previously it only supported 48kHz series rates, with this change the supported rates will include 44kHz series rates, from 8kHz to 192kHz. Signed-off-by: Shengjiu Wang Reviewed-by: Peng Fan Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi index 33d73f3dc1875..145355ff91b45 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi @@ -387,6 +387,11 @@ assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>; assigned-clock-rates = <24576000>; fsl,sai-mclk-direction-output; + clocks = <&clk IMX8MN_CLK_SAI3_IPG>, <&clk IMX8MN_CLK_DUMMY>, + <&clk IMX8MN_CLK_SAI3_ROOT>, <&clk IMX8MN_CLK_DUMMY>, + <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_AUDIO_PLL1_OUT>, + <&clk IMX8MN_AUDIO_PLL2_OUT>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k"; status = "okay"; }; -- 2.47.3