From 1e54cf1f383adde02e49ccc9bb0cb9d3b0662a1e Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 22 Aug 2025 14:04:12 +0200 Subject: [PATCH] ARM: dts: qcom: apq8064: Add default GIC address cells Add missing address-cells 0 to GIC interrupt node to silence W=1 warning: qcom-apq8064.dtsi:1353.4-1356.29: Warning (interrupt_map): /soc/pcie@1b500000:interrupt-map: Missing property '#address-cells' in node /soc/interrupt-controller@2000000, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0). Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-12-d54d44b74460@linaro.org Signed-off-by: Bjorn Andersson --- arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi index 17e506ca2438b..4c9743423ea88 100644 --- a/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-apq8064.dtsi @@ -342,6 +342,7 @@ intc: interrupt-controller@2000000 { compatible = "qcom,msm-qgic2"; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <3>; reg = <0x02000000 0x1000>, <0x02002000 0x1000>; -- 2.47.3