From 35a5e8792046df64df10550cd7de4bbc0a2c1018 Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Sat, 4 Oct 2025 13:00:48 -0700 Subject: [PATCH] hw/net/cadence_gem: Add pcs-enabled property The Linux kernel checks the PCS disabled bit in the R_DESCONF register to determine if SGMII is supported. If the bit is set, SGMII support is disabled. Since the Microchip Icicle devicetree file configures SGMII interface mode, enabling the Ethernet interfaces fails when booting the Linux kernel. Add pcs-enabled property to to let the driver know if PCS should be enabled. Set the flag to false by default (indicating that PCS is disabled) to match the exiting code. Signed-off-by: Guenter Roeck Acked-by: Alistair Francis Message-ID: <20251004200049.871646-4-linux@roeck-us.net> Signed-off-by: Alistair Francis --- hw/net/cadence_gem.c | 7 ++++++- include/hw/net/cadence_gem.h | 1 + 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 520324adfd..44896f1801 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c @@ -1477,7 +1477,10 @@ static void gem_reset(DeviceState *d) s->regs[R_TXPARTIALSF] = 0x000003ff; s->regs[R_RXPARTIALSF] = 0x000003ff; s->regs[R_MODID] = s->revision; - s->regs[R_DESCONF] = 0x02D00111; + s->regs[R_DESCONF] = 0x02D00110; + if (!s->pcs_enabled) { + s->regs[R_DESCONF] |= 0x00000001; + } s->regs[R_DESCONF2] = 0x2ab10000 | s->jumbo_max_len; s->regs[R_DESCONF5] = 0x002f2045; s->regs[R_DESCONF6] = R_DESCONF6_DMA_ADDR_64B_MASK; @@ -1821,6 +1824,8 @@ static const Property gem_properties[] = { num_type2_screeners, 4), DEFINE_PROP_UINT16("jumbo-max-len", CadenceGEMState, jumbo_max_len, 10240), + DEFINE_PROP_BOOL("pcs-enabled", CadenceGEMState, + pcs_enabled, false), DEFINE_PROP_BOOL("phy-connected", CadenceGEMState, phy_connected, true), DEFINE_PROP_LINK("phy-consumer", CadenceGEMState, phy_consumer, TYPE_CADENCE_GEM, CadenceGEMState *), diff --git a/include/hw/net/cadence_gem.h b/include/hw/net/cadence_gem.h index 21e7319f53..e63941f18f 100644 --- a/include/hw/net/cadence_gem.h +++ b/include/hw/net/cadence_gem.h @@ -62,6 +62,7 @@ struct CadenceGEMState { uint8_t num_type2_screeners; uint32_t revision; uint16_t jumbo_max_len; + bool pcs_enabled; /* GEM registers backing store */ uint32_t regs[CADENCE_GEM_MAXREG]; -- 2.47.3