From 378a437a49dd3d17a9a544768051b2336e5ed874 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Mon, 16 Jan 2017 12:07:33 +0100 Subject: [PATCH] arm64: zynqmp: Add support for QSPI boot This patch is enabling support for SPL QSPI boot. First of all it is necessary to generate atf-spi.ub which is different format than atf-uboot.ub (this can be made as legacy image too) ADDR=`arm-xilinx-linux-gnueabi-readelf -a bl31.elf | grep "Entry point address" | cut -d ':' -f 2 | sed -e 's/^[ \t]*//'` aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin ./tools/mkimage -f auto -A arm64 -T firmware -C none -O u-boot -a $ADDR -e $ADDR -n "atf1" -E -b arch/arm/dts/zynqmp-zcu102.dtb -d bl31.bin atf-uboot.ub ./tools/mkimage -A arm64 -T firmware -C none -O u-boot -a $ADDR -e $ADDR -n "atf-for-qspi" -E -d bl31.bin atf-spi.ub This patch is using this QSPI layout with offsets: 0 boot.bin 512k atf-ub 640k u-boot.bin 1280k u-boot.img Which corresponding by writing these images(read from MMC) mmcinfo sf probe load mmc 0 10000000 boot.bin sf erase 0 +$filesize sf write 10000000 0 $filesize load mmc 0 10000000 atf-spi.ub sf erase 0x80000 +$filesize sf write 10000000 0x80000 $filesize load mmc 0 10000000 u-boot.bin sf erase 0xa0000 +$filesize sf write 10000000 0xa0000 $filesize load mmc 0 10000000 u-boot.img sf erase 0x140000 +$filesize sf write 10000000 0x140000 $filesize For testing u-boot running in EL3 you can break atf-spi.ub like this: sf probe sf erase 0x80000 +4 Then u-boot.img is executed. Signed-off-by: Michal Simek --- arch/arm/cpu/armv8/zynqmp/spl.c | 5 +++++ arch/arm/dts/zynqmp.dtsi | 1 + configs/xilinx_zynqmp_zcu102_defconfig | 2 ++ include/configs/xilinx_zynqmp.h | 7 +++++++ 4 files changed, 15 insertions(+) diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c index 0a5f4306e82..c9fe260c8da 100644 --- a/arch/arm/cpu/armv8/zynqmp/spl.c +++ b/arch/arm/cpu/armv8/zynqmp/spl.c @@ -95,6 +95,11 @@ u32 spl_boot_device(void) #ifdef CONFIG_SPL_SATA_SUPPORT case SW_SATA_MODE: return BOOT_DEVICE_SATA; +#endif +#ifdef CONFIG_SPL_SPI_SUPPORT + case QSPI_MODE_24BIT: + case QSPI_MODE_32BIT: + return BOOT_DEVICE_SPI; #endif default: printf("Invalid Boot Mode:0x%x\n", bootmode); diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index e2e76d70fd3..41df83d040a 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -701,6 +701,7 @@ }; qspi: spi@ff0f0000 { + u-boot,dm-pre-reloc; compatible = "xlnx,zynqmp-qspi-1.0"; status = "disabled"; clock-names = "ref_clk", "pclk"; diff --git a/configs/xilinx_zynqmp_zcu102_defconfig b/configs/xilinx_zynqmp_zcu102_defconfig index 3c2f8adb89e..ee2c9484c97 100644 --- a/configs/xilinx_zynqmp_zcu102_defconfig +++ b/configs/xilinx_zynqmp_zcu102_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y CONFIG_ZYNQMP_QSPI=y CONFIG_ZYNQMP_USB=y CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102" diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index ca77b388a51..7727bda2aaf 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -385,6 +385,13 @@ #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_RAM_DEVICE +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SYS_SPI_KERNEL_OFFS 0x80000 +#define CONFIG_SYS_SPI_ARGS_OFFS 0xa0000 +#define CONFIG_SYS_SPI_ARGS_SIZE 0xa0000 + +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000 + /* u-boot is like dtb */ #define CONFIG_SPL_FS_LOAD_ARGS_NAME "u-boot.bin" #define CONFIG_SYS_SPL_ARGS_ADDR 0x8000000 -- 2.47.3