From 4121d4ee74fe27e0e7f55e6f39c04c6fcf1e76f1 Mon Sep 17 00:00:00 2001 From: Jamin Lin Date: Tue, 4 Nov 2025 11:12:50 +0800 Subject: [PATCH] hw/arm/aspeed: Split Supermicro X11SPI machine into a separate file for maintainability MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit This commit moves the Supermicro X11SPI BMC machine definition from aspeed.c into a new standalone file aspeed_ast2500_supermicro-x11spi.c, and adds a dedicated I²C initialization function for the platform. The refactor continues the effort to modularize Aspeed platform support, ensuring each machine model is defined in its own source file. This improves code organization, readability, and simplifies maintenance when adding or modifying platform-specific behavior. Previously, the Supermicro X11SPI machine reused palmetto_bmc_i2c_init() for its I²C setup. To make the machine definition fully self-contained, the function was copied and renamed to supermicro_x11spi_bmc_i2c_init(). This ensures that the machine can evolve independently without depending on Palmetto’s board logi Key updates include: - Moved SUPERMICRO_X11SPI_BMC_HW_STRAP1 macro and machine class init (aspeed_machine_supermicro_x11spi_bmc_class_init) into a new file. - Added new function supermicro_x11spi_bmc_i2c_init() copied from palmetto_bmc_i2c_init() for independent control. - Updated the machine definition to use the new I²C init function. - Registered the new source file in meson.build. - Removed all Supermicro X11SPI-related definitions from aspeed.c. No functional changes. Signed-off-by: Jamin Lin Reviewed-by: Cédric Le Goater Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-13-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater --- hw/arm/aspeed.c | 33 ---------- hw/arm/aspeed_ast2500_supermicro-x11spi.c | 77 +++++++++++++++++++++++ hw/arm/meson.build | 1 + 3 files changed, 78 insertions(+), 33 deletions(-) create mode 100644 hw/arm/aspeed_ast2500_supermicro-x11spi.c diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index c31b281f55..e1fa95b2c3 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -71,16 +71,6 @@ static struct arm_boot_info aspeed_board_binfo = { SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) -/* TODO: Find the actual hardware value */ -#define SUPERMICRO_X11SPI_BMC_HW_STRAP1 ( \ - AST2500_HW_STRAP1_DEFAULTS | \ - SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ - SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ - SCU_AST2500_HW_STRAP_UART_DEBUG | \ - SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ - SCU_HW_STRAP_SPI_WIDTH | \ - SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN)) - /* AST2500 evb hardware value: 0xF100C2E6 */ #define AST2500_EVB_HW_STRAP1 (( \ AST2500_HW_STRAP1_DEFAULTS | \ @@ -1187,24 +1177,6 @@ static void aspeed_machine_supermicrox11_bmc_class_init(ObjectClass *oc, aspeed_machine_class_init_cpus_defaults(mc); } -static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc, - const void *data) -{ - MachineClass *mc = MACHINE_CLASS(oc); - AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); - - mc->desc = "Supermicro X11 SPI BMC (ARM1176)"; - amc->soc_name = "ast2500-a1"; - amc->hw_strap1 = SUPERMICRO_X11SPI_BMC_HW_STRAP1; - amc->fmc_model = "mx25l25635e"; - amc->spi_model = "mx25l25635e"; - amc->num_cs = 1; - amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; - amc->i2c_init = palmetto_bmc_i2c_init; - mc->default_ram_size = 512 * MiB; - aspeed_machine_class_init_cpus_defaults(mc); -} - static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, const void *data) { @@ -1577,11 +1549,6 @@ static const TypeInfo aspeed_machine_types[] = { .parent = TYPE_ASPEED_MACHINE, .class_init = aspeed_machine_supermicrox11_bmc_class_init, .interfaces = arm_machine_interfaces, - }, { - .name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"), - .parent = TYPE_ASPEED_MACHINE, - .class_init = aspeed_machine_supermicro_x11spi_bmc_class_init, - .interfaces = arm_machine_interfaces, }, { .name = MACHINE_TYPE_NAME("ast2500-evb"), .parent = TYPE_ASPEED_MACHINE, diff --git a/hw/arm/aspeed_ast2500_supermicro-x11spi.c b/hw/arm/aspeed_ast2500_supermicro-x11spi.c new file mode 100644 index 0000000000..a2450aa962 --- /dev/null +++ b/hw/arm/aspeed_ast2500_supermicro-x11spi.c @@ -0,0 +1,77 @@ +/* + * Supermicro X11 SPI + * + * Copyright 2016 IBM Corp. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/arm/machines-qom.h" +#include "hw/arm/aspeed.h" +#include "hw/arm/aspeed_soc.h" +#include "hw/i2c/smbus_eeprom.h" + +/* TODO: Find the actual hardware value */ +#define SUPERMICRO_X11SPI_BMC_HW_STRAP1 ( \ + AST2500_HW_STRAP1_DEFAULTS | \ + SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ + SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ + SCU_AST2500_HW_STRAP_UART_DEBUG | \ + SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ + SCU_HW_STRAP_SPI_WIDTH | \ + SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN)) + +static void supermicro_x11spi_bmc_i2c_init(AspeedMachineState *bmc) +{ + AspeedSoCState *soc = bmc->soc; + DeviceState *dev; + uint8_t *eeprom_buf = g_malloc0(32 * 1024); + + /* + * The palmetto platform expects a ds3231 RTC but a ds1338 is + * enough to provide basic RTC features. Alarms will be missing + */ + i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 0), "ds1338", 0x68); + + smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 0), 0x50, + eeprom_buf); + + /* add a TMP423 temperature sensor */ + dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), + "tmp423", 0x4c)); + object_property_set_int(OBJECT(dev), "temperature0", 31000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature1", 28000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature2", 20000, &error_abort); + object_property_set_int(OBJECT(dev), "temperature3", 110000, &error_abort); +} + +static void aspeed_machine_supermicro_x11spi_bmc_class_init(ObjectClass *oc, + const void *data) +{ + MachineClass *mc = MACHINE_CLASS(oc); + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); + + mc->desc = "Supermicro X11 SPI BMC (ARM1176)"; + amc->soc_name = "ast2500-a1"; + amc->hw_strap1 = SUPERMICRO_X11SPI_BMC_HW_STRAP1; + amc->fmc_model = "mx25l25635e"; + amc->spi_model = "mx25l25635e"; + amc->num_cs = 1; + amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON; + amc->i2c_init = supermicro_x11spi_bmc_i2c_init; + mc->default_ram_size = 512 * MiB; + aspeed_machine_class_init_cpus_defaults(mc); +} + +static const TypeInfo aspeed_ast2500_supermicro_x11spi_types[] = { + { + .name = MACHINE_TYPE_NAME("supermicro-x11spi-bmc"), + .parent = TYPE_ASPEED_MACHINE, + .class_init = aspeed_machine_supermicro_x11spi_bmc_class_init, + .interfaces = arm_machine_interfaces, + } +}; + +DEFINE_TYPES(aspeed_ast2500_supermicro_x11spi_types) diff --git a/hw/arm/meson.build b/hw/arm/meson.build index ff6a856523..76a456c33f 100644 --- a/hw/arm/meson.build +++ b/hw/arm/meson.build @@ -48,6 +48,7 @@ arm_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files( 'aspeed_ast2500_g220a.c', 'aspeed_ast2500_romulus.c', 'aspeed_ast2500_sonorapass.c', + 'aspeed_ast2500_supermicro-x11spi.c', 'aspeed_ast2500_tiogapass.c', 'aspeed_ast2500_witherspoon.c', 'aspeed_ast2500_yosemitev2.c', -- 2.47.3