From 434668cf3e1958bf74318613eefc57c681283316 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 4 Aug 2023 12:47:13 +0200 Subject: [PATCH] 6.4-stable patches added patches: iommu-arm-smmu-v3-add-explicit-feature-for-nesting.patch iommu-arm-smmu-v3-document-mmu-700-erratum-2812531.patch iommu-arm-smmu-v3-document-nesting-related-errata.patch iommu-arm-smmu-v3-work-around-mmu-600-erratum-1076982.patch --- ...-v3-add-explicit-feature-for-nesting.patch | 52 +++++++++ ...-v3-document-mmu-700-erratum-2812531.patch | 103 ++++++++++++++++++ ...u-v3-document-nesting-related-errata.patch | 62 +++++++++++ ...-work-around-mmu-600-erratum-1076982.patch | 103 ++++++++++++++++++ queue-6.4/series | 4 + 5 files changed, 324 insertions(+) create mode 100644 queue-6.4/iommu-arm-smmu-v3-add-explicit-feature-for-nesting.patch create mode 100644 queue-6.4/iommu-arm-smmu-v3-document-mmu-700-erratum-2812531.patch create mode 100644 queue-6.4/iommu-arm-smmu-v3-document-nesting-related-errata.patch create mode 100644 queue-6.4/iommu-arm-smmu-v3-work-around-mmu-600-erratum-1076982.patch diff --git a/queue-6.4/iommu-arm-smmu-v3-add-explicit-feature-for-nesting.patch b/queue-6.4/iommu-arm-smmu-v3-add-explicit-feature-for-nesting.patch new file mode 100644 index 00000000000..d2af798c916 --- /dev/null +++ b/queue-6.4/iommu-arm-smmu-v3-add-explicit-feature-for-nesting.patch @@ -0,0 +1,52 @@ +From stable-owner@vger.kernel.org Wed Aug 2 19:27:04 2023 +From: Easwar Hariharan +Date: Wed, 2 Aug 2023 17:26:19 +0000 +Subject: iommu/arm-smmu-v3: Add explicit feature for nesting +To: stable@vger.kernel.org +Cc: easwar.hariharan@microsoft.com, "Robin Murphy" , "Nicolin Chen" , "Will Deacon" , "Joerg Roedel" , "Lu Baolu" , "Jean-Philippe Brucker" , "Uwe Kleine-König" , "Vladimir Oltean" , "Yicong Yang" , "Tomas Krcka" , "Kirill A. Shutemov" , linux-arm-kernel@lists.infradead.org (moderated list:ARM SMMU DRIVERS), iommu@lists.linux.dev (open list:IOMMU SUBSYSTEM), linux-kernel@vger.kernel.org (open list) +Message-ID: <20230802172620.1628017-4-eahariha@linux.microsoft.com> + +From: Robin Murphy + +commit 1d9777b9f3d55b4b6faf186ba4f1d6fb560c0523 upstream + +In certain cases we may want to refuse to allow nested translation even +when both stages are implemented, so let's add an explicit feature for +nesting support which we can control in its own right. For now this +merely serves as documentation, but it means a nice convenient check +will be ready and waiting for the future nesting code. + +Signed-off-by: Robin Murphy +Reviewed-by: Nicolin Chen +Link: https://lore.kernel.org/r/136c3f4a3a84cc14a5a1978ace57dfd3ed67b688.1683731256.git.robin.murphy@arm.com +Signed-off-by: Will Deacon +Signed-off-by: Easwar Hariharan +Signed-off-by: Greg Kroah-Hartman +--- + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 4 ++++ + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + + 2 files changed, 5 insertions(+) + +--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c ++++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +@@ -3674,6 +3674,10 @@ static int arm_smmu_device_hw_probe(stru + + smmu->ias = max(smmu->ias, smmu->oas); + ++ if ((smmu->features & ARM_SMMU_FEAT_TRANS_S1) && ++ (smmu->features & ARM_SMMU_FEAT_TRANS_S2)) ++ smmu->features |= ARM_SMMU_FEAT_NESTING; ++ + arm_smmu_device_iidr_probe(smmu); + + if (arm_smmu_sva_supported(smmu)) +--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h ++++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +@@ -645,6 +645,7 @@ struct arm_smmu_device { + #define ARM_SMMU_FEAT_BTM (1 << 16) + #define ARM_SMMU_FEAT_SVA (1 << 17) + #define ARM_SMMU_FEAT_E2H (1 << 18) ++#define ARM_SMMU_FEAT_NESTING (1 << 19) + u32 features; + + #define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0) diff --git a/queue-6.4/iommu-arm-smmu-v3-document-mmu-700-erratum-2812531.patch b/queue-6.4/iommu-arm-smmu-v3-document-mmu-700-erratum-2812531.patch new file mode 100644 index 00000000000..bfc66e8d6ad --- /dev/null +++ b/queue-6.4/iommu-arm-smmu-v3-document-mmu-700-erratum-2812531.patch @@ -0,0 +1,103 @@ +From stable-owner@vger.kernel.org Wed Aug 2 19:26:56 2023 +From: Easwar Hariharan +Date: Wed, 2 Aug 2023 17:26:18 +0000 +Subject: iommu/arm-smmu-v3: Document MMU-700 erratum 2812531 +To: stable@vger.kernel.org +Cc: easwar.hariharan@microsoft.com, "Robin Murphy" , "Nicolin Chen" , "Will Deacon" , "Catalin Marinas" , "Jonathan Corbet" , "Joerg Roedel" , "Lu Baolu" , "Jason Gunthorpe" , "Uwe Kleine-König" , "Jean-Philippe Brucker" , "Yicong Yang" , "Tomas Krcka" , "Kirill A. Shutemov" , linux-arm-kernel@lists.infradead.org (moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)), linux-doc@vger.kernel.org (open list:DOCUMENTATION), linux-kernel@vger.kernel.org (open list), iommu@lists.linux.dev (open list:IOMMU SUBSYSTEM) +Message-ID: <20230802172620.1628017-3-eahariha@linux.microsoft.com> + +From: Robin Murphy + +commit 309a15cb16bb075da1c99d46fb457db6a1a2669e upstream + +To work around MMU-700 erratum 2812531 we need to ensure that certain +sequences of commands cannot be issued without an intervening sync. In +practice this falls out of our current command-batching machinery +anyway - each batch only contains a single type of invalidation command, +and ends with a sync. The only exception is when a batch is sufficiently +large to need issuing across multiple command queue slots, wherein the +earlier slots will not contain a sync and thus may in theory interleave +with another batch being issued in parallel to create an affected +sequence across the slot boundary. + +Since MMU-700 supports range invalidate commands and thus we will prefer +to use them (which also happens to avoid conditions for other errata), +I'm not entirely sure it's even possible for a single high-level +invalidate call to generate a batch of more than 63 commands, but for +the sake of robustness and documentation, wire up an option to enforce +that a sync is always inserted for every slot issued. + +The other aspect is that the relative order of DVM commands cannot be +controlled, so DVM cannot be used. Again that is already the status quo, +but since we have at least defined ARM_SMMU_FEAT_BTM, we can explicitly +disable it for documentation purposes even if it's not wired up anywhere +yet. + +Signed-off-by: Robin Murphy +Reviewed-by: Nicolin Chen +Link: https://lore.kernel.org/r/330221cdfd0003cd51b6c04e7ff3566741ad8374.1683731256.git.robin.murphy@arm.com +Signed-off-by: Will Deacon +Signed-off-by: Easwar Hariharan +Signed-off-by: Greg Kroah-Hartman +--- + Documentation/arm64/silicon-errata.rst | 2 ++ + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 12 ++++++++++++ + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + + 3 files changed, 15 insertions(+) + +--- a/Documentation/arm64/silicon-errata.rst ++++ b/Documentation/arm64/silicon-errata.rst +@@ -145,6 +145,8 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | MMU-600 | #1076982 | N/A | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | MMU-700 | #2812531 | N/A | +++----------------+-----------------+-----------------+-----------------------------+ + +----------------+-----------------+-----------------+-----------------------------+ + | Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 | + +----------------+-----------------+-----------------+-----------------------------+ +--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c ++++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +@@ -894,6 +894,12 @@ static void arm_smmu_cmdq_batch_add(stru + { + int index; + ++ if (cmds->num == CMDQ_BATCH_ENTRIES - 1 && ++ (smmu->options & ARM_SMMU_OPT_CMDQ_FORCE_SYNC)) { ++ arm_smmu_cmdq_issue_cmdlist(smmu, cmds->cmds, cmds->num, true); ++ cmds->num = 0; ++ } ++ + if (cmds->num == CMDQ_BATCH_ENTRIES) { + arm_smmu_cmdq_issue_cmdlist(smmu, cmds->cmds, cmds->num, false); + cmds->num = 0; +@@ -3431,6 +3437,7 @@ static int arm_smmu_device_reset(struct + + #define IIDR_IMPLEMENTER_ARM 0x43b + #define IIDR_PRODUCTID_ARM_MMU_600 0x483 ++#define IIDR_PRODUCTID_ARM_MMU_700 0x487 + + static void arm_smmu_device_iidr_probe(struct arm_smmu_device *smmu) + { +@@ -3451,6 +3458,11 @@ static void arm_smmu_device_iidr_probe(s + if (variant == 0 && revision <= 2) + smmu->features &= ~ARM_SMMU_FEAT_SEV; + break; ++ case IIDR_PRODUCTID_ARM_MMU_700: ++ /* Arm erratum 2812531 */ ++ smmu->features &= ~ARM_SMMU_FEAT_BTM; ++ smmu->options |= ARM_SMMU_OPT_CMDQ_FORCE_SYNC; ++ break; + } + break; + } +--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h ++++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +@@ -650,6 +650,7 @@ struct arm_smmu_device { + #define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0) + #define ARM_SMMU_OPT_PAGE0_REGS_ONLY (1 << 1) + #define ARM_SMMU_OPT_MSIPOLL (1 << 2) ++#define ARM_SMMU_OPT_CMDQ_FORCE_SYNC (1 << 3) + u32 options; + + struct arm_smmu_cmdq cmdq; diff --git a/queue-6.4/iommu-arm-smmu-v3-document-nesting-related-errata.patch b/queue-6.4/iommu-arm-smmu-v3-document-nesting-related-errata.patch new file mode 100644 index 00000000000..fe8a7f89359 --- /dev/null +++ b/queue-6.4/iommu-arm-smmu-v3-document-nesting-related-errata.patch @@ -0,0 +1,62 @@ +From stable-owner@vger.kernel.org Wed Aug 2 19:27:14 2023 +From: Easwar Hariharan +Date: Wed, 2 Aug 2023 17:26:20 +0000 +Subject: iommu/arm-smmu-v3: Document nesting-related errata +To: stable@vger.kernel.org +Cc: easwar.hariharan@microsoft.com, "Robin Murphy" , "Nicolin Chen" , "Will Deacon" , "Catalin Marinas" , "Jonathan Corbet" , "Joerg Roedel" , "Lu Baolu" , "Jean-Philippe Brucker" , "Vladimir Oltean" , "Yicong Yang" , "Uwe Kleine-König" , "Tomas Krcka" , linux-arm-kernel@lists.infradead.org (moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)), linux-doc@vger.kernel.org (open list:DOCUMENTATION), linux-kernel@vger.kernel.org (open list), iommu@lists.linux.dev (open list:IOMMU SUBSYSTEM) +Message-ID: <20230802172620.1628017-5-eahariha@linux.microsoft.com> + +From: Robin Murphy + +commit 0bfbfc526c70606bf0fad302e4821087cbecfaf4 upstream + +Both MMU-600 and MMU-700 have similar errata around TLB invalidation +while both stages of translation are active, which will need some +consideration once nesting support is implemented. For now, though, +it's very easy to make our implicit lack of nesting support explicit +for those cases, so they're less likely to be missed in future. + +Signed-off-by: Robin Murphy +Reviewed-by: Nicolin Chen +Link: https://lore.kernel.org/r/696da78d32bb4491f898f11b0bb4d850a8aa7c6a.1683731256.git.robin.murphy@arm.com +Signed-off-by: Will Deacon +Signed-off-by: Easwar Hariharan +Signed-off-by: Greg Kroah-Hartman +--- + Documentation/arm64/silicon-errata.rst | 4 ++-- + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 5 +++++ + 2 files changed, 7 insertions(+), 2 deletions(-) + +--- a/Documentation/arm64/silicon-errata.rst ++++ b/Documentation/arm64/silicon-errata.rst +@@ -143,9 +143,9 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | MMU-500 | #841119,826419 | N/A | + +----------------+-----------------+-----------------+-----------------------------+ +-| ARM | MMU-600 | #1076982 | N/A | ++| ARM | MMU-600 | #1076982,1209401| N/A | + +----------------+-----------------+-----------------+-----------------------------+ +-| ARM | MMU-700 | #2812531 | N/A | ++| ARM | MMU-700 | #2268618,2812531| N/A | + +----------------+-----------------+-----------------+-----------------------------+ + +----------------+-----------------+-----------------+-----------------------------+ + | Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 | +--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c ++++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +@@ -3457,11 +3457,16 @@ static void arm_smmu_device_iidr_probe(s + /* Arm erratum 1076982 */ + if (variant == 0 && revision <= 2) + smmu->features &= ~ARM_SMMU_FEAT_SEV; ++ /* Arm erratum 1209401 */ ++ if (variant < 2) ++ smmu->features &= ~ARM_SMMU_FEAT_NESTING; + break; + case IIDR_PRODUCTID_ARM_MMU_700: + /* Arm erratum 2812531 */ + smmu->features &= ~ARM_SMMU_FEAT_BTM; + smmu->options |= ARM_SMMU_OPT_CMDQ_FORCE_SYNC; ++ /* Arm errata 2268618, 2812531 */ ++ smmu->features &= ~ARM_SMMU_FEAT_NESTING; + break; + } + break; diff --git a/queue-6.4/iommu-arm-smmu-v3-work-around-mmu-600-erratum-1076982.patch b/queue-6.4/iommu-arm-smmu-v3-work-around-mmu-600-erratum-1076982.patch new file mode 100644 index 00000000000..5f1220a91d6 --- /dev/null +++ b/queue-6.4/iommu-arm-smmu-v3-work-around-mmu-600-erratum-1076982.patch @@ -0,0 +1,103 @@ +From stable-owner@vger.kernel.org Wed Aug 2 19:26:42 2023 +From: Easwar Hariharan +Date: Wed, 2 Aug 2023 17:26:17 +0000 +Subject: iommu/arm-smmu-v3: Work around MMU-600 erratum 1076982 +To: stable@vger.kernel.org +Cc: easwar.hariharan@microsoft.com, "Robin Murphy" , "Nicolin Chen" , "Will Deacon" , "Catalin Marinas" , "Jonathan Corbet" , "Joerg Roedel" , "Lu Baolu" , "Jason Gunthorpe" , "Uwe Kleine-König" , "Vladimir Oltean" , "Yicong Yang" , "Tomas Krcka" , "Jean-Philippe Brucker" , "Kirill A. Shutemov" , linux-arm-kernel@lists.infradead.org (moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)), linux-doc@vger.kernel.org (open list:DOCUMENTATION), linux-kernel@vger.kernel.org (open list), iommu@lists.linux.dev (open list:IOMMU SUBSYSTEM) +Message-ID: <20230802172620.1628017-2-eahariha@linux.microsoft.com> + +From: Robin Murphy + +commit f322e8af35c7f23a8c08b595c38d6c855b2d836f upstream + +MMU-600 versions prior to r1p0 fail to correctly generate a WFE wakeup +event when the command queue transitions fom full to non-full. We can +easily work around this by simply hiding the SEV capability such that we +fall back to polling for space in the queue - since MMU-600 implements +MSIs we wouldn't expect to need SEV for sync completion either, so this +should have little to no impact. + +Signed-off-by: Robin Murphy +Reviewed-by: Nicolin Chen +Tested-by: Nicolin Chen +Link: https://lore.kernel.org/r/08adbe3d01024d8382a478325f73b56851f76e49.1683731256.git.robin.murphy@arm.com +Signed-off-by: Will Deacon +Signed-off-by: Easwar Hariharan +Signed-off-by: Greg Kroah-Hartman +--- + Documentation/arm64/silicon-errata.rst | 2 + + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 29 ++++++++++++++++++++++++++++ + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 6 +++++ + 3 files changed, 37 insertions(+) + +--- a/Documentation/arm64/silicon-errata.rst ++++ b/Documentation/arm64/silicon-errata.rst +@@ -143,6 +143,8 @@ stable kernels. + +----------------+-----------------+-----------------+-----------------------------+ + | ARM | MMU-500 | #841119,826419 | N/A | + +----------------+-----------------+-----------------+-----------------------------+ ++| ARM | MMU-600 | #1076982 | N/A | +++----------------+-----------------+-----------------+-----------------------------+ + +----------------+-----------------+-----------------+-----------------------------+ + | Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 | + +----------------+-----------------+-----------------+-----------------------------+ +--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c ++++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +@@ -3429,6 +3429,33 @@ static int arm_smmu_device_reset(struct + return 0; + } + ++#define IIDR_IMPLEMENTER_ARM 0x43b ++#define IIDR_PRODUCTID_ARM_MMU_600 0x483 ++ ++static void arm_smmu_device_iidr_probe(struct arm_smmu_device *smmu) ++{ ++ u32 reg; ++ unsigned int implementer, productid, variant, revision; ++ ++ reg = readl_relaxed(smmu->base + ARM_SMMU_IIDR); ++ implementer = FIELD_GET(IIDR_IMPLEMENTER, reg); ++ productid = FIELD_GET(IIDR_PRODUCTID, reg); ++ variant = FIELD_GET(IIDR_VARIANT, reg); ++ revision = FIELD_GET(IIDR_REVISION, reg); ++ ++ switch (implementer) { ++ case IIDR_IMPLEMENTER_ARM: ++ switch (productid) { ++ case IIDR_PRODUCTID_ARM_MMU_600: ++ /* Arm erratum 1076982 */ ++ if (variant == 0 && revision <= 2) ++ smmu->features &= ~ARM_SMMU_FEAT_SEV; ++ break; ++ } ++ break; ++ } ++} ++ + static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) + { + u32 reg; +@@ -3635,6 +3662,8 @@ static int arm_smmu_device_hw_probe(stru + + smmu->ias = max(smmu->ias, smmu->oas); + ++ arm_smmu_device_iidr_probe(smmu); ++ + if (arm_smmu_sva_supported(smmu)) + smmu->features |= ARM_SMMU_FEAT_SVA; + +--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h ++++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +@@ -69,6 +69,12 @@ + #define IDR5_VAX GENMASK(11, 10) + #define IDR5_VAX_52_BIT 1 + ++#define ARM_SMMU_IIDR 0x18 ++#define IIDR_PRODUCTID GENMASK(31, 20) ++#define IIDR_VARIANT GENMASK(19, 16) ++#define IIDR_REVISION GENMASK(15, 12) ++#define IIDR_IMPLEMENTER GENMASK(11, 0) ++ + #define ARM_SMMU_CR0 0x20 + #define CR0_ATSCHK (1 << 4) + #define CR0_CMDQEN (1 << 3) diff --git a/queue-6.4/series b/queue-6.4/series index 4d1f0c015e4..a290833cdd6 100644 --- a/queue-6.4/series +++ b/queue-6.4/series @@ -1 +1,5 @@ mm-lock_vma_under_rcu-must-check-vma-anon_vma-under-vma-lock.patch +iommu-arm-smmu-v3-work-around-mmu-600-erratum-1076982.patch +iommu-arm-smmu-v3-document-mmu-700-erratum-2812531.patch +iommu-arm-smmu-v3-add-explicit-feature-for-nesting.patch +iommu-arm-smmu-v3-document-nesting-related-errata.patch -- 2.47.3