From 46feed023950df0db4efa0cf160b640611e7dda4 Mon Sep 17 00:00:00 2001 From: Sasha Levin Date: Sun, 11 Aug 2024 17:16:07 -0400 Subject: [PATCH] Drop irqchip-gic-v3-don-t-return-errors-from-gic_acpi_mat.patch Signed-off-by: Sasha Levin --- ...on-t-return-errors-from-gic_acpi_mat.patch | 72 ------------------- queue-6.10/series | 1 - 2 files changed, 73 deletions(-) delete mode 100644 queue-6.10/irqchip-gic-v3-don-t-return-errors-from-gic_acpi_mat.patch diff --git a/queue-6.10/irqchip-gic-v3-don-t-return-errors-from-gic_acpi_mat.patch b/queue-6.10/irqchip-gic-v3-don-t-return-errors-from-gic_acpi_mat.patch deleted file mode 100644 index ab36f54d9f8..00000000000 --- a/queue-6.10/irqchip-gic-v3-don-t-return-errors-from-gic_acpi_mat.patch +++ /dev/null @@ -1,72 +0,0 @@ -From cb6803bff3500e0963d27f0ba8b9808ceb7f47bf Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Wed, 29 May 2024 14:34:40 +0100 -Subject: irqchip/gic-v3: Don't return errors from gic_acpi_match_gicc() - -From: James Morse - -[ Upstream commit fa2dabe57220e6af78ed7a2f7016bf250a618204 ] - -gic_acpi_match_gicc() is only called via gic_acpi_count_gicr_regions(). -It should only count the number of enabled redistributors, but it -also tries to sanity check the GICC entry, currently returning an -error if the Enabled bit is set, but the gicr_base_address is zero. - -Adding support for the online-capable bit to the sanity check will -complicate it, for no benefit. The existing check implicitly depends on -gic_acpi_count_gicr_regions() previous failing to find any GICR regions -(as it is valid to have gicr_base_address of zero if the redistributors -are described via a GICR entry). - -Instead of complicating the check, remove it. Failures that happen at -this point cause the irqchip not to register, meaning no irqs can be -requested. The kernel grinds to a panic() pretty quickly. - -Without the check, MADT tables that exhibit this problem are still -caught by gic_populate_rdist(), which helpfully also prints what went -wrong: -| CPU4: mpidr 100 has no re-distributor! - -Signed-off-by: James Morse -Reviewed-by: Gavin Shan -Tested-by: Miguel Luis -Signed-off-by: Russell King (Oracle) -Reviewed-by: Jonathan Cameron -Signed-off-by: Jonathan Cameron -Reviewed-by: Marc Zyngier -Link: https://lore.kernel.org/r/20240529133446.28446-14-Jonathan.Cameron@huawei.com -Signed-off-by: Catalin Marinas -Signed-off-by: Sasha Levin ---- - drivers/irqchip/irq-gic-v3.c | 13 ++----------- - 1 file changed, 2 insertions(+), 11 deletions(-) - -diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c -index 6fb276504bcc8..10af15f93d4d4 100644 ---- a/drivers/irqchip/irq-gic-v3.c -+++ b/drivers/irqchip/irq-gic-v3.c -@@ -2415,19 +2415,10 @@ static int __init gic_acpi_match_gicc(union acpi_subtable_headers *header, - * If GICC is enabled and has valid gicr base address, then it means - * GICR base is presented via GICC - */ -- if (acpi_gicc_is_usable(gicc) && gicc->gicr_base_address) { -+ if (acpi_gicc_is_usable(gicc) && gicc->gicr_base_address) - acpi_data.enabled_rdists++; -- return 0; -- } - -- /* -- * It's perfectly valid firmware can pass disabled GICC entry, driver -- * should not treat as errors, skip the entry instead of probe fail. -- */ -- if (!acpi_gicc_is_usable(gicc)) -- return 0; -- -- return -ENODEV; -+ return 0; - } - - static int __init gic_acpi_count_gicr_regions(void) --- -2.43.0 - diff --git a/queue-6.10/series b/queue-6.10/series index ee1cb5c58ec..caa958835ab 100644 --- a/queue-6.10/series +++ b/queue-6.10/series @@ -51,7 +51,6 @@ md-raid5-avoid-bug_on-while-continue-reshape-after-r.patch debugobjects-annotate-racy-debug-variables.patch nvme-apple-fix-device-reference-counting.patch block-change-rq_integrity_vec-to-respect-the-iterato.patch -irqchip-gic-v3-don-t-return-errors-from-gic_acpi_mat.patch rcu-fix-rcu_barrier-vs-post-cpuhp_teardown_cpu-invoc.patch clocksource-drivers-sh_cmt-address-race-condition-fo.patch acpi-battery-create-alarm-sysfs-attribute-atomically.patch -- 2.47.3