From 489946d01af13c472bbf1d8daa80e0bf894e6fc9 Mon Sep 17 00:00:00 2001 From: Jamin Lin Date: Tue, 4 Nov 2025 11:12:39 +0800 Subject: [PATCH] hw/arm/aspeed: Move AspeedMachineState definition to common header for reuse MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Aspeed machines will be moved into split C files for better modularization and future maintenance. To allow all machine implementations to reuse the same AspeedMachineState structure, the struct definition is moved from aspeed.c to the shared header aspeed.h. This change centralizes the common state structure used across all Aspeed machine models, reduces redundancy, and simplifies future refactoring work for new machines. No functional changes. Signed-off-by: Jamin Lin Reviewed-by: Cédric Le Goater Link: https://lore.kernel.org/qemu-devel/20251104031325.146374-2-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater --- hw/arm/aspeed.c | 14 -------------- include/hw/arm/aspeed.h | 12 ++++++++++++ 2 files changed, 12 insertions(+), 14 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index ecc7272e67c..4c92f1e1d95 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -36,20 +36,6 @@ static struct arm_boot_info aspeed_board_binfo = { .board_id = -1, /* device-tree-only board */ }; -struct AspeedMachineState { - /* Private */ - MachineState parent_obj; - /* Public */ - - AspeedSoCState *soc; - MemoryRegion boot_rom; - bool mmio_exec; - uint32_t uart_chosen; - char *fmc_model; - char *spi_model; - uint32_t hw_strap1; -}; - /* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */ #if HOST_LONG_BITS == 32 #define ASPEED_RAM_SIZE(sz) MIN((sz), 1 * GiB) diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h index 6c364556565..9d34be68b2b 100644 --- a/include/hw/arm/aspeed.h +++ b/include/hw/arm/aspeed.h @@ -11,6 +11,7 @@ #include "hw/boards.h" #include "qom/object.h" +#include "hw/arm/aspeed_soc.h" typedef struct AspeedMachineState AspeedMachineState; @@ -24,6 +25,17 @@ DECLARE_OBJ_CHECKERS(AspeedMachineState, AspeedMachineClass, #define ASPEED_MAC2_ON (1 << 2) #define ASPEED_MAC3_ON (1 << 3) +struct AspeedMachineState { + MachineState parent_obj; + + AspeedSoCState *soc; + MemoryRegion boot_rom; + bool mmio_exec; + uint32_t uart_chosen; + char *fmc_model; + char *spi_model; + uint32_t hw_strap1; +}; struct AspeedMachineClass { MachineClass parent_obj; -- 2.47.3