From 4fb7e43e30ca785b507fb07280c5502c3ca9433c Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Tue, 20 Sep 2022 18:44:13 +0200 Subject: [PATCH] 5.19-stable patches added patches: blk-lib-fix-blkdev_issue_secure_erase.patch cifs-always-initialize-struct-msghdr-smb_msg-completely.patch cifs-don-t-send-down-the-destination-address-to-sendmsg-for-a-sock_stream.patch cifs-revalidate-mapping-when-doing-direct-writes.patch drm-amdgpu-don-t-enable-ltr-if-not-supported.patch drm-amdgpu-make-sure-to-init-common-ip-before-gmc.patch drm-amdgpu-move-nbio-ih_doorbell_range-into-ih-code-for-vega.patch drm-amdgpu-move-nbio-sdma_doorbell_range-into-sdma-code-for-vega.patch drm-i915-gt-fix-perf-limit-reasons-bit-positions.patch drm-i915-set-correct-domains-values-at-_i915_vma_move_to_active.patch io_uring-msg_ring-check-file-type-before-putting.patch of-device-fix-up-of_dma_configure_id-stub.patch parisc-allow-config_64bit-with-arch-parisc.patch tools-include-uapi-fix-asm-errno.h-for-parisc-and-xtensa.patch --- ...lk-lib-fix-blkdev_issue_secure_erase.patch | 56 ++++++ ...ize-struct-msghdr-smb_msg-completely.patch | 97 +++++++++++ ...address-to-sendmsg-for-a-sock_stream.patch | 34 ++++ ...ate-mapping-when-doing-direct-writes.patch | 37 ++++ ...pu-don-t-enable-ltr-if-not-supported.patch | 164 ++++++++++++++++++ ...ke-sure-to-init-common-ip-before-gmc.patch | 68 ++++++++ ...doorbell_range-into-ih-code-for-vega.patch | 81 +++++++++ ...orbell_range-into-sdma-code-for-vega.patch | 96 ++++++++++ ...fix-perf-limit-reasons-bit-positions.patch | 51 ++++++ ...s-values-at-_i915_vma_move_to_active.patch | 48 +++++ ..._ring-check-file-type-before-putting.patch | 33 ++++ ...vice-fix-up-of_dma_configure_id-stub.patch | 40 +++++ ...-allow-config_64bit-with-arch-parisc.patch | 56 ++++++ queue-5.19/series | 14 ++ ...ix-asm-errno.h-for-parisc-and-xtensa.patch | 37 ++++ 15 files changed, 912 insertions(+) create mode 100644 queue-5.19/blk-lib-fix-blkdev_issue_secure_erase.patch create mode 100644 queue-5.19/cifs-always-initialize-struct-msghdr-smb_msg-completely.patch create mode 100644 queue-5.19/cifs-don-t-send-down-the-destination-address-to-sendmsg-for-a-sock_stream.patch create mode 100644 queue-5.19/cifs-revalidate-mapping-when-doing-direct-writes.patch create mode 100644 queue-5.19/drm-amdgpu-don-t-enable-ltr-if-not-supported.patch create mode 100644 queue-5.19/drm-amdgpu-make-sure-to-init-common-ip-before-gmc.patch create mode 100644 queue-5.19/drm-amdgpu-move-nbio-ih_doorbell_range-into-ih-code-for-vega.patch create mode 100644 queue-5.19/drm-amdgpu-move-nbio-sdma_doorbell_range-into-sdma-code-for-vega.patch create mode 100644 queue-5.19/drm-i915-gt-fix-perf-limit-reasons-bit-positions.patch create mode 100644 queue-5.19/drm-i915-set-correct-domains-values-at-_i915_vma_move_to_active.patch create mode 100644 queue-5.19/io_uring-msg_ring-check-file-type-before-putting.patch create mode 100644 queue-5.19/of-device-fix-up-of_dma_configure_id-stub.patch create mode 100644 queue-5.19/parisc-allow-config_64bit-with-arch-parisc.patch create mode 100644 queue-5.19/tools-include-uapi-fix-asm-errno.h-for-parisc-and-xtensa.patch diff --git a/queue-5.19/blk-lib-fix-blkdev_issue_secure_erase.patch b/queue-5.19/blk-lib-fix-blkdev_issue_secure_erase.patch new file mode 100644 index 00000000000..112fe0d1e10 --- /dev/null +++ b/queue-5.19/blk-lib-fix-blkdev_issue_secure_erase.patch @@ -0,0 +1,56 @@ +From c4fa368466cc1b60bb92f867741488930ddd6034 Mon Sep 17 00:00:00 2001 +From: Mikulas Patocka +Date: Wed, 14 Sep 2022 16:55:51 -0400 +Subject: blk-lib: fix blkdev_issue_secure_erase + +From: Mikulas Patocka + +commit c4fa368466cc1b60bb92f867741488930ddd6034 upstream. + +There's a bug in blkdev_issue_secure_erase. The statement +"unsigned int len = min_t(sector_t, nr_sects, max_sectors);" +sets the variable "len" to the length in sectors, but the statement +"bio->bi_iter.bi_size = len" treats it as if it were in bytes. +The statements "sector += len << SECTOR_SHIFT" and "nr_sects -= len << +SECTOR_SHIFT" are thinko. + +This patch fixes it. + +Signed-off-by: Mikulas Patocka +Cc: stable@vger.kernel.org # v5.19 +Fixes: 44abff2c0b97 ("block: decouple REQ_OP_SECURE_ERASE from REQ_OP_DISCARD") +Link: https://lore.kernel.org/r/alpine.LRH.2.02.2209141549480.28100@file01.intranet.prod.int.rdu2.redhat.com +Signed-off-by: Jens Axboe +Signed-off-by: Greg Kroah-Hartman +--- + block/blk-lib.c | 11 ++++++++--- + 1 file changed, 8 insertions(+), 3 deletions(-) + +--- a/block/blk-lib.c ++++ b/block/blk-lib.c +@@ -311,6 +311,11 @@ int blkdev_issue_secure_erase(struct blo + struct blk_plug plug; + int ret = 0; + ++ /* make sure that "len << SECTOR_SHIFT" doesn't overflow */ ++ if (max_sectors > UINT_MAX >> SECTOR_SHIFT) ++ max_sectors = UINT_MAX >> SECTOR_SHIFT; ++ max_sectors &= ~bs_mask; ++ + if (max_sectors == 0) + return -EOPNOTSUPP; + if ((sector | nr_sects) & bs_mask) +@@ -324,10 +329,10 @@ int blkdev_issue_secure_erase(struct blo + + bio = blk_next_bio(bio, bdev, 0, REQ_OP_SECURE_ERASE, gfp); + bio->bi_iter.bi_sector = sector; +- bio->bi_iter.bi_size = len; ++ bio->bi_iter.bi_size = len << SECTOR_SHIFT; + +- sector += len << SECTOR_SHIFT; +- nr_sects -= len << SECTOR_SHIFT; ++ sector += len; ++ nr_sects -= len; + if (!nr_sects) { + ret = submit_bio_wait(bio); + bio_put(bio); diff --git a/queue-5.19/cifs-always-initialize-struct-msghdr-smb_msg-completely.patch b/queue-5.19/cifs-always-initialize-struct-msghdr-smb_msg-completely.patch new file mode 100644 index 00000000000..92e99e9719e --- /dev/null +++ b/queue-5.19/cifs-always-initialize-struct-msghdr-smb_msg-completely.patch @@ -0,0 +1,97 @@ +From bedc8f76b3539ac4f952114b316bcc2251e808ce Mon Sep 17 00:00:00 2001 +From: Stefan Metzmacher +Date: Wed, 14 Sep 2022 05:25:47 +0200 +Subject: cifs: always initialize struct msghdr smb_msg completely + +From: Stefan Metzmacher + +commit bedc8f76b3539ac4f952114b316bcc2251e808ce upstream. + +So far we were just lucky because the uninitialized members +of struct msghdr are not used by default on a SOCK_STREAM tcp +socket. + +But as new things like msg_ubuf and sg_from_iter where added +recently, we should play on the safe side and avoid potention +problems in future. + +Signed-off-by: Stefan Metzmacher +Cc: stable@vger.kernel.org +Reviewed-by: Paulo Alcantara (SUSE) +Reviewed-by: Ronnie Sahlberg +Signed-off-by: Steve French +Signed-off-by: Greg Kroah-Hartman +--- + fs/cifs/connect.c | 11 +++-------- + fs/cifs/transport.c | 6 +----- + 2 files changed, 4 insertions(+), 13 deletions(-) + +--- a/fs/cifs/connect.c ++++ b/fs/cifs/connect.c +@@ -707,9 +707,6 @@ cifs_readv_from_socket(struct TCP_Server + int length = 0; + int total_read; + +- smb_msg->msg_control = NULL; +- smb_msg->msg_controllen = 0; +- + for (total_read = 0; msg_data_left(smb_msg); total_read += length) { + try_to_freeze(); + +@@ -765,7 +762,7 @@ int + cifs_read_from_socket(struct TCP_Server_Info *server, char *buf, + unsigned int to_read) + { +- struct msghdr smb_msg; ++ struct msghdr smb_msg = {}; + struct kvec iov = {.iov_base = buf, .iov_len = to_read}; + iov_iter_kvec(&smb_msg.msg_iter, READ, &iov, 1, to_read); + +@@ -775,15 +772,13 @@ cifs_read_from_socket(struct TCP_Server_ + ssize_t + cifs_discard_from_socket(struct TCP_Server_Info *server, size_t to_read) + { +- struct msghdr smb_msg; ++ struct msghdr smb_msg = {}; + + /* + * iov_iter_discard already sets smb_msg.type and count and iov_offset + * and cifs_readv_from_socket sets msg_control and msg_controllen + * so little to initialize in struct msghdr + */ +- smb_msg.msg_name = NULL; +- smb_msg.msg_namelen = 0; + iov_iter_discard(&smb_msg.msg_iter, READ, to_read); + + return cifs_readv_from_socket(server, &smb_msg); +@@ -793,7 +788,7 @@ int + cifs_read_page_from_socket(struct TCP_Server_Info *server, struct page *page, + unsigned int page_offset, unsigned int to_read) + { +- struct msghdr smb_msg; ++ struct msghdr smb_msg = {}; + struct bio_vec bv = { + .bv_page = page, .bv_len = to_read, .bv_offset = page_offset}; + iov_iter_bvec(&smb_msg.msg_iter, READ, &bv, 1, to_read); +--- a/fs/cifs/transport.c ++++ b/fs/cifs/transport.c +@@ -196,10 +196,6 @@ smb_send_kvec(struct TCP_Server_Info *se + + *sent = 0; + +- smb_msg->msg_name = NULL; +- smb_msg->msg_namelen = 0; +- smb_msg->msg_control = NULL; +- smb_msg->msg_controllen = 0; + if (server->noblocksnd) + smb_msg->msg_flags = MSG_DONTWAIT + MSG_NOSIGNAL; + else +@@ -311,7 +307,7 @@ __smb_send_rqst(struct TCP_Server_Info * + sigset_t mask, oldmask; + size_t total_len = 0, sent, size; + struct socket *ssocket = server->ssocket; +- struct msghdr smb_msg; ++ struct msghdr smb_msg = {}; + __be32 rfc1002_marker; + + if (cifs_rdma_enabled(server)) { diff --git a/queue-5.19/cifs-don-t-send-down-the-destination-address-to-sendmsg-for-a-sock_stream.patch b/queue-5.19/cifs-don-t-send-down-the-destination-address-to-sendmsg-for-a-sock_stream.patch new file mode 100644 index 00000000000..c5071541296 --- /dev/null +++ b/queue-5.19/cifs-don-t-send-down-the-destination-address-to-sendmsg-for-a-sock_stream.patch @@ -0,0 +1,34 @@ +From 17d3df38dc5f4cec9b0ac6eb79c1859b6e2693a4 Mon Sep 17 00:00:00 2001 +From: Stefan Metzmacher +Date: Wed, 14 Sep 2022 05:25:46 +0200 +Subject: cifs: don't send down the destination address to sendmsg for a SOCK_STREAM + +From: Stefan Metzmacher + +commit 17d3df38dc5f4cec9b0ac6eb79c1859b6e2693a4 upstream. + +This is ignored anyway by the tcp layer. + +Signed-off-by: Stefan Metzmacher +Cc: stable@vger.kernel.org +Reviewed-by: Ronnie Sahlberg +Reviewed-by: Paulo Alcantara (SUSE) +Signed-off-by: Steve French +Signed-off-by: Greg Kroah-Hartman +--- + fs/cifs/transport.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/fs/cifs/transport.c ++++ b/fs/cifs/transport.c +@@ -196,8 +196,8 @@ smb_send_kvec(struct TCP_Server_Info *se + + *sent = 0; + +- smb_msg->msg_name = (struct sockaddr *) &server->dstaddr; +- smb_msg->msg_namelen = sizeof(struct sockaddr); ++ smb_msg->msg_name = NULL; ++ smb_msg->msg_namelen = 0; + smb_msg->msg_control = NULL; + smb_msg->msg_controllen = 0; + if (server->noblocksnd) diff --git a/queue-5.19/cifs-revalidate-mapping-when-doing-direct-writes.patch b/queue-5.19/cifs-revalidate-mapping-when-doing-direct-writes.patch new file mode 100644 index 00000000000..2cd2dd25211 --- /dev/null +++ b/queue-5.19/cifs-revalidate-mapping-when-doing-direct-writes.patch @@ -0,0 +1,37 @@ +From 7500a99281dfed2d4a84771c933bcb9e17af279b Mon Sep 17 00:00:00 2001 +From: Ronnie Sahlberg +Date: Mon, 12 Sep 2022 13:04:46 +1000 +Subject: cifs: revalidate mapping when doing direct writes + +From: Ronnie Sahlberg + +commit 7500a99281dfed2d4a84771c933bcb9e17af279b upstream. + +Kernel bugzilla: 216301 + +When doing direct writes we need to also invalidate the mapping in case +we have a cached copy of the affected page(s) in memory or else +subsequent reads of the data might return the old/stale content +before we wrote an update to the server. + +Cc: stable@vger.kernel.org +Reviewed-by: Paulo Alcantara (SUSE) +Signed-off-by: Ronnie Sahlberg +Signed-off-by: Steve French +Signed-off-by: Greg Kroah-Hartman +--- + fs/cifs/file.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/fs/cifs/file.c ++++ b/fs/cifs/file.c +@@ -3327,6 +3327,9 @@ static ssize_t __cifs_writev( + + ssize_t cifs_direct_writev(struct kiocb *iocb, struct iov_iter *from) + { ++ struct file *file = iocb->ki_filp; ++ ++ cifs_revalidate_mapping(file->f_inode); + return __cifs_writev(iocb, from, true); + } + diff --git a/queue-5.19/drm-amdgpu-don-t-enable-ltr-if-not-supported.patch b/queue-5.19/drm-amdgpu-don-t-enable-ltr-if-not-supported.patch new file mode 100644 index 00000000000..6bf992adbc4 --- /dev/null +++ b/queue-5.19/drm-amdgpu-don-t-enable-ltr-if-not-supported.patch @@ -0,0 +1,164 @@ +From 6c20490663553cd7e07d8de8af482012329ab9d6 Mon Sep 17 00:00:00 2001 +From: Lijo Lazar +Date: Thu, 8 Sep 2022 08:28:57 +0530 +Subject: drm/amdgpu: Don't enable LTR if not supported + +From: Lijo Lazar + +commit 6c20490663553cd7e07d8de8af482012329ab9d6 upstream. + +As per PCIE Base Spec r4.0 Section 6.18 +'Software must not enable LTR in an Endpoint unless the Root Complex +and all intermediate Switches indicate support for LTR.' + +This fixes the Unsupported Request error reported through AER during +ASPM enablement. + +Link: https://bugzilla.kernel.org/show_bug.cgi?id=216455 + +The error was unnoticed before and got visible because of the commit +referenced below. This doesn't fix anything in the commit below, rather +fixes the issue in amdgpu exposed by the commit. The reference is only +to associate this commit with below one so that both go together. + +Fixes: 8795e182b02d ("PCI/portdrv: Don't disable AER reporting in get_port_device_capability()") + +Reported-by: Gustaw Smolarczyk +Signed-off-by: Lijo Lazar +Reviewed-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +Cc: stable@vger.kernel.org +Signed-off-by: Alex Deucher +--- + drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 9 ++++++++- + drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 9 ++++++++- + drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 9 ++++++++- + 3 files changed, 24 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c ++++ b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c +@@ -380,6 +380,7 @@ static void nbio_v2_3_enable_aspm(struct + WREG32_PCIE(smnPCIE_LC_CNTL, data); + } + ++#ifdef CONFIG_PCIEASPM + static void nbio_v2_3_program_ltr(struct amdgpu_device *adev) + { + uint32_t def, data; +@@ -401,9 +402,11 @@ static void nbio_v2_3_program_ltr(struct + if (def != data) + WREG32_PCIE(smnBIF_CFG_DEV0_EPF0_DEVICE_CNTL2, data); + } ++#endif + + static void nbio_v2_3_program_aspm(struct amdgpu_device *adev) + { ++#ifdef CONFIG_PCIEASPM + uint32_t def, data; + + def = data = RREG32_PCIE(smnPCIE_LC_CNTL); +@@ -459,7 +462,10 @@ static void nbio_v2_3_program_aspm(struc + if (def != data) + WREG32_PCIE(smnPCIE_LC_CNTL6, data); + +- nbio_v2_3_program_ltr(adev); ++ /* Don't bother about LTR if LTR is not enabled ++ * in the path */ ++ if (adev->pdev->ltr_path) ++ nbio_v2_3_program_ltr(adev); + + def = data = RREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP3); + data |= 0x5DE0 << RCC_BIF_STRAP3__STRAP_VLINK_ASPM_IDLE_TIMER__SHIFT; +@@ -483,6 +489,7 @@ static void nbio_v2_3_program_aspm(struc + data &= ~PCIE_LC_CNTL3__LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK_MASK; + if (def != data) + WREG32_PCIE(smnPCIE_LC_CNTL3, data); ++#endif + } + + static void nbio_v2_3_apply_lc_spc_mode_wa(struct amdgpu_device *adev) +--- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c ++++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c +@@ -282,6 +282,7 @@ static void nbio_v6_1_init_registers(str + mmBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL) << 2; + } + ++#ifdef CONFIG_PCIEASPM + static void nbio_v6_1_program_ltr(struct amdgpu_device *adev) + { + uint32_t def, data; +@@ -303,9 +304,11 @@ static void nbio_v6_1_program_ltr(struct + if (def != data) + WREG32_PCIE(smnBIF_CFG_DEV0_EPF0_DEVICE_CNTL2, data); + } ++#endif + + static void nbio_v6_1_program_aspm(struct amdgpu_device *adev) + { ++#ifdef CONFIG_PCIEASPM + uint32_t def, data; + + def = data = RREG32_PCIE(smnPCIE_LC_CNTL); +@@ -361,7 +364,10 @@ static void nbio_v6_1_program_aspm(struc + if (def != data) + WREG32_PCIE(smnPCIE_LC_CNTL6, data); + +- nbio_v6_1_program_ltr(adev); ++ /* Don't bother about LTR if LTR is not enabled ++ * in the path */ ++ if (adev->pdev->ltr_path) ++ nbio_v6_1_program_ltr(adev); + + def = data = RREG32_PCIE(smnRCC_BIF_STRAP3); + data |= 0x5DE0 << RCC_BIF_STRAP3__STRAP_VLINK_ASPM_IDLE_TIMER__SHIFT; +@@ -385,6 +391,7 @@ static void nbio_v6_1_program_aspm(struc + data &= ~PCIE_LC_CNTL3__LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK_MASK; + if (def != data) + WREG32_PCIE(smnPCIE_LC_CNTL3, data); ++#endif + } + + const struct amdgpu_nbio_funcs nbio_v6_1_funcs = { +--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c ++++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c +@@ -673,6 +673,7 @@ struct amdgpu_nbio_ras nbio_v7_4_ras = { + }; + + ++#ifdef CONFIG_PCIEASPM + static void nbio_v7_4_program_ltr(struct amdgpu_device *adev) + { + uint32_t def, data; +@@ -694,9 +695,11 @@ static void nbio_v7_4_program_ltr(struct + if (def != data) + WREG32_PCIE(smnBIF_CFG_DEV0_EPF0_DEVICE_CNTL2, data); + } ++#endif + + static void nbio_v7_4_program_aspm(struct amdgpu_device *adev) + { ++#ifdef CONFIG_PCIEASPM + uint32_t def, data; + + if (adev->ip_versions[NBIO_HWIP][0] == IP_VERSION(7, 4, 4)) +@@ -755,7 +758,10 @@ static void nbio_v7_4_program_aspm(struc + if (def != data) + WREG32_PCIE(smnPCIE_LC_CNTL6, data); + +- nbio_v7_4_program_ltr(adev); ++ /* Don't bother about LTR if LTR is not enabled ++ * in the path */ ++ if (adev->pdev->ltr_path) ++ nbio_v7_4_program_ltr(adev); + + def = data = RREG32_PCIE(smnRCC_BIF_STRAP3); + data |= 0x5DE0 << RCC_BIF_STRAP3__STRAP_VLINK_ASPM_IDLE_TIMER__SHIFT; +@@ -779,6 +785,7 @@ static void nbio_v7_4_program_aspm(struc + data &= ~PCIE_LC_CNTL3__LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK_MASK; + if (def != data) + WREG32_PCIE(smnPCIE_LC_CNTL3, data); ++#endif + } + + const struct amdgpu_nbio_funcs nbio_v7_4_funcs = { diff --git a/queue-5.19/drm-amdgpu-make-sure-to-init-common-ip-before-gmc.patch b/queue-5.19/drm-amdgpu-make-sure-to-init-common-ip-before-gmc.patch new file mode 100644 index 00000000000..be16ab9acfa --- /dev/null +++ b/queue-5.19/drm-amdgpu-make-sure-to-init-common-ip-before-gmc.patch @@ -0,0 +1,68 @@ +From a8671493d2074950553da3cf07d1be43185ef6c6 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Tue, 30 Aug 2022 10:59:49 -0400 +Subject: drm/amdgpu: make sure to init common IP before gmc +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Alex Deucher + +commit a8671493d2074950553da3cf07d1be43185ef6c6 upstream. + +Move common IP init before GMC init so that HDP gets +remapped before GMC init which uses it. + +This fixes the Unsupported Request error reported through +AER during driver load. The error happens as a write happens +to the remap offset before real remapping is done. + +Link: https://bugzilla.kernel.org/show_bug.cgi?id=216373 + +The error was unnoticed before and got visible because of the commit +referenced below. This doesn't fix anything in the commit below, rather +fixes the issue in amdgpu exposed by the commit. The reference is only +to associate this commit with below one so that both go together. + +Fixes: 8795e182b02d ("PCI/portdrv: Don't disable AER reporting in get_port_device_capability()") + +Acked-by: Christian König +Reviewed-by: Lijo Lazar +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 14 +++++++++++--- + 1 file changed, 11 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -2391,8 +2391,16 @@ static int amdgpu_device_ip_init(struct + } + adev->ip_blocks[i].status.sw = true; + +- /* need to do gmc hw init early so we can allocate gpu mem */ +- if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC) { ++ if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON) { ++ /* need to do common hw init early so everything is set up for gmc */ ++ r = adev->ip_blocks[i].version->funcs->hw_init((void *)adev); ++ if (r) { ++ DRM_ERROR("hw_init %d failed %d\n", i, r); ++ goto init_failed; ++ } ++ adev->ip_blocks[i].status.hw = true; ++ } else if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC) { ++ /* need to do gmc hw init early so we can allocate gpu mem */ + /* Try to reserve bad pages early */ + if (amdgpu_sriov_vf(adev)) + amdgpu_virt_exchange_data(adev); +@@ -3078,8 +3086,8 @@ static int amdgpu_device_ip_reinit_early + int i, r; + + static enum amd_ip_block_type ip_order[] = { +- AMD_IP_BLOCK_TYPE_GMC, + AMD_IP_BLOCK_TYPE_COMMON, ++ AMD_IP_BLOCK_TYPE_GMC, + AMD_IP_BLOCK_TYPE_PSP, + AMD_IP_BLOCK_TYPE_IH, + }; diff --git a/queue-5.19/drm-amdgpu-move-nbio-ih_doorbell_range-into-ih-code-for-vega.patch b/queue-5.19/drm-amdgpu-move-nbio-ih_doorbell_range-into-ih-code-for-vega.patch new file mode 100644 index 00000000000..e9f7335bad2 --- /dev/null +++ b/queue-5.19/drm-amdgpu-move-nbio-ih_doorbell_range-into-ih-code-for-vega.patch @@ -0,0 +1,81 @@ +From dc1d85cb790f2091eea074cee24a704b2d6c4a06 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Fri, 9 Sep 2022 11:47:20 -0400 +Subject: drm/amdgpu: move nbio ih_doorbell_range() into ih code for vega +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Alex Deucher + +commit dc1d85cb790f2091eea074cee24a704b2d6c4a06 upstream. + +This mirrors what we do for other asics and this way we are +sure the ih doorbell range is properly initialized. + +There is a comment about the way doorbells on gfx9 work that +requires that they are initialized for other IPs before GFX +is initialized. In this case IH is initialized before GFX, +so there should be no issue. + +This is a prerequisite for fixing the Unsupported Request error +reported through AER during driver load. + +Link: https://bugzilla.kernel.org/show_bug.cgi?id=216373 + +The error was unnoticed before and got visible because of the commit +referenced below. This doesn't fix anything in the commit below, rather +fixes the issue in amdgpu exposed by the commit. The reference is only +to associate this commit with below one so that both go together. + +Fixes: 8795e182b02d ("PCI/portdrv: Don't disable AER reporting in get_port_device_capability()") + +Acked-by: Christian König +Reviewed-by: Lijo Lazar +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/soc15.c | 3 --- + drivers/gpu/drm/amd/amdgpu/vega10_ih.c | 4 ++++ + drivers/gpu/drm/amd/amdgpu/vega20_ih.c | 4 ++++ + 3 files changed, 8 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/soc15.c ++++ b/drivers/gpu/drm/amd/amdgpu/soc15.c +@@ -1224,9 +1224,6 @@ static void soc15_doorbell_range_init(st + ring->use_doorbell, ring->doorbell_index, + adev->doorbell_index.sdma_doorbell_range); + } +- +- adev->nbio.funcs->ih_doorbell_range(adev, adev->irq.ih.use_doorbell, +- adev->irq.ih.doorbell_index); + } + } + +--- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c ++++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c +@@ -289,6 +289,10 @@ static int vega10_ih_irq_init(struct amd + } + } + ++ if (!amdgpu_sriov_vf(adev)) ++ adev->nbio.funcs->ih_doorbell_range(adev, adev->irq.ih.use_doorbell, ++ adev->irq.ih.doorbell_index); ++ + pci_set_master(adev->pdev); + + /* enable interrupts */ +--- a/drivers/gpu/drm/amd/amdgpu/vega20_ih.c ++++ b/drivers/gpu/drm/amd/amdgpu/vega20_ih.c +@@ -340,6 +340,10 @@ static int vega20_ih_irq_init(struct amd + } + } + ++ if (!amdgpu_sriov_vf(adev)) ++ adev->nbio.funcs->ih_doorbell_range(adev, adev->irq.ih.use_doorbell, ++ adev->irq.ih.doorbell_index); ++ + pci_set_master(adev->pdev); + + /* enable interrupts */ diff --git a/queue-5.19/drm-amdgpu-move-nbio-sdma_doorbell_range-into-sdma-code-for-vega.patch b/queue-5.19/drm-amdgpu-move-nbio-sdma_doorbell_range-into-sdma-code-for-vega.patch new file mode 100644 index 00000000000..978da5def6b --- /dev/null +++ b/queue-5.19/drm-amdgpu-move-nbio-sdma_doorbell_range-into-sdma-code-for-vega.patch @@ -0,0 +1,96 @@ +From e3163bc8ffdfdb405e10530b140135b2ee487f89 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Fri, 9 Sep 2022 11:53:27 -0400 +Subject: drm/amdgpu: move nbio sdma_doorbell_range() into sdma code for vega +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Alex Deucher + +commit e3163bc8ffdfdb405e10530b140135b2ee487f89 upstream. + +This mirrors what we do for other asics and this way we are +sure the sdma doorbell range is properly initialized. + +There is a comment about the way doorbells on gfx9 work that +requires that they are initialized for other IPs before GFX +is initialized. However, the statement says that it applies to +multimedia as well, but the VCN code currently initializes +doorbells after GFX and there are no known issues there. In my +testing at least I don't see any problems on SDMA. + +This is a prerequisite for fixing the Unsupported Request error +reported through AER during driver load. + +Link: https://bugzilla.kernel.org/show_bug.cgi?id=216373 + +The error was unnoticed before and got visible because of the commit +referenced below. This doesn't fix anything in the commit below, rather +fixes the issue in amdgpu exposed by the commit. The reference is only +to associate this commit with below one so that both go together. + +Fixes: 8795e182b02d ("PCI/portdrv: Don't disable AER reporting in get_port_device_capability()") + +Acked-by: Christian König +Reviewed-by: Lijo Lazar +Signed-off-by: Alex Deucher +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 5 +++++ + drivers/gpu/drm/amd/amdgpu/soc15.c | 22 ---------------------- + 2 files changed, 5 insertions(+), 22 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +@@ -1504,6 +1504,11 @@ static int sdma_v4_0_start(struct amdgpu + WREG32_SDMA(i, mmSDMA0_CNTL, temp); + + if (!amdgpu_sriov_vf(adev)) { ++ ring = &adev->sdma.instance[i].ring; ++ adev->nbio.funcs->sdma_doorbell_range(adev, i, ++ ring->use_doorbell, ring->doorbell_index, ++ adev->doorbell_index.sdma_doorbell_range); ++ + /* unhalt engine */ + temp = RREG32_SDMA(i, mmSDMA0_F32_CNTL); + temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0); +--- a/drivers/gpu/drm/amd/amdgpu/soc15.c ++++ b/drivers/gpu/drm/amd/amdgpu/soc15.c +@@ -1211,22 +1211,6 @@ static int soc15_common_sw_fini(void *ha + return 0; + } + +-static void soc15_doorbell_range_init(struct amdgpu_device *adev) +-{ +- int i; +- struct amdgpu_ring *ring; +- +- /* sdma/ih doorbell range are programed by hypervisor */ +- if (!amdgpu_sriov_vf(adev)) { +- for (i = 0; i < adev->sdma.num_instances; i++) { +- ring = &adev->sdma.instance[i].ring; +- adev->nbio.funcs->sdma_doorbell_range(adev, i, +- ring->use_doorbell, ring->doorbell_index, +- adev->doorbell_index.sdma_doorbell_range); +- } +- } +-} +- + static int soc15_common_hw_init(void *handle) + { + struct amdgpu_device *adev = (struct amdgpu_device *)handle; +@@ -1246,12 +1230,6 @@ static int soc15_common_hw_init(void *ha + + /* enable the doorbell aperture */ + soc15_enable_doorbell_aperture(adev, true); +- /* HW doorbell routing policy: doorbell writing not +- * in SDMA/IH/MM/ACV range will be routed to CP. So +- * we need to init SDMA/IH/MM/ACV doorbell range prior +- * to CP ip block init and ring test. +- */ +- soc15_doorbell_range_init(adev); + + return 0; + } diff --git a/queue-5.19/drm-i915-gt-fix-perf-limit-reasons-bit-positions.patch b/queue-5.19/drm-i915-gt-fix-perf-limit-reasons-bit-positions.patch new file mode 100644 index 00000000000..eab04324fe4 --- /dev/null +++ b/queue-5.19/drm-i915-gt-fix-perf-limit-reasons-bit-positions.patch @@ -0,0 +1,51 @@ +From d654f60898d56ffda461ef4ffd7bbe15159feb8d Mon Sep 17 00:00:00 2001 +From: Ashutosh Dixit +Date: Thu, 8 Sep 2022 08:58:21 -0700 +Subject: drm/i915/gt: Fix perf limit reasons bit positions + +From: Ashutosh Dixit + +commit d654f60898d56ffda461ef4ffd7bbe15159feb8d upstream. + +Perf limit reasons bit positions were off by one. + +Fixes: fa68bff7cf27 ("drm/i915/gt: Add sysfs throttle frequency interfaces") +Cc: stable@vger.kernel.org # v5.18+ +Signed-off-by: Ashutosh Dixit +Acked-by: Andi Shyti +Reviewed-by: Sujaritha Sundaresan +Signed-off-by: Matt Roper +Link: https://patchwork.freedesktop.org/patch/msgid/20220908155821.1662110-1-ashutosh.dixit@intel.com +Signed-off-by: Joonas Lahtinen +(cherry picked from commit 60017f34fc334d1bb25476b0b0996b4073e76c90) +Signed-off-by: Rodrigo Vivi +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/i915/i915_reg.h | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +--- a/drivers/gpu/drm/i915/i915_reg.h ++++ b/drivers/gpu/drm/i915/i915_reg.h +@@ -1849,14 +1849,14 @@ + + #define GT0_PERF_LIMIT_REASONS _MMIO(0x1381a8) + #define GT0_PERF_LIMIT_REASONS_MASK 0xde3 +-#define PROCHOT_MASK REG_BIT(1) +-#define THERMAL_LIMIT_MASK REG_BIT(2) +-#define RATL_MASK REG_BIT(6) +-#define VR_THERMALERT_MASK REG_BIT(7) +-#define VR_TDC_MASK REG_BIT(8) +-#define POWER_LIMIT_4_MASK REG_BIT(9) +-#define POWER_LIMIT_1_MASK REG_BIT(11) +-#define POWER_LIMIT_2_MASK REG_BIT(12) ++#define PROCHOT_MASK REG_BIT(0) ++#define THERMAL_LIMIT_MASK REG_BIT(1) ++#define RATL_MASK REG_BIT(5) ++#define VR_THERMALERT_MASK REG_BIT(6) ++#define VR_TDC_MASK REG_BIT(7) ++#define POWER_LIMIT_4_MASK REG_BIT(8) ++#define POWER_LIMIT_1_MASK REG_BIT(10) ++#define POWER_LIMIT_2_MASK REG_BIT(11) + + #define CHV_CLK_CTL1 _MMIO(0x101100) + #define VLV_CLK_CTL2 _MMIO(0x101104) diff --git a/queue-5.19/drm-i915-set-correct-domains-values-at-_i915_vma_move_to_active.patch b/queue-5.19/drm-i915-set-correct-domains-values-at-_i915_vma_move_to_active.patch new file mode 100644 index 00000000000..c84a3181f94 --- /dev/null +++ b/queue-5.19/drm-i915-set-correct-domains-values-at-_i915_vma_move_to_active.patch @@ -0,0 +1,48 @@ +From 08b812985996924c0ccf79d54a31fc9757c0a6ca Mon Sep 17 00:00:00 2001 +From: Nirmoy Das +Date: Wed, 7 Sep 2022 19:26:41 +0200 +Subject: drm/i915: Set correct domains values at _i915_vma_move_to_active + +From: Nirmoy Das + +commit 08b812985996924c0ccf79d54a31fc9757c0a6ca upstream. + +Fix regression introduced by commit: +"drm/i915: Individualize fences before adding to dma_resv obj" +which sets obj->read_domains to 0 for both read and write paths. +Also set obj->write_domain to 0 on read path which was removed by +the commit. + +References: https://gitlab.freedesktop.org/drm/intel/-/issues/6639 +Fixes: 420a07b841d0 ("drm/i915: Individualize fences before adding to dma_resv obj") +Signed-off-by: Nirmoy Das +Cc: # v5.16+ +Cc: Matthew Auld +Cc: Andrzej Hajda +Reviewed-by: Andrzej Hajda +Signed-off-by: Matthew Auld +Link: https://patchwork.freedesktop.org/patch/msgid/20220907172641.12555-1-nirmoy.das@intel.com +(cherry picked from commit 04f7eb3d4582a0a4da67c86e55fda7de2df86d91) +Signed-off-by: Rodrigo Vivi +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/i915/i915_vma.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/i915/i915_vma.c ++++ b/drivers/gpu/drm/i915/i915_vma.c +@@ -1870,12 +1870,13 @@ int _i915_vma_move_to_active(struct i915 + enum dma_resv_usage usage; + int idx; + +- obj->read_domains = 0; + if (flags & EXEC_OBJECT_WRITE) { + usage = DMA_RESV_USAGE_WRITE; + obj->write_domain = I915_GEM_DOMAIN_RENDER; ++ obj->read_domains = 0; + } else { + usage = DMA_RESV_USAGE_READ; ++ obj->write_domain = 0; + } + + dma_fence_array_for_each(curr, idx, fence) diff --git a/queue-5.19/io_uring-msg_ring-check-file-type-before-putting.patch b/queue-5.19/io_uring-msg_ring-check-file-type-before-putting.patch new file mode 100644 index 00000000000..4f2e1619b26 --- /dev/null +++ b/queue-5.19/io_uring-msg_ring-check-file-type-before-putting.patch @@ -0,0 +1,33 @@ +From fc7222c3a9f56271fba02aabbfbae999042f1679 Mon Sep 17 00:00:00 2001 +From: Jens Axboe +Date: Thu, 15 Sep 2022 11:44:35 -0600 +Subject: io_uring/msg_ring: check file type before putting + +From: Jens Axboe + +commit fc7222c3a9f56271fba02aabbfbae999042f1679 upstream. + +If we're invoked with a fixed file, follow the normal rules of not +calling io_fput_file(). Fixed files are permanently registered to the +ring, and do not need putting separately. + +Cc: stable@vger.kernel.org +Fixes: aa184e8671f0 ("io_uring: don't attempt to IOPOLL for MSG_RING requests") +Signed-off-by: Jens Axboe +Signed-off-by: Greg Kroah-Hartman +--- + io_uring/io_uring.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/io_uring/io_uring.c ++++ b/io_uring/io_uring.c +@@ -5061,7 +5061,8 @@ done: + req_set_fail(req); + __io_req_complete(req, issue_flags, ret, 0); + /* put file to avoid an attempt to IOPOLL the req */ +- io_put_file(req->file); ++ if (!(req->flags & REQ_F_FIXED_FILE)) ++ io_put_file(req->file); + req->file = NULL; + return 0; + } diff --git a/queue-5.19/of-device-fix-up-of_dma_configure_id-stub.patch b/queue-5.19/of-device-fix-up-of_dma_configure_id-stub.patch new file mode 100644 index 00000000000..56f2a9d971c --- /dev/null +++ b/queue-5.19/of-device-fix-up-of_dma_configure_id-stub.patch @@ -0,0 +1,40 @@ +From 40bfe7a86d84cf08ac6a8fe2f0c8bf7a43edd110 Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Wed, 24 Aug 2022 17:32:56 +0200 +Subject: of/device: Fix up of_dma_configure_id() stub + +From: Thierry Reding + +commit 40bfe7a86d84cf08ac6a8fe2f0c8bf7a43edd110 upstream. + +Since the stub version of of_dma_configure_id() was added in commit +a081bd4af4ce ("of/device: Add input id to of_dma_configure()"), it has +not matched the signature of the full function, leading to build failure +reports when code using this function is built on !OF configurations. + +Fixes: a081bd4af4ce ("of/device: Add input id to of_dma_configure()") +Cc: stable@vger.kernel.org +Signed-off-by: Thierry Reding +Reviewed-by: Frank Rowand +Acked-by: Lorenzo Pieralisi +Link: https://lore.kernel.org/r/20220824153256.1437483-1-thierry.reding@gmail.com +Signed-off-by: Rob Herring +Signed-off-by: Greg Kroah-Hartman +--- + include/linux/of_device.h | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/include/linux/of_device.h ++++ b/include/linux/of_device.h +@@ -101,8 +101,9 @@ static inline struct device_node *of_cpu + } + + static inline int of_dma_configure_id(struct device *dev, +- struct device_node *np, +- bool force_dma) ++ struct device_node *np, ++ bool force_dma, ++ const u32 *id) + { + return 0; + } diff --git a/queue-5.19/parisc-allow-config_64bit-with-arch-parisc.patch b/queue-5.19/parisc-allow-config_64bit-with-arch-parisc.patch new file mode 100644 index 00000000000..bbdfa30e801 --- /dev/null +++ b/queue-5.19/parisc-allow-config_64bit-with-arch-parisc.patch @@ -0,0 +1,56 @@ +From 805ce8614958c925877ba6b6dc26cdf9f8800474 Mon Sep 17 00:00:00 2001 +From: Helge Deller +Date: Tue, 13 Sep 2022 08:51:10 +0200 +Subject: parisc: Allow CONFIG_64BIT with ARCH=parisc + +From: Helge Deller + +commit 805ce8614958c925877ba6b6dc26cdf9f8800474 upstream. + +The previous patch triggered a build failure for the debian kernel, +which has CONFIG_64BIT enabled, uses the CROSS_COMPILER environment +variable and uses ARCH=parisc to configure the kernel for 64-bit +support. + +This patch weakens the previous patch while keeping the recommended way +to configure the kernel with: + ARCH=parisc -> build 32-bit kernel + ARCH=parisc64 -> build 64-bit kernel +while adding the possibility for debian to configure a 64-bit kernel +even if ARCH=parisc is set (PA8X00 CPU has to be selected and +CONFIG_64BIT needs to be enabled). + +The downside of this patch is, that we now have a small window open +again where people may get it wrong: if they enable CONFIG_64BIT and try +to compile with a 32-bit compiler. + +Fixes: 3dcfb729b5f4 ("parisc: Make CONFIG_64BIT available for ARCH=parisc64 only") +Signed-off-by: Helge Deller +Cc: # 5.15+ +Signed-off-by: Greg Kroah-Hartman +--- + arch/parisc/Kconfig | 12 +++++++++++- + 1 file changed, 11 insertions(+), 1 deletion(-) + +--- a/arch/parisc/Kconfig ++++ b/arch/parisc/Kconfig +@@ -225,8 +225,18 @@ config MLONGCALLS + Enabling this option will probably slow down your kernel. + + config 64BIT +- def_bool "$(ARCH)" = "parisc64" ++ def_bool y if "$(ARCH)" = "parisc64" ++ bool "64-bit kernel" if "$(ARCH)" = "parisc" + depends on PA8X00 ++ help ++ Enable this if you want to support 64bit kernel on PA-RISC platform. ++ ++ At the moment, only people willing to use more than 2GB of RAM, ++ or having a 64bit-only capable PA-RISC machine should say Y here. ++ ++ Since there is no 64bit userland on PA-RISC, there is no point to ++ enable this option otherwise. The 64bit kernel is significantly bigger ++ and slower than the 32bit one. + + choice + prompt "Kernel page size" diff --git a/queue-5.19/series b/queue-5.19/series index be180d02a65..0a78befec77 100644 --- a/queue-5.19/series +++ b/queue-5.19/series @@ -18,3 +18,17 @@ drm-i915-guc-cancel-guc-engine-busyness-worker-synch.patch block-blk_queue_enter-__bio_queue_enter-must-return-.patch parisc-ccio-dma-add-missing-iounmap-in-error-path-in.patch net-mvpp2-debugfs-fix-memory-leak-when-using-debugfs.patch +of-device-fix-up-of_dma_configure_id-stub.patch +io_uring-msg_ring-check-file-type-before-putting.patch +cifs-revalidate-mapping-when-doing-direct-writes.patch +cifs-don-t-send-down-the-destination-address-to-sendmsg-for-a-sock_stream.patch +cifs-always-initialize-struct-msghdr-smb_msg-completely.patch +blk-lib-fix-blkdev_issue_secure_erase.patch +parisc-allow-config_64bit-with-arch-parisc.patch +tools-include-uapi-fix-asm-errno.h-for-parisc-and-xtensa.patch +drm-i915-gt-fix-perf-limit-reasons-bit-positions.patch +drm-i915-set-correct-domains-values-at-_i915_vma_move_to_active.patch +drm-amdgpu-make-sure-to-init-common-ip-before-gmc.patch +drm-amdgpu-don-t-enable-ltr-if-not-supported.patch +drm-amdgpu-move-nbio-ih_doorbell_range-into-ih-code-for-vega.patch +drm-amdgpu-move-nbio-sdma_doorbell_range-into-sdma-code-for-vega.patch diff --git a/queue-5.19/tools-include-uapi-fix-asm-errno.h-for-parisc-and-xtensa.patch b/queue-5.19/tools-include-uapi-fix-asm-errno.h-for-parisc-and-xtensa.patch new file mode 100644 index 00000000000..340adf7770b --- /dev/null +++ b/queue-5.19/tools-include-uapi-fix-asm-errno.h-for-parisc-and-xtensa.patch @@ -0,0 +1,37 @@ +From 95363747a6f39e88a3052fcf6ce6237769495ce0 Mon Sep 17 00:00:00 2001 +From: Ben Hutchings +Date: Tue, 25 Aug 2020 23:27:40 +0100 +Subject: tools/include/uapi: Fix for parisc and xtensa + +From: Ben Hutchings + +commit 95363747a6f39e88a3052fcf6ce6237769495ce0 upstream. + +tools/include/uapi/asm/errno.h currently attempts to include +non-existent arch-specific errno.h header for xtensa. +Remove this case so that is used instead, +and add the missing arch-specific header for parisc. + +References: https://buildd.debian.org/status/fetch.php?pkg=linux&arch=ia64&ver=5.8.3-1%7Eexp1&stamp=1598340829&raw=1 +Signed-off-by: Ben Hutchings +Signed-off-by: Salvatore Bonaccorso +Cc: # 5.10+ +Signed-off-by: Helge Deller +Signed-off-by: Greg Kroah-Hartman +--- + tools/include/uapi/asm/errno.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/tools/include/uapi/asm/errno.h ++++ b/tools/include/uapi/asm/errno.h +@@ -9,8 +9,8 @@ + #include "../../../arch/alpha/include/uapi/asm/errno.h" + #elif defined(__mips__) + #include "../../../arch/mips/include/uapi/asm/errno.h" +-#elif defined(__xtensa__) +-#include "../../../arch/xtensa/include/uapi/asm/errno.h" ++#elif defined(__hppa__) ++#include "../../../arch/parisc/include/uapi/asm/errno.h" + #else + #include + #endif -- 2.47.3