From 505e2d9b020a4b89ce50fbc3a72eeae3a490c1f0 Mon Sep 17 00:00:00 2001 From: Jagannadha Sutradharudu Teki Date: Thu, 16 Aug 2012 18:45:02 +0530 Subject: [PATCH] Xilinx: ARM: Renamed Xil_out32 and Xil_In32 into XIo_Out32 and XIo_In32 Due to earlier cleanup, the definitions of Xil_Out32 and Xil_In32 macros are removed. So referenced them to current existing definitions. Signed-off-by: Jagannadha Sutradharudu Teki --- board/xilinx/zynq_common/board.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) diff --git a/board/xilinx/zynq_common/board.c b/board/xilinx/zynq_common/board.c index 06cf1313509..e5a17b4201e 100644 --- a/board/xilinx/zynq_common/board.c +++ b/board/xilinx/zynq_common/board.c @@ -36,9 +36,6 @@ u32 XIo_In32(u32 InAddress) return temp; } -#define Xil_Out32 -#define Xil_In32 - #ifdef CONFIG_FPGA Xilinx_desc fpga = XILINX_XC7Z020_DESC(0); #endif @@ -48,16 +45,16 @@ int board_init(void) /* temporary hack to clear pending irqs before Linux as it will hang Linux */ - Xil_Out32(0xe0001014, 0x26d); + XIo_Out32(0xe0001014, 0x26d); /* temporary hack to take USB out of reset til the is fixed in Linux */ - Xil_Out32(0xe000a204, 0x80); - Xil_Out32(0xe000a208, 0x80); - Xil_Out32(0xe000a040, 0x80); - Xil_Out32(0xe000a040, 0x00); - Xil_Out32(0xe000a040, 0x80); + XIo_Out32(0xe000a204, 0x80); + XIo_Out32(0xe000a208, 0x80); + XIo_Out32(0xe000a040, 0x80); + XIo_Out32(0xe000a040, 0x00); + XIo_Out32(0xe000a040, 0x80); icache_enable(); @@ -73,7 +70,7 @@ int board_late_init (void) { u32 boot_mode; - boot_mode = (Xil_In32(BOOT_MODE_REG) & BOOT_MODES_MASK); + boot_mode = (XIo_In32(BOOT_MODE_REG) & BOOT_MODES_MASK); switch(boot_mode) { case QSPI_MODE: setenv("modeboot", "run qspiboot"); -- 2.47.3