From 5251e475c33cb3ff67bdc252c2a665e926c1abce Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 5 Sep 2014 13:16:49 +0200 Subject: [PATCH] zynqmp: Setup clocks based on arm global timer cntfrq_el0 is setup by ATF(or different firmware) running in EL3. If u-boot runs in EL3, setup is done by u-boot itself to 4MHz. Signed-off-by: Michal Simek --- arch/arm/cpu/armv8/zynqmp/clk.c | 22 ++++++++++++++++++++++ include/configs/xilinx_zynqmp.h | 2 ++ 2 files changed, 24 insertions(+) diff --git a/arch/arm/cpu/armv8/zynqmp/clk.c b/arch/arm/cpu/armv8/zynqmp/clk.c index 2c51ad2901b..03d34227140 100644 --- a/arch/arm/cpu/armv8/zynqmp/clk.c +++ b/arch/arm/cpu/armv8/zynqmp/clk.c @@ -9,6 +9,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + unsigned long get_uart_clk(int dev_id) { u32 ver = zynqmp_get_silicon_version(); @@ -27,3 +29,23 @@ unsigned long get_ttc_clk(int dev_id) { return get_uart_clk(dev_id); } + +#ifdef CONFIG_CLOCKS +/** + * set_cpu_clk_info() - Initialize clock framework + * Always returns zero. + * + * This function is called from common code after relocation and sets up the + * clock framework. The framework must not be used before this function had been + * called. + */ +int set_cpu_clk_info(void) +{ + gd->cpu_clk = get_tbclk(); + + gd->bd->bi_arm_freq = gd->cpu_clk / 1000000; + gd->bd->bi_dsp_freq = 0; + + return 0; +} +#endif diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index cbbc91f47a2..2c69bcb1477 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -180,4 +180,6 @@ #define CONFIG_CMD_BOOTI #define CONFIG_CMD_UNZIP +#define CONFIG_CLOCKS + #endif /* __XILINX_ZYNQMP_H */ -- 2.47.3