From 5890a320f893b7db63b15a55feebb0e314baf47b Mon Sep 17 00:00:00 2001 From: Jiri Denemark Date: Fri, 6 May 2022 17:26:56 +0200 Subject: [PATCH] NEWS: Mention improved heuristics for CPU baseline Signed-off-by: Jiri Denemark Reviewed-by: Andrea Bolognani --- NEWS.rst | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/NEWS.rst b/NEWS.rst index 4a213682a4..7903449f9b 100644 --- a/NEWS.rst +++ b/NEWS.rst @@ -21,6 +21,14 @@ v8.4.0 (unreleased) * **Bug fixes** + * Improve heuristics for computing baseline CPU models + + Both ``virConnectBaselineHypervisorCPU`` and ``virConnectBaselineCPU`` were + in some cases computing the result using a CPU model which was newer than + some of the input models. For example, ``Cascadelake-Server`` was used as a + baseline for ``Skylake-Server-IBRS`` and ``Cascadelake-Server``. The CPU + model selection heuristics was improved to choose a more appropriate model. + v8.3.0 (2022-05-02) =================== -- 2.47.3