From 5f4bab7077947a4695744fdbf4c0c3b19ae7fe13 Mon Sep 17 00:00:00 2001 From: Michael Tremer Date: Thu, 28 Mar 2013 13:19:51 +0100 Subject: [PATCH] binutils: Update to 2.23.52.0.1 --- binutils/binutils.nm | 2 +- ...tils-2.22.52.0.1-relro-on-by-default.patch | 2 +- .../binutils-2.22.52.0.1-warn-textrel.patch | 51 +++ ...ls-2.23.52.0.1-as-doc-texinfo-fixes.patch0 | 279 ++++++++++++++ ...utils-2.23.52.0.1-hardened-crtbegin.patch} | 8 +- ...s-2.23.52.0.1-pt-pax-flags-20130326.patch} | 339 +++++++----------- 6 files changed, 468 insertions(+), 213 deletions(-) create mode 100644 binutils/patches/binutils-2.22.52.0.1-warn-textrel.patch create mode 100644 binutils/patches/binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch0 rename binutils/patches/{binutils-2.22-hardened-crtbegin.patch => binutils-2.23.52.0.1-hardened-crtbegin.patch} (71%) rename binutils/patches/{binutils-2.23.51.0.5-pt-pax-flags-20121112.patch => binutils-2.23.52.0.1-pt-pax-flags-20130326.patch} (75%) diff --git a/binutils/binutils.nm b/binutils/binutils.nm index 00da9a464..ecde05136 100644 --- a/binutils/binutils.nm +++ b/binutils/binutils.nm @@ -4,7 +4,7 @@ ############################################################################### name = binutils -version = 2.23.51.0.5 +version = 2.23.52.0.1 release = 1 maintainer = Michael Tremer diff --git a/binutils/patches/binutils-2.22.52.0.1-relro-on-by-default.patch b/binutils/patches/binutils-2.22.52.0.1-relro-on-by-default.patch index 3910df182..65a6c97b8 100644 --- a/binutils/patches/binutils-2.22.52.0.1-relro-on-by-default.patch +++ b/binutils/patches/binutils-2.22.52.0.1-relro-on-by-default.patch @@ -2,9 +2,9 @@ diff -Nur binutils-2.22.52.0.4-vanilla/ld/emultempl/armelf.em binutils-2.22.52.0 --- binutils-2.22.52.0.4-vanilla/ld/emultempl/armelf.em 2012-06-05 18:44:10.000000000 +0200 +++ binutils-2.22.52.0.4/ld/emultempl/armelf.em 2012-06-08 13:34:30.578427241 +0200 @@ -52,6 +52,7 @@ - #endif /* not TARGET_ */ input_flags.dynamic = ${DYNAMIC_LINK-TRUE}; config.has_shared = `if test -n "$GENERATE_SHLIB_SCRIPT" ; then echo TRUE ; else echo FALSE ; fi`; + config.separate_code = `if test "x${SEPARATE_CODE}" = xyes ; then echo TRUE ; else echo FALSE ; fi`; + link_info.relro = TRUE; } diff --git a/binutils/patches/binutils-2.22.52.0.1-warn-textrel.patch b/binutils/patches/binutils-2.22.52.0.1-warn-textrel.patch new file mode 100644 index 000000000..72a0477ec --- /dev/null +++ b/binutils/patches/binutils-2.22.52.0.1-warn-textrel.patch @@ -0,0 +1,51 @@ +textrels are bad for forcing copy-on-write (this affects everyone), +and for security/runtime code generation, this affects security ppl. +But in either case, it doesn't matter who needs textrels, it's +the very fact that they're needed at all. + +2006-06-10 Ned Ludd , Mike Frysinger + + * bfd/elflink.c (bfd_elf_final_link): Check all objects for TEXTRELs. + * ld/ldmain.c (main): Change textrel warning default to true. + * ld/testsuite/lib/ld-lib.exp (default_ld_simple_link): Scrub TEXTREL + warnings from ld output. + +--- a/bfd/elflink.c ++++ b/bfd/elflink.c +@@ -8652,7 +8652,7 @@ bfd_elf_final_link (bfd *abfd, struct bf + goto error_return; + + /* Check for DT_TEXTREL (late, in case the backend removes it). */ +- if (((info->warn_shared_textrel && info->shared) ++ if ((info->warn_shared_textrel + || info->error_textrel) + && (o = bfd_get_section_by_name (dynobj, ".dynamic")) != NULL) + { +@@ -8702,7 +8702,7 @@ bfd_elf_final_link (bfd *abfd, struct bf + (_("%P%X: read-only segment has dynamic relocations.\n")); + else + info->callbacks->einfo +- (_("%P: warning: creating a DT_TEXTREL in a shared object.\n")); ++ (_("%P: warning: creating a DT_TEXTREL in object.\n")); + break; + } + } +--- a/ld/ldmain.c ++++ b/ld/ldmain.c +@@ -282,2 +282,3 @@ main (int argc, char **argv) + link_info.spare_dynamic_tags = 5; ++ link_info.warn_shared_textrel = TRUE; + link_info.sharable_sections = FALSE; +--- a/ld/testsuite/lib/ld-lib.exp ++++ b/ld/testsuite/lib/ld-lib.exp +@@ -181,6 +181,10 @@ proc default_ld_simple_link { ld target + # symbol, since the default linker script might use ENTRY. + regsub -all "(^|\n)(\[^\n\]*: warning: cannot find entry symbol\[^\n\]*\n?)" $exec_output "\\1" exec_output + ++ # Gentoo tweak: ++ # We want to ignore TEXTREL warnings since we force enable them by default ++ regsub -all "^lt-ld-new: warning: creating a DT_TEXTREL in object\." $exec_output "\\1" exec_output ++ + if [string match "" $exec_output] then { + return 1 + } else { diff --git a/binutils/patches/binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch0 b/binutils/patches/binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch0 new file mode 100644 index 000000000..d0b657f0b --- /dev/null +++ b/binutils/patches/binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch0 @@ -0,0 +1,279 @@ +diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-arc.texi gas/doc/c-arc.texi +*** ../binutils-2.23.52.0.1.orig/gas/doc/c-arc.texi 2013-03-04 08:25:32.051931944 +0000 +--- gas/doc/c-arc.texi 2013-03-04 08:26:19.234930452 +0000 +*************** The extension instructions are not macro +*** 220,226 **** + encodings for use of these instructions according to the specification + by the user. The parameters are: + +! @table @bullet + @item @var{name} + Name of the extension instruction + +--- 220,226 ---- + encodings for use of these instructions according to the specification + by the user. The parameters are: + +! @table @code + @item @var{name} + Name of the extension instruction + +diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-arm.texi gas/doc/c-arm.texi +*** ../binutils-2.23.52.0.1.orig/gas/doc/c-arm.texi 2013-03-04 08:25:32.039931945 +0000 +--- gas/doc/c-arm.texi 2013-03-04 08:27:37.462927978 +0000 +*************** ARM and THUMB instructions had their own +*** 390,418 **** + @code{unified} syntax, which can be selected via the @code{.syntax} + directive, and has the following main features: + +! @table @bullet +! @item + Immediate operands do not require a @code{#} prefix. + +! @item + The @code{IT} instruction may appear, and if it does it is validated + against subsequent conditional affixes. In ARM mode it does not + generate machine code, in THUMB mode it does. + +! @item + For ARM instructions the conditional affixes always appear at the end + of the instruction. For THUMB instructions conditional affixes can be + used, but only inside the scope of an @code{IT} instruction. + +! @item + All of the instructions new to the V6T2 architecture (and later) are + available. (Only a few such instructions can be written in the + @code{divided} syntax). + +! @item + The @code{.N} and @code{.W} suffixes are recognized and honored. + +! @item + All instructions set the flags if and only if they have an @code{s} + affix. + @end table +--- 390,418 ---- + @code{unified} syntax, which can be selected via the @code{.syntax} + directive, and has the following main features: + +! @table @code +! @item 1 + Immediate operands do not require a @code{#} prefix. + +! @item 2 + The @code{IT} instruction may appear, and if it does it is validated + against subsequent conditional affixes. In ARM mode it does not + generate machine code, in THUMB mode it does. + +! @item 3 + For ARM instructions the conditional affixes always appear at the end + of the instruction. For THUMB instructions conditional affixes can be + used, but only inside the scope of an @code{IT} instruction. + +! @item 4 + All of the instructions new to the V6T2 architecture (and later) are + available. (Only a few such instructions can be written in the + @code{divided} syntax). + +! @item 5 + The @code{.N} and @code{.W} suffixes are recognized and honored. + +! @item 6 + All instructions set the flags if and only if they have an @code{s} + affix. + @end table +*************** Either @samp{#} or @samp{$} can be used +*** 451,478 **** + @cindex register names, ARM + *TODO* Explain about ARM register naming, and the predefined names. + +- @node ARM-Neon-Alignment +- @subsection NEON Alignment Specifiers +- +- @cindex alignment for NEON instructions +- Some NEON load/store instructions allow an optional address +- alignment qualifier. +- The ARM documentation specifies that this is indicated by +- @samp{@@ @var{align}}. However GAS already interprets +- the @samp{@@} character as a "line comment" start, +- so @samp{: @var{align}} is used instead. For example: +- +- @smallexample +- vld1.8 @{q0@}, [r0, :128] +- @end smallexample +- +- @node ARM Floating Point +- @section Floating Point +- +- @cindex floating point, ARM (@sc{ieee}) +- @cindex ARM floating point (@sc{ieee}) +- The ARM family uses @sc{ieee} floating-point numbers. +- + @node ARM-Relocations + @subsection ARM relocation generation + +--- 451,456 ---- +*************** respectively. For example to load the 3 +*** 519,524 **** +--- 497,524 ---- + MOVT r0, #:upper16:foo + @end smallexample + ++ @node ARM-Neon-Alignment ++ @subsection NEON Alignment Specifiers ++ ++ @cindex alignment for NEON instructions ++ Some NEON load/store instructions allow an optional address ++ alignment qualifier. ++ The ARM documentation specifies that this is indicated by ++ @samp{@@ @var{align}}. However GAS already interprets ++ the @samp{@@} character as a "line comment" start, ++ so @samp{: @var{align}} is used instead. For example: ++ ++ @smallexample ++ vld1.8 @{q0@}, [r0, :128] ++ @end smallexample ++ ++ @node ARM Floating Point ++ @section Floating Point ++ ++ @cindex floating point, ARM (@sc{ieee}) ++ @cindex ARM floating point (@sc{ieee}) ++ The ARM family uses @sc{ieee} floating-point numbers. ++ + @node ARM Directives + @section ARM Machine Directives + +diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-cr16.texi gas/doc/c-cr16.texi +*** ../binutils-2.23.52.0.1.orig/gas/doc/c-cr16.texi 2013-03-04 08:25:32.086931943 +0000 +--- gas/doc/c-cr16.texi 2013-03-04 08:28:09.304926971 +0000 +*************** Operand expression type qualifier is an +*** 44,69 **** + CR16 target operand qualifiers and its size (in bits): + + @table @samp +! @item Immediate Operand +! - s ---- 4 bits +! @item +! - m ---- 16 bits, for movb and movw instructions. +! @item +! - m ---- 20 bits, movd instructions. +! @item +! - l ---- 32 bits +! +! @item Absolute Operand +! - s ---- Illegal specifier for this operand. +! @item +! - m ---- 20 bits, movd instructions. +! +! @item Displacement Operand +! - s ---- 8 bits +! @item +! - m ---- 16 bits +! @item +! - l ---- 24 bits + @end table + + For example: +--- 44,76 ---- + CR16 target operand qualifiers and its size (in bits): + + @table @samp +! @item Immediate Operand: s +! 4 bits. +! +! @item Immediate Operand: m +! 16 bits, for movb and movw instructions. +! +! @item Immediate Operand: m +! 20 bits, movd instructions. +! +! @item Immediate Operand: l +! 32 bits. +! +! @item Absolute Operand: s +! Illegal specifier for this operand. +! +! @item Absolute Operand: m +! 20 bits, movd instructions. +! +! @item Displacement Operand: s +! 8 bits. +! +! @item Displacement Operand: m +! 16 bits. +! +! @item Displacement Operand: l +! 24 bits. +! + @end table + + For example: +diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-tic54x.texi gas/doc/c-tic54x.texi +*** ../binutils-2.23.52.0.1.orig/gas/doc/c-tic54x.texi 2013-03-04 08:25:32.035931945 +0000 +--- gas/doc/c-tic54x.texi 2013-03-04 08:28:38.186926057 +0000 +*************** In this example, x is replaced with SYM2 +*** 109,115 **** + is replaced with x. At this point, x has already been encountered + and the substitution stops. + +! @smallexample @code + .asg "x",SYM1 + .asg "SYM1",SYM2 + .asg "SYM2",x +--- 109,115 ---- + is replaced with x. At this point, x has already been encountered + and the substitution stops. + +! @smallexample + .asg "x",SYM1 + .asg "SYM1",SYM2 + .asg "SYM2",x +*************** Substitution may be forced in situations +*** 126,139 **** + ambiguous by placing colons on either side of the subsym. The following + code: + +! @smallexample @code + .eval "10",x + LAB:X: add #x, a + @end smallexample + + When assembled becomes: + +! @smallexample @code + LAB10 add #10, a + @end smallexample + +--- 126,139 ---- + ambiguous by placing colons on either side of the subsym. The following + code: + +! @smallexample + .eval "10",x + LAB:X: add #x, a + @end smallexample + + When assembled becomes: + +! @smallexample + LAB10 add #10, a + @end smallexample + +*************** The @code{LDX} pseudo-op is provided for +*** 309,315 **** + of a label or address. For example, if an address @code{_label} resides + in extended program memory, the value of @code{_label} may be loaded as + follows: +! @smallexample @code + ldx #_label,16,a ; loads extended bits of _label + or #_label,a ; loads lower 16 bits of _label + bacc a ; full address is in accumulator A +--- 309,315 ---- + of a label or address. For example, if an address @code{_label} resides + in extended program memory, the value of @code{_label} may be loaded as + follows: +! @smallexample + ldx #_label,16,a ; loads extended bits of _label + or #_label,a ; loads lower 16 bits of _label + bacc a ; full address is in accumulator A diff --git a/binutils/patches/binutils-2.22-hardened-crtbegin.patch b/binutils/patches/binutils-2.23.52.0.1-hardened-crtbegin.patch similarity index 71% rename from binutils/patches/binutils-2.22-hardened-crtbegin.patch rename to binutils/patches/binutils-2.23.52.0.1-hardened-crtbegin.patch index bc2618759..996bce5fc 100644 --- a/binutils/patches/binutils-2.22-hardened-crtbegin.patch +++ b/binutils/patches/binutils-2.23.52.0.1-hardened-crtbegin.patch @@ -14,10 +14,10 @@ PIE+PIC gcc objects (until we get a chance to rename them). if test "${ENABLE_INITFINI_ARRAY}" = "yes"; then SORT_INIT_ARRAY="KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))" SORT_FINI_ARRAY="KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))" -- CTORS_IN_INIT_ARRAY="KEEP (*(EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o $OTHER_EXCLUDE_FILES) .ctors))" -- DTORS_IN_FINI_ARRAY="KEEP (*(EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o $OTHER_EXCLUDE_FILES) .dtors))" -+ CTORS_IN_INIT_ARRAY="KEEP (*(EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtbeginTS.o *crtend.o *crtend?.o $OTHER_EXCLUDE_FILES) .ctors))" -+ DTORS_IN_FINI_ARRAY="KEEP (*(EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtbeginTS.o *crtend.o *crtend?.o $OTHER_EXCLUDE_FILES) .dtors))" +- CTORS_IN_INIT_ARRAY="EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o $OTHER_EXCLUDE_FILES) .ctors" +- DTORS_IN_FINI_ARRAY="EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o $OTHER_EXCLUDE_FILES) .dtors" ++ CTORS_IN_INIT_ARRAY="EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtbeginTS.o *crtend.o *crtend?.o $OTHER_EXCLUDE_FILES) .ctors" ++ DTORS_IN_FINI_ARRAY="EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtbeginTS.o *crtend.o *crtend?.o $OTHER_EXCLUDE_FILES) .dtors" else SORT_INIT_ARRAY="KEEP (*(SORT(.init_array.*)))" SORT_FINI_ARRAY="KEEP (*(SORT(.fini_array.*)))" diff --git a/binutils/patches/binutils-2.23.51.0.5-pt-pax-flags-20121112.patch b/binutils/patches/binutils-2.23.52.0.1-pt-pax-flags-20130326.patch similarity index 75% rename from binutils/patches/binutils-2.23.51.0.5-pt-pax-flags-20121112.patch rename to binutils/patches/binutils-2.23.52.0.1-pt-pax-flags-20130326.patch index 9b476c3c2..b173b2ae7 100644 --- a/binutils/patches/binutils-2.23.51.0.5-pt-pax-flags-20121112.patch +++ b/binutils/patches/binutils-2.23.52.0.1-pt-pax-flags-20130326.patch @@ -1,5 +1,5 @@ ---- binutils-2.23.51.0.5/bfd/elf-bfd.h -+++ binutils-2.23.51.0.5/bfd/elf-bfd.h +--- binutils-2.23.52.0.1/bfd/elf-bfd.h ++++ binutils-2.23.52.0.1/bfd/elf-bfd.h @@ -1577,6 +1577,9 @@ struct elf_obj_tdata /* Segment flags for the PT_GNU_STACK segment. */ unsigned int stack_flags; @@ -7,11 +7,19 @@ + /* Segment flags for the PT_PAX_FLAGS segment. */ + unsigned int pax_flags; + - /* Symbol version definitions in external objects. */ - Elf_Internal_Verdef *verdef; - ---- binutils-2.23.51.0.5/bfd/elf.c -+++ binutils-2.23.51.0.5/bfd/elf.c + /* This is set to TRUE if the object was created by the backend + linker. */ + bfd_boolean linker; +@@ -1707,6 +1707,7 @@ + #define elf_eh_frame_hdr(bfd) (elf_tdata(bfd) -> o->eh_frame_hdr) + #define elf_linker(bfd) (elf_tdata(bfd) -> o->linker) + #define elf_stack_flags(bfd) (elf_tdata(bfd) -> o->stack_flags) ++#define elf_pax_flags(bfd) (elf_tdata(bfd) -> o->pax_flags) + #define elf_shstrtab(bfd) (elf_tdata(bfd) -> o->strtab_ptr) + #define elf_onesymtab(bfd) (elf_tdata(bfd) -> symtab_section) + #define elf_symtab_shndx(bfd) (elf_tdata(bfd) -> symtab_shndx_section) +--- binutils-2.23.52.0.1/bfd/elf.c ++++ binutils-2.23.52.0.1/bfd/elf.c @@ -1158,6 +1158,7 @@ get_segment_type (unsigned int p_type) case PT_GNU_EH_FRAME: pt = "EH_FRAME"; break; case PT_GNU_STACK: pt = "STACK"; break; @@ -53,7 +61,7 @@ + goto error_return; + m->next = NULL; + m->p_type = PT_PAX_FLAGS; -+ m->p_flags = elf_tdata (abfd)->pax_flags; ++ m->p_flags = elf_pax_flags (abfd); + m->p_flags_valid = 1; + + *pm = m; @@ -81,31 +89,31 @@ && (segment->p_type != PT_TLS \ || (section->flags & SEC_THREAD_LOCAL)) \ && (segment->p_type == PT_LOAD \ ---- binutils-2.23.51.0.5/bfd/elflink.c -+++ binutils-2.23.51.0.5/bfd/elflink.c +--- binutils-2.23.52.0.1/bfd/elflink.c ++++ binutils-2.23.52.0.1/bfd/elflink.c @@ -5545,17 +5545,30 @@ bfd_elf_size_dynamic_sections (bfd *output_bfd, && ! (*bed->elf_backend_always_size_sections) (output_bfd, info)) return FALSE; -+ elf_tdata (output_bfd)->pax_flags = PF_NORANDEXEC; ++ elf_pax_flags (output_bfd) = PF_NORANDEXEC; + if (info->execheap) -+ elf_tdata (output_bfd)->pax_flags |= PF_NOMPROTECT; ++ elf_pax_flags (output_bfd) |= PF_NOMPROTECT; + else if (info->noexecheap) -+ elf_tdata (output_bfd)->pax_flags |= PF_MPROTECT; ++ elf_pax_flags (output_bfd) |= PF_MPROTECT; + /* Determine any GNU_STACK segment requirements, after the backend has had a chance to set a default segment size. */ if (info->execstack) -- elf_tdata (output_bfd)->stack_flags = PF_R | PF_W | PF_X; +- elf_stack_flags (output_bfd) = PF_R | PF_W | PF_X; + { -+ elf_tdata (output_bfd)->stack_flags = PF_R | PF_W | PF_X; -+ elf_tdata (output_bfd)->pax_flags |= PF_EMUTRAMP; ++ elf_stack_flags (output_bfd) = PF_R | PF_W | PF_X; ++ elf_pax_flags (output_bfd) |= PF_EMUTRAMP; + } else if (info->noexecstack) -- elf_tdata (output_bfd)->stack_flags = PF_R | PF_W; +- elf_stack_flags (output_bfd) = PF_R | PF_W; + { -+ elf_tdata (output_bfd)->stack_flags = PF_R | PF_W; -+ elf_tdata (output_bfd)->pax_flags |= PF_NOEMUTRAMP; ++ elf_stack_flags (output_bfd) = PF_R | PF_W; ++ elf_pax_flags (output_bfd) |= PF_NOEMUTRAMP; + } else { @@ -113,7 +121,7 @@ asection *notesec = NULL; int exec = 0; -+ elf_tdata (output_bfd)->pax_flags |= PF_NOEMUTRAMP; ++ elf_pax_flags (output_bfd) |= PF_NOEMUTRAMP; for (inputobj = info->input_bfds; inputobj; inputobj = inputobj->link_next) @@ -123,15 +131,15 @@ if (s->flags & SEC_CODE) - exec = PF_X; + { -+ elf_tdata (output_bfd)->pax_flags &= ~PF_NOEMUTRAMP; -+ elf_tdata (output_bfd)->pax_flags |= PF_EMUTRAMP; ++ elf_pax_flags (output_bfd) &= ~PF_NOEMUTRAMP; ++ elf_pax_flags (output_bfd) |= PF_EMUTRAMP; + exec = PF_X; + } notesec = s; } else if (bed->default_execstack) ---- binutils-2.23.51.0.5/binutils/readelf.c -+++ binutils-2.23.51.0.5/binutils/readelf.c +--- binutils-2.23.52.0.1/binutils/readelf.c ++++ binutils-2.23.52.0.1/binutils/readelf.c @@ -2740,6 +2740,7 @@ get_segment_type (unsigned long p_type) return "GNU_EH_FRAME"; case PT_GNU_STACK: return "GNU_STACK"; @@ -140,8 +148,8 @@ default: if ((p_type >= PT_LOPROC) && (p_type <= PT_HIPROC)) ---- binutils-2.23.51.0.5/include/bfdlink.h -+++ binutils-2.23.51.0.5/include/bfdlink.h +--- binutils-2.23.52.0.1/include/bfdlink.h ++++ binutils-2.23.52.0.1/include/bfdlink.h @@ -322,6 +322,14 @@ struct bfd_link_info /* TRUE if PT_GNU_RELRO segment should be created. */ unsigned int relro: 1; @@ -157,8 +165,8 @@ /* TRUE if .eh_frame_hdr section and PT_GNU_EH_FRAME ELF segment should be created. */ unsigned int eh_frame_hdr: 1; ---- binutils-2.23.51.0.5/include/elf/common.h -+++ binutils-2.23.51.0.5/include/elf/common.h +--- binutils-2.23.52.0.1/include/elf/common.h ++++ binutils-2.23.52.0.1/include/elf/common.h @@ -429,6 +429,7 @@ #define PT_SUNW_EH_FRAME PT_GNU_EH_FRAME /* Solaris uses the same value */ #define PT_GNU_STACK (PT_LOOS + 0x474e551) /* Stack flags */ @@ -189,8 +197,8 @@ /* Values for section header, sh_type field. */ #define SHT_NULL 0 /* Section header table entry unused */ ---- binutils-2.23.51.0.5/ld/emultempl/elf32.em -+++ binutils-2.23.51.0.5/ld/emultempl/elf32.em +--- binutils-2.23.52.0.1/ld/emultempl/elf32.em ++++ binutils-2.23.52.0.1/ld/emultempl/elf32.em @@ -2285,6 +2285,16 @@ fragment <]*> 3c1c0043 lui gp,0x43 00408d64 <[^>]*> 279c2c98 addiu gp,gp,11416 ---- binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.sd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.sd +--- binutils-2.23.52.0.1/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.sd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-mips-elf/pic-and-nonpic-3a.sd @@ -1,7 +1,7 @@ Elf file type is DYN \(Shared object file\) @@ -568,8 +576,8 @@ *0*3 * \.dynamic * *0*4 * + *0*5 * ---- binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.sd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.sd +--- binutils-2.23.52.0.1/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.sd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.sd @@ -1,7 +1,7 @@ Elf file type is EXEC \(Executable file\) @@ -592,8 +600,8 @@ *0*6 *\.dynamic * *0*7 * + *0*8 * ---- binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.sd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.sd +--- binutils-2.23.52.0.1/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.sd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.sd @@ -1,7 +1,7 @@ Elf file type is EXEC \(Executable file\) @@ -616,8 +624,8 @@ *0*6 * \.dynamic * *0*7 * + *0*8 * ---- binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.sd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.sd +--- binutils-2.23.52.0.1/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.sd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.sd @@ -1,7 +1,7 @@ Elf file type is EXEC \(Executable file\) @@ -640,8 +648,8 @@ *0*6 * \.dynamic * *0*7 * + *0*8 * ---- binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.sd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.sd +--- binutils-2.23.52.0.1/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.sd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.sd @@ -1,7 +1,7 @@ Elf file type is EXEC \(Executable file\) @@ -664,8 +672,8 @@ *0*6 * \.dynamic * *0*7 * + *0*8 * ---- binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.sd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.sd +--- binutils-2.23.52.0.1/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.sd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.sd @@ -1,7 +1,7 @@ Elf file type is EXEC \(Executable file\) @@ -688,8 +696,8 @@ *0*5 * \.dynamic * *0*6 * + *0*7 * ---- binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.sd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.sd +--- binutils-2.23.52.0.1/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.sd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.sd @@ -1,7 +1,7 @@ Elf file type is EXEC \(Executable file\) @@ -712,91 +720,8 @@ *0*6 * \.dynamic * *0*7 * + *0*8 * ---- binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/tlsbin-o32.d -+++ binutils-2.23.51.0.5/ld/testsuite/ld-mips-elf/tlsbin-o32.d -@@ -2,42 +2,42 @@ - - Disassembly of section .text: - --004000d0 <__start>: -- 4000d0: 3c1c0fc0 lui gp,0xfc0 -- 4000d4: 279c7f30 addiu gp,gp,32560 -- 4000d8: 0399e021 addu gp,gp,t9 -- 4000dc: 27bdfff0 addiu sp,sp,-16 -- 4000e0: afbe0008 sw s8,8\(sp\) -- 4000e4: 03a0f021 move s8,sp -- 4000e8: afbc0000 sw gp,0\(sp\) -- 4000ec: 8f998018 lw t9,-32744\(gp\) -- 4000f0: 27848028 addiu a0,gp,-32728 -- 4000f4: 0320f809 jalr t9 -- 4000f8: 00000000 nop -- 4000fc: 8fdc0000 lw gp,0\(s8\) -- 400100: 00000000 nop -- 400104: 8f998018 lw t9,-32744\(gp\) -- 400108: 27848020 addiu a0,gp,-32736 -- 40010c: 0320f809 jalr t9 -- 400110: 00000000 nop -- 400114: 8fdc0000 lw gp,0\(s8\) -- 400118: 00401021 move v0,v0 -- 40011c: 3c030000 lui v1,0x0 -- 400120: 24638000 addiu v1,v1,-32768 -- 400124: 00621821 addu v1,v1,v0 -- 400128: 7c02283b rdhwr v0,\$5 -- 40012c: 8f83801c lw v1,-32740\(gp\) -- 400130: 00000000 nop -- 400134: 00621821 addu v1,v1,v0 -- 400138: 7c02283b rdhwr v0,\$5 -- 40013c: 3c030000 lui v1,0x0 -- 400140: 24639004 addiu v1,v1,-28668 -- 400144: 00621821 addu v1,v1,v0 -- 400148: 03c0e821 move sp,s8 -- 40014c: 8fbe0008 lw s8,8\(sp\) -- 400150: 03e00008 jr ra -- 400154: 27bd0010 addiu sp,sp,16 -+00400[0-9a-f]{3} <__start>: -+ 400[0-9a-f]{3}: 3c1c0fc0 lui gp,0xfc0 -+ 400[0-9a-f]{3}: 279c7f30 addiu gp,gp,32560 -+ 400[0-9a-f]{3}: 0399e021 addu gp,gp,t9 -+ 400[0-9a-f]{3}: 27bdfff0 addiu sp,sp,-16 -+ 400[0-9a-f]{3}: afbe0008 sw s8,8\(sp\) -+ 400[0-9a-f]{3}: 03a0f021 move s8,sp -+ 400[0-9a-f]{3}: afbc0000 sw gp,0\(sp\) -+ 400[0-9a-f]{3}: 8f998018 lw t9,-32744\(gp\) -+ 400[0-9a-f]{3}: 27848028 addiu a0,gp,-32728 -+ 400[0-9a-f]{3}: 0320f809 jalr t9 -+ 400[0-9a-f]{3}: 00000000 nop -+ 400[0-9a-f]{3}: 8fdc0000 lw gp,0\(s8\) -+ 400[0-9a-f]{3}: 00000000 nop -+ 400[0-9a-f]{3}: 8f998018 lw t9,-32744\(gp\) -+ 400[0-9a-f]{3}: 27848020 addiu a0,gp,-32736 -+ 400[0-9a-f]{3}: 0320f809 jalr t9 -+ 400[0-9a-f]{3}: 00000000 nop -+ 400[0-9a-f]{3}: 8fdc0000 lw gp,0\(s8\) -+ 400[0-9a-f]{3}: 00401021 move v0,v0 -+ 400[0-9a-f]{3}: 3c030000 lui v1,0x0 -+ 400[0-9a-f]{3}: 24638000 addiu v1,v1,-32768 -+ 400[0-9a-f]{3}: 00621821 addu v1,v1,v0 -+ 400[0-9a-f]{3}: 7c02283b rdhwr v0,\$5 -+ 400[0-9a-f]{3}: 8f83801c lw v1,-32740\(gp\) -+ 400[0-9a-f]{3}: 00000000 nop -+ 400[0-9a-f]{3}: 00621821 addu v1,v1,v0 -+ 400[0-9a-f]{3}: 7c02283b rdhwr v0,\$5 -+ 400[0-9a-f]{3}: 3c030000 lui v1,0x0 -+ 400[0-9a-f]{3}: 24639004 addiu v1,v1,-28668 -+ 400[0-9a-f]{3}: 00621821 addu v1,v1,v0 -+ 400[0-9a-f]{3}: 03c0e821 move sp,s8 -+ 400[0-9a-f]{3}: 8fbe0008 lw s8,8\(sp\) -+ 400[0-9a-f]{3}: 03e00008 jr ra -+ 400[0-9a-f]{3}: 27bd0010 addiu sp,sp,16 - --00400158 <__tls_get_addr>: -- 400158: 03e00008 jr ra -- 40015c: 00000000 nop -+00400[0-9a-f]{3} <__tls_get_addr>: -+ 400[0-9a-f]{3}: 03e00008 jr ra -+ 400[0-9a-f]{3}: 00000000 nop ---- binutils-2.23.51.0.5/ld/testsuite/ld-powerpc/tlsexe32.r -+++ binutils-2.23.51.0.5/ld/testsuite/ld-powerpc/tlsexe32.r +--- binutils-2.23.52.0.1/ld/testsuite/ld-powerpc/tlsexe32.r ++++ binutils-2.23.52.0.1/ld/testsuite/ld-powerpc/tlsexe32.r @@ -33,13 +33,14 @@ There are [0-9]+ program headers, starting at offset [0-9]+ Program Headers: @@ -822,8 +747,8 @@ Relocation section '\.rela\.dyn' at offset .* contains 2 entries: Offset +Info +Type +Sym\. Value +Symbol's Name \+ Addend ---- binutils-2.23.51.0.5/ld/testsuite/ld-powerpc/tlsso32.r -+++ binutils-2.23.51.0.5/ld/testsuite/ld-powerpc/tlsso32.r +--- binutils-2.23.52.0.1/ld/testsuite/ld-powerpc/tlsso32.r ++++ binutils-2.23.52.0.1/ld/testsuite/ld-powerpc/tlsso32.r @@ -35,6 +35,7 @@ Program Headers: +LOAD .* RWE 0x10000 +DYNAMIC .* RW +0x4 @@ -853,8 +778,8 @@ [0-9a-f ]+R_PPC_DTPMOD32 +0 [0-9a-f ]+R_PPC_DTPREL32 +0 [0-9a-f ]+R_PPC_DTPMOD32 +0 ---- binutils-2.23.51.0.5/ld/testsuite/ld-s390/tlsbin.rd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-s390/tlsbin.rd +--- binutils-2.23.52.0.1/ld/testsuite/ld-s390/tlsbin.rd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-s390/tlsbin.rd @@ -36,6 +36,7 @@ There are [0-9]+ program headers, starting at offset [0-9]+ +LOAD .* RW +0x1000 +DYNAMIC .* RW +0x4 @@ -871,8 +796,8 @@ Relocation section '.rela.dyn' at offset .* contains 4 entries: Offset +Info +Type +Sym.Value +Sym. Name \+ Addend ---- binutils-2.23.51.0.5/ld/testsuite/ld-s390/tlsbin_64.rd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-s390/tlsbin_64.rd +--- binutils-2.23.52.0.1/ld/testsuite/ld-s390/tlsbin_64.rd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-s390/tlsbin_64.rd @@ -36,6 +36,7 @@ There are [0-9]+ program headers, starting at offset [0-9]+ +LOAD .* RW +0x1000 +DYNAMIC .* RW +0x8 @@ -889,8 +814,8 @@ Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 4 entries: +Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend ---- binutils-2.23.51.0.5/ld/testsuite/ld-s390/tlspic.rd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-s390/tlspic.rd +--- binutils-2.23.52.0.1/ld/testsuite/ld-s390/tlspic.rd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-s390/tlspic.rd @@ -39,6 +39,7 @@ Program Headers: +LOAD .* RW +0x1000 +DYNAMIC .* RW +0x4 @@ -907,8 +832,8 @@ Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries: Offset +Info +Type +Sym.Value +Sym. Name \+ Addend ---- binutils-2.23.51.0.5/ld/testsuite/ld-s390/tlspic_64.rd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-s390/tlspic_64.rd +--- binutils-2.23.52.0.1/ld/testsuite/ld-s390/tlspic_64.rd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-s390/tlspic_64.rd @@ -39,6 +39,7 @@ Program Headers: +LOAD .* RW +0x1000 +DYNAMIC .* RW +0x8 @@ -925,8 +850,8 @@ Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries: +Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend ---- binutils-2.23.51.0.5/ld/testsuite/ld-sh/tlsbin-2.d -+++ binutils-2.23.51.0.5/ld/testsuite/ld-sh/tlsbin-2.d +--- binutils-2.23.52.0.1/ld/testsuite/ld-sh/tlsbin-2.d ++++ binutils-2.23.52.0.1/ld/testsuite/ld-sh/tlsbin-2.d @@ -44,6 +44,7 @@ Program Headers: +LOAD.* +DYNAMIC.* @@ -943,8 +868,8 @@ Relocation section '\.rela\.dyn' at offset 0x[0-9a-f]+ contains 4 entries: Offset +Info +Type +Sym\.Value +Sym\. Name \+ Addend ---- binutils-2.23.51.0.5/ld/testsuite/ld-sh/tlspic-2.d -+++ binutils-2.23.51.0.5/ld/testsuite/ld-sh/tlspic-2.d +--- binutils-2.23.52.0.1/ld/testsuite/ld-sh/tlspic-2.d ++++ binutils-2.23.52.0.1/ld/testsuite/ld-sh/tlspic-2.d @@ -32,7 +32,7 @@ Key to Flags: Elf file type is DYN \(Shared object file\) @@ -970,8 +895,8 @@ Relocation section '\.rela\.dyn' at offset 0x[0-9a-f]+ contains 10 entries: Offset +Info +Type +Sym\.Value +Sym\. Name \+ Addend ---- binutils-2.23.51.0.5/ld/testsuite/ld-sparc/gotop32.rd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-sparc/gotop32.rd +--- binutils-2.23.52.0.1/ld/testsuite/ld-sparc/gotop32.rd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-sparc/gotop32.rd @@ -31,6 +31,7 @@ Program Headers: +LOAD +0x0+ 0x0+ 0x0+ 0x0+2000 0x0+2000 R E 0x10000 +LOAD +0x0+2000 0x0+12000 0x0+12000 0x0+2000 0x0+2000 RW +0x10000 @@ -980,8 +905,8 @@ #... Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: ---- binutils-2.23.51.0.5/ld/testsuite/ld-sparc/gotop64.rd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-sparc/gotop64.rd +--- binutils-2.23.52.0.1/ld/testsuite/ld-sparc/gotop64.rd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-sparc/gotop64.rd @@ -31,6 +31,7 @@ Program Headers: +LOAD +0x0+ 0x0+ 0x0+ 0x0+2000 0x0+2000 R E 0x100000 +LOAD +0x0+2000 0x0+102000 0x0+102000 0x0+2000 0x0+2000 RW +0x100000 @@ -990,8 +915,8 @@ #... Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: ---- binutils-2.23.51.0.5/ld/testsuite/ld-sparc/tlssunbin32.rd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-sparc/tlssunbin32.rd +--- binutils-2.23.52.0.1/ld/testsuite/ld-sparc/tlssunbin32.rd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-sparc/tlssunbin32.rd @@ -30,13 +30,14 @@ There are [0-9]+ program headers, starting at offset [0-9]+ Program Headers: @@ -1009,8 +934,8 @@ #... Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 4 entries: ---- binutils-2.23.51.0.5/ld/testsuite/ld-sparc/tlssunbin64.rd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-sparc/tlssunbin64.rd +--- binutils-2.23.52.0.1/ld/testsuite/ld-sparc/tlssunbin64.rd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-sparc/tlssunbin64.rd @@ -30,13 +30,14 @@ There are [0-9]+ program headers, starting at offset [0-9]+ Program Headers: @@ -1028,8 +953,8 @@ #... Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 4 entries: ---- binutils-2.23.51.0.5/ld/testsuite/ld-sparc/tlssunnopic32.rd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-sparc/tlssunnopic32.rd +--- binutils-2.23.52.0.1/ld/testsuite/ld-sparc/tlssunnopic32.rd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-sparc/tlssunnopic32.rd @@ -32,6 +32,7 @@ Program Headers: +LOAD .* RW +0x10000 +DYNAMIC .* RW +0x4 @@ -1038,8 +963,8 @@ #... Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 12 entries: ---- binutils-2.23.51.0.5/ld/testsuite/ld-sparc/tlssunnopic64.rd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-sparc/tlssunnopic64.rd +--- binutils-2.23.52.0.1/ld/testsuite/ld-sparc/tlssunnopic64.rd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-sparc/tlssunnopic64.rd @@ -32,6 +32,7 @@ Program Headers: +LOAD .* RW +0x100000 +DYNAMIC .* RW +0x8 @@ -1048,8 +973,8 @@ #... Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries: ---- binutils-2.23.51.0.5/ld/testsuite/ld-sparc/tlssunpic32.rd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-sparc/tlssunpic32.rd +--- binutils-2.23.52.0.1/ld/testsuite/ld-sparc/tlssunpic32.rd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-sparc/tlssunpic32.rd @@ -36,6 +36,7 @@ Program Headers: +LOAD +0x0+2000 0x0+12000 0x0+12000 0x0+184 0x0+184 RWE 0x10000 +DYNAMIC +0x0+2060 0x0+12060 0x0+12060 0x0+98 0x0+98 RW +0x4 @@ -1058,8 +983,8 @@ #... Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries: ---- binutils-2.23.51.0.5/ld/testsuite/ld-sparc/tlssunpic64.rd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-sparc/tlssunpic64.rd +--- binutils-2.23.52.0.1/ld/testsuite/ld-sparc/tlssunpic64.rd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-sparc/tlssunpic64.rd @@ -36,6 +36,7 @@ Program Headers: +LOAD +0x0+2000 0x0+102000 0x0+102000 0x0+3a0 0x0+3a0 RWE 0x100000 +DYNAMIC +0x0+2060 0x0+102060 0x0+102060 0x0+130 0x0+130 RW +0x8 @@ -1068,8 +993,8 @@ #... Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 14 entries: ---- binutils-2.23.51.0.5/ld/testsuite/ld-x86-64/tlsgdesc.rd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-x86-64/tlsgdesc.rd +--- binutils-2.23.52.0.1/ld/testsuite/ld-x86-64/tlsgdesc.rd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-x86-64/tlsgdesc.rd @@ -36,12 +36,14 @@ Program Headers: +LOAD.* +LOAD.* @@ -1085,8 +1010,8 @@ Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 8 entries: +Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend ---- binutils-2.23.51.0.5/ld/testsuite/ld-x86-64/tlspic.rd -+++ binutils-2.23.51.0.5/ld/testsuite/ld-x86-64/tlspic.rd +--- binutils-2.23.52.0.1/ld/testsuite/ld-x86-64/tlspic.rd ++++ binutils-2.23.52.0.1/ld/testsuite/ld-x86-64/tlspic.rd @@ -40,6 +40,7 @@ Program Headers: +LOAD +0x0+11ac 0x0+2011ac 0x0+2011ac 0x0+244 0x0+244 RW +0x200000 +DYNAMIC +0x0+1210 0x0+201210 0x0+201210 0x0+130 0x0+130 RW +0x8 -- 2.47.3