From 5fe8d1dba706ee5234acef29c4410ade89170193 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Jouni=20H=C3=B6gander?= Date: Thu, 7 Aug 2025 07:26:35 +0300 Subject: [PATCH] drm/i915/dsi: Fix overflow issue in pclk parsing MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Parsed divider p will overflow and is considered being valid in case pll_ctl == 0. Fix this by checking divider p before decreasing it. Also small improvement is made by using fls() instead of custom loop. v2: use fls() and check parsed divider Signed-off-by: Jouni Högander Reviewed-by: Jani Nikula Link: https://lore.kernel.org/r/20250807042635.2491537-1-jouni.hogander@intel.com --- drivers/gpu/drm/i915/display/vlv_dsi_pll.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c index b52463fdec472..83afe1315e966 100644 --- a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c +++ b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c @@ -142,11 +142,9 @@ static int vlv_dsi_pclk(struct intel_encoder *encoder, pll_div &= DSI_PLL_M1_DIV_MASK; pll_div = pll_div >> DSI_PLL_M1_DIV_SHIFT; - while (pll_ctl) { - pll_ctl = pll_ctl >> 1; - p++; - } - p--; + p = fls(pll_ctl); + if (p) + p--; if (!p) { drm_err(display->drm, "wrong P1 divisor\n"); -- 2.47.3