From 60de04226687ac35309142e0c8d5b34e7665711d Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Mon, 20 Oct 2025 21:50:27 +0300 Subject: [PATCH] drm/i915/vrr: Use trans_vrr_ctl() in intel_vrr_transcoder_disable() MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Currently intel_vrr_disable() writes TRANS_VRR_CTL() with trans_vrr_ctl(), whereas intel_vrr_transcoder_disable() always writes just a plain 0. Write trans_vrr_ctl() in both places to unify the code, allowing for more shared code in the future. Since the VRR timing generator will be disabled by the TRANS_VRR_CTL write it doesn't really matter what we write to the register (other than VRR_CTL_VRR_ENABLE that is). Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20251020185038.4272-12-ville.syrjala@linux.intel.com Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 562a5feadaab9..19b38ad771896 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -779,7 +779,8 @@ void intel_vrr_transcoder_disable(const struct intel_crtc_state *crtc_state) if (!intel_vrr_possible(crtc_state)) return; - intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), 0); + intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), + trans_vrr_ctl(crtc_state)); intel_vrr_wait_for_live_status_clear(display, cpu_transcoder); -- 2.47.3