From 641fa6c75f9f4875f73c0d92fd1e5acd725f3bca Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Sun, 2 Jul 2023 19:44:07 +0200 Subject: [PATCH] 6.1-stable patches added patches: drm-amd-display-do-not-update-drr-while-bw-optimizations-pending.patch drm-amd-display-remove-optimization-for-vrr-updates.patch --- ...e-drr-while-bw-optimizations-pending.patch | 107 ++++++++++++++++++ ...-remove-optimization-for-vrr-updates.patch | 34 ++++++ queue-6.1/series | 2 + 3 files changed, 143 insertions(+) create mode 100644 queue-6.1/drm-amd-display-do-not-update-drr-while-bw-optimizations-pending.patch create mode 100644 queue-6.1/drm-amd-display-remove-optimization-for-vrr-updates.patch diff --git a/queue-6.1/drm-amd-display-do-not-update-drr-while-bw-optimizations-pending.patch b/queue-6.1/drm-amd-display-do-not-update-drr-while-bw-optimizations-pending.patch new file mode 100644 index 00000000000..2f2f0ada463 --- /dev/null +++ b/queue-6.1/drm-amd-display-do-not-update-drr-while-bw-optimizations-pending.patch @@ -0,0 +1,107 @@ +From 32953485c558cecf08f33fbfa251e80e44cef981 Mon Sep 17 00:00:00 2001 +From: Aric Cyr +Date: Wed, 8 Feb 2023 19:51:42 -0500 +Subject: drm/amd/display: Do not update DRR while BW optimizations pending + +From: Aric Cyr + +commit 32953485c558cecf08f33fbfa251e80e44cef981 upstream. + +[why] +While bandwidth optimizations are pending, it's possible a pstate change +will occur. During this time, VSYNC handler should not also try to update +DRR parameters causing pstate hang + +[how] +Do not adjust DRR if optimize bandwidth is set. + +Reviewed-by: Aric Cyr +Acked-by: Qingqing Zhuo +Signed-off-by: Aric Cyr +Tested-by: Daniel Wheeler +Signed-off-by: Alex Deucher +Cc: Mario Limonciello +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/core/dc.c | 48 ++++++++++++++++++------------- + 1 file changed, 29 insertions(+), 19 deletions(-) + +--- a/drivers/gpu/drm/amd/display/dc/core/dc.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc.c +@@ -401,6 +401,13 @@ bool dc_stream_adjust_vmin_vmax(struct d + { + int i; + ++ /* ++ * Don't adjust DRR while there's bandwidth optimizations pending to ++ * avoid conflicting with firmware updates. ++ */ ++ if (dc->optimized_required || dc->wm_optimized_required) ++ return false; ++ + stream->adjust.v_total_max = adjust->v_total_max; + stream->adjust.v_total_mid = adjust->v_total_mid; + stream->adjust.v_total_mid_frame_num = adjust->v_total_mid_frame_num; +@@ -2021,27 +2028,33 @@ void dc_post_update_surfaces_to_stream(s + + post_surface_trace(dc); + +- if (dc->ctx->dce_version >= DCE_VERSION_MAX) +- TRACE_DCN_CLOCK_STATE(&context->bw_ctx.bw.dcn.clk); +- else ++ /* ++ * Only relevant for DCN behavior where we can guarantee the optimization ++ * is safe to apply - retain the legacy behavior for DCE. ++ */ ++ ++ if (dc->ctx->dce_version < DCE_VERSION_MAX) + TRACE_DCE_CLOCK_STATE(&context->bw_ctx.bw.dce); ++ else { ++ TRACE_DCN_CLOCK_STATE(&context->bw_ctx.bw.dcn.clk); + +- if (is_flip_pending_in_pipes(dc, context)) +- return; ++ if (is_flip_pending_in_pipes(dc, context)) ++ return; + +- for (i = 0; i < dc->res_pool->pipe_count; i++) +- if (context->res_ctx.pipe_ctx[i].stream == NULL || +- context->res_ctx.pipe_ctx[i].plane_state == NULL) { +- context->res_ctx.pipe_ctx[i].pipe_idx = i; +- dc->hwss.disable_plane(dc, &context->res_ctx.pipe_ctx[i]); +- } ++ for (i = 0; i < dc->res_pool->pipe_count; i++) ++ if (context->res_ctx.pipe_ctx[i].stream == NULL || ++ context->res_ctx.pipe_ctx[i].plane_state == NULL) { ++ context->res_ctx.pipe_ctx[i].pipe_idx = i; ++ dc->hwss.disable_plane(dc, &context->res_ctx.pipe_ctx[i]); ++ } + +- process_deferred_updates(dc); ++ process_deferred_updates(dc); + +- dc->hwss.optimize_bandwidth(dc, context); ++ dc->hwss.optimize_bandwidth(dc, context); + +- if (dc->debug.enable_double_buffered_dsc_pg_support) +- dc->hwss.update_dsc_pg(dc, context, true); ++ if (dc->debug.enable_double_buffered_dsc_pg_support) ++ dc->hwss.update_dsc_pg(dc, context, true); ++ } + + dc->optimized_required = false; + dc->wm_optimized_required = false; +@@ -3866,12 +3879,9 @@ void dc_commit_updates_for_stream(struct + if (new_pipe->plane_state && new_pipe->plane_state != old_pipe->plane_state) + new_pipe->plane_state->force_full_update = true; + } +- } else if (update_type == UPDATE_TYPE_FAST && dc_ctx->dce_version >= DCE_VERSION_MAX) { ++ } else if (update_type == UPDATE_TYPE_FAST) { + /* + * Previous frame finished and HW is ready for optimization. +- * +- * Only relevant for DCN behavior where we can guarantee the optimization +- * is safe to apply - retain the legacy behavior for DCE. + */ + dc_post_update_surfaces_to_stream(dc); + } diff --git a/queue-6.1/drm-amd-display-remove-optimization-for-vrr-updates.patch b/queue-6.1/drm-amd-display-remove-optimization-for-vrr-updates.patch new file mode 100644 index 00000000000..371bbe1049c --- /dev/null +++ b/queue-6.1/drm-amd-display-remove-optimization-for-vrr-updates.patch @@ -0,0 +1,34 @@ +From 3442f4e0e55555d14b099c17382453fdfd2508d5 Mon Sep 17 00:00:00 2001 +From: Alvin Lee +Date: Thu, 20 Oct 2022 11:46:49 -0400 +Subject: drm/amd/display: Remove optimization for VRR updates + +From: Alvin Lee + +commit 3442f4e0e55555d14b099c17382453fdfd2508d5 upstream. + +Optimization caused unexpected regression, so remove for now. + +Tested-by: Mark Broadworth +Reviewed-by: Aric Cyr +Acked-by: Rodrigo Siqueira +Signed-off-by: Alvin Lee +Signed-off-by: Alex Deucher +Cc: Mario Limonciello +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/amd/display/dc/core/dc.c | 3 --- + 1 file changed, 3 deletions(-) + +--- a/drivers/gpu/drm/amd/display/dc/core/dc.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc.c +@@ -401,9 +401,6 @@ bool dc_stream_adjust_vmin_vmax(struct d + { + int i; + +- if (memcmp(adjust, &stream->adjust, sizeof(struct dc_crtc_timing_adjust)) == 0) +- return true; +- + stream->adjust.v_total_max = adjust->v_total_max; + stream->adjust.v_total_mid = adjust->v_total_mid; + stream->adjust.v_total_mid_frame_num = adjust->v_total_mid_frame_num; diff --git a/queue-6.1/series b/queue-6.1/series index 602d35c3a02..023b4ce4175 100644 --- a/queue-6.1/series +++ b/queue-6.1/series @@ -1 +1,3 @@ xtensa-fix-lock_mm_and_find_vma-in-case-vma-not-found.patch +drm-amd-display-remove-optimization-for-vrr-updates.patch +drm-amd-display-do-not-update-drr-while-bw-optimizations-pending.patch -- 2.47.3