From 753ed4fa4e815669a025e08f5101ce0d91f46c8a Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Fri, 6 Feb 2026 09:04:15 +0800 Subject: [PATCH] arm64: dts: rockchip: Add DisplayPort dt node for rk3576 The DisplayPort on rk3576 is compliant with DisplayPort Specification Version 1.4 with MST support, and share the USBDP combo PHY with USB 3.1 OTG0 controller. Signed-off-by: Andy Yan Reviewed-by: Sebastian Reichel Tested-by: Sebastian Reichel Link: https://patch.msgid.link/20260206010421.443605-6-andyshrk@163.com Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3576.dtsi | 28 ++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi index 49ccdf12ef7eb..53ff6bd027af8 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -1483,6 +1483,34 @@ }; }; + dp: dp@27e40000 { + compatible = "rockchip,rk3576-dp"; + reg = <0x0 0x27e40000 0x0 0x30000>; + interrupts = ; + assigned-clocks = <&cru CLK_AUX16MHZ_0>; + assigned-clock-rates = <16000000>; + clocks = <&cru PCLK_DP0>, <&cru CLK_AUX16MHZ_0>, + <&cru ACLK_DP0>; + clock-names = "apb", "aux", "hdcp"; + resets = <&cru SRST_DP0>; + phys = <&usbdp_phy PHY_TYPE_DP>; + power-domains = <&power RK3576_PD_VO1>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + dp0_in: port@0 { + reg = <0>; + }; + + dp0_out: port@1 { + reg = <1>; + }; + }; + }; + sai7: sai@27ed0000 { compatible = "rockchip,rk3576-sai"; reg = <0x0 0x27ed0000 0x0 0x1000>; -- 2.47.3