From 7563275af91120326a41fff960e657831fca3cf9 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Tue, 27 Jul 2010 16:25:39 -0700 Subject: [PATCH] .32 patches --- .../drm-i915-define-mi_arb_state-bits.patch | 93 +++++++++++++++++++ ...power-render-writes-on-gen3-hardware.patch | 53 +++++++++++ ...g4x-style-pll-search-more-permissive.patch | 52 +++++++++++ ...kms-add-quirk-for-asus-hd-3600-board.patch | 38 ++++++++ ...on-kms-fix-legacy-lvds-dpms-sequence.patch | 33 +++++++ ...-r200-handle-more-hw-tex-coord-types.patch | 35 +++++++ ..._remove_module-down-into-free_module.patch | 50 ++++++++++ ...915-fix-lock-imbalance-on-error-path.patch | 30 ++++++ queue-2.6.32/series | 8 ++ 9 files changed, 392 insertions(+) create mode 100644 queue-2.6.32/drm-i915-define-mi_arb_state-bits.patch create mode 100644 queue-2.6.32/drm-i915-enable-low-power-render-writes-on-gen3-hardware.patch create mode 100644 queue-2.6.32/drm-i915-make-g4x-style-pll-search-more-permissive.patch create mode 100644 queue-2.6.32/drm-radeon-kms-add-quirk-for-asus-hd-3600-board.patch create mode 100644 queue-2.6.32/drm-radeon-kms-fix-legacy-lvds-dpms-sequence.patch create mode 100644 queue-2.6.32/drm-radeon-r200-handle-more-hw-tex-coord-types.patch create mode 100644 queue-2.6.32/dynamic-debug-move-ddebug_remove_module-down-into-free_module.patch create mode 100644 queue-2.6.32/i915-fix-lock-imbalance-on-error-path.patch diff --git a/queue-2.6.32/drm-i915-define-mi_arb_state-bits.patch b/queue-2.6.32/drm-i915-define-mi_arb_state-bits.patch new file mode 100644 index 00000000000..bb16b21d48b --- /dev/null +++ b/queue-2.6.32/drm-i915-define-mi_arb_state-bits.patch @@ -0,0 +1,93 @@ +From 45503ded966c98e604c9667c0b458d40666b9ef3 Mon Sep 17 00:00:00 2001 +From: Keith Packard +Date: Mon, 19 Jul 2010 21:12:35 -0700 +Subject: drm/i915: Define MI_ARB_STATE bits + +From: Keith Packard + +commit 45503ded966c98e604c9667c0b458d40666b9ef3 upstream. + +The i915 memory arbiter has a register full of configuration +bits which are currently not defined in the driver header file. + +Signed-off-by: Keith Packard +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_reg.h | 64 ++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 64 insertions(+) + +--- a/drivers/gpu/drm/i915/i915_reg.h ++++ b/drivers/gpu/drm/i915/i915_reg.h +@@ -307,6 +307,70 @@ + #define LM_BURST_LENGTH 0x00000700 + #define LM_FIFO_WATERMARK 0x0000001F + #define MI_ARB_STATE 0x020e4 /* 915+ only */ ++#define MI_ARB_MASK_SHIFT 16 /* shift for enable bits */ ++ ++/* Make render/texture TLB fetches lower priorty than associated data ++ * fetches. This is not turned on by default ++ */ ++#define MI_ARB_RENDER_TLB_LOW_PRIORITY (1 << 15) ++ ++/* Isoch request wait on GTT enable (Display A/B/C streams). ++ * Make isoch requests stall on the TLB update. May cause ++ * display underruns (test mode only) ++ */ ++#define MI_ARB_ISOCH_WAIT_GTT (1 << 14) ++ ++/* Block grant count for isoch requests when block count is ++ * set to a finite value. ++ */ ++#define MI_ARB_BLOCK_GRANT_MASK (3 << 12) ++#define MI_ARB_BLOCK_GRANT_8 (0 << 12) /* for 3 display planes */ ++#define MI_ARB_BLOCK_GRANT_4 (1 << 12) /* for 2 display planes */ ++#define MI_ARB_BLOCK_GRANT_2 (2 << 12) /* for 1 display plane */ ++#define MI_ARB_BLOCK_GRANT_0 (3 << 12) /* don't use */ ++ ++/* Enable render writes to complete in C2/C3/C4 power states. ++ * If this isn't enabled, render writes are prevented in low ++ * power states. That seems bad to me. ++ */ ++#define MI_ARB_C3_LP_WRITE_ENABLE (1 << 11) ++ ++/* This acknowledges an async flip immediately instead ++ * of waiting for 2TLB fetches. ++ */ ++#define MI_ARB_ASYNC_FLIP_ACK_IMMEDIATE (1 << 10) ++ ++/* Enables non-sequential data reads through arbiter ++ */ ++#define MI_ARB_DUAL_DATA_PHASE_DISABLE (1 << 9) ++ ++/* Disable FSB snooping of cacheable write cycles from binner/render ++ * command stream ++ */ ++#define MI_ARB_CACHE_SNOOP_DISABLE (1 << 8) ++ ++/* Arbiter time slice for non-isoch streams */ ++#define MI_ARB_TIME_SLICE_MASK (7 << 5) ++#define MI_ARB_TIME_SLICE_1 (0 << 5) ++#define MI_ARB_TIME_SLICE_2 (1 << 5) ++#define MI_ARB_TIME_SLICE_4 (2 << 5) ++#define MI_ARB_TIME_SLICE_6 (3 << 5) ++#define MI_ARB_TIME_SLICE_8 (4 << 5) ++#define MI_ARB_TIME_SLICE_10 (5 << 5) ++#define MI_ARB_TIME_SLICE_14 (6 << 5) ++#define MI_ARB_TIME_SLICE_16 (7 << 5) ++ ++/* Low priority grace period page size */ ++#define MI_ARB_LOW_PRIORITY_GRACE_4KB (0 << 4) /* default */ ++#define MI_ARB_LOW_PRIORITY_GRACE_8KB (1 << 4) ++ ++/* Disable display A/B trickle feed */ ++#define MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE (1 << 2) ++ ++/* Set display plane priority */ ++#define MI_ARB_DISPLAY_PRIORITY_A_B (0 << 0) /* display A > display B */ ++#define MI_ARB_DISPLAY_PRIORITY_B_A (1 << 0) /* display B > display A */ ++ + #define CACHE_MODE_0 0x02120 /* 915+ only */ + #define CM0_MASK_SHIFT 16 + #define CM0_IZ_OPT_DISABLE (1<<6) diff --git a/queue-2.6.32/drm-i915-enable-low-power-render-writes-on-gen3-hardware.patch b/queue-2.6.32/drm-i915-enable-low-power-render-writes-on-gen3-hardware.patch new file mode 100644 index 00000000000..3624e7dfd5d --- /dev/null +++ b/queue-2.6.32/drm-i915-enable-low-power-render-writes-on-gen3-hardware.patch @@ -0,0 +1,53 @@ +From 944001201ca0196bcdb088129e5866a9f379d08c Mon Sep 17 00:00:00 2001 +From: Dave Airlie +Date: Tue, 20 Jul 2010 13:15:31 +1000 +Subject: drm/i915: enable low power render writes on GEN3 hardware. + +From: Dave Airlie + +commit 944001201ca0196bcdb088129e5866a9f379d08c upstream. + +A lot of 945GMs have had stability issues for a long time, this manifested as X hangs, blitter engine hangs, and lots of crashes. + +one such report is at: +https://bugs.freedesktop.org/show_bug.cgi?id=20560 + +along with numerous distro bugzillas. + +This only took a week of digging and hair ripping to figure out. + +Tracked down and tested on a 945GM Lenovo T60, +previously running +x11perf -copypixwin500 +or +x11perf -copywinpix500 +repeatedly would cause the GPU to wedge within 4 or 5 tries, with random busy bits set. + +After this patch no hangs were observed. + +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_gem.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/drivers/gpu/drm/i915/i915_gem.c ++++ b/drivers/gpu/drm/i915/i915_gem.c +@@ -4697,6 +4697,16 @@ i915_gem_load(struct drm_device *dev) + list_add(&dev_priv->mm.shrink_list, &shrink_list); + spin_unlock(&shrink_list_lock); + ++ /* On GEN3 we really need to make sure the ARB C3 LP bit is set */ ++ if (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { ++ u32 tmp = I915_READ(MI_ARB_STATE); ++ if (!(tmp & MI_ARB_C3_LP_WRITE_ENABLE)) { ++ /* arb state is a masked write, so set bit + bit in mask */ ++ tmp = MI_ARB_C3_LP_WRITE_ENABLE | (MI_ARB_C3_LP_WRITE_ENABLE << MI_ARB_MASK_SHIFT); ++ I915_WRITE(MI_ARB_STATE, tmp); ++ } ++ } ++ + /* Old X drivers will take 0-2 for front, back, depth buffers */ + dev_priv->fence_reg_start = 3; + diff --git a/queue-2.6.32/drm-i915-make-g4x-style-pll-search-more-permissive.patch b/queue-2.6.32/drm-i915-make-g4x-style-pll-search-more-permissive.patch new file mode 100644 index 00000000000..f2def672cef --- /dev/null +++ b/queue-2.6.32/drm-i915-make-g4x-style-pll-search-more-permissive.patch @@ -0,0 +1,52 @@ +From 6ba770dc5c334aff1c055c8728d34656e0f091e2 Mon Sep 17 00:00:00 2001 +From: Adam Jackson +Date: Fri, 2 Jul 2010 16:43:30 -0400 +Subject: drm/i915: Make G4X-style PLL search more permissive + +From: Adam Jackson + +commit 6ba770dc5c334aff1c055c8728d34656e0f091e2 upstream. + +Fixes an Ironlake laptop with a 68.940MHz 1280x800 panel and 120MHz SSC +reference clock. + +More generally, the 0.488% tolerance used before is just too tight to +reliably find a PLL setting. I extracted the search algorithm and +modified it to find the dot clocks with maximum error over the valid +range for the given output type: + +http://people.freedesktop.org/~ajax/intel_g4x_find_best_pll.c + +This gave: + +Worst dotclock for Ironlake DAC refclk is 350000kHz (error 0.00571) +Worst dotclock for Ironlake SL-LVDS refclk is 102321kHz (error 0.00524) +Worst dotclock for Ironlake DL-LVDS refclk is 219642kHz (error 0.00488) +Worst dotclock for Ironlake SL-LVDS SSC refclk is 84374kHz (error 0.00529) +Worst dotclock for Ironlake DL-LVDS SSC refclk is 183035kHz (error 0.00488) +Worst dotclock for G4X SDVO refclk is 267600kHz (error 0.00448) +Worst dotclock for G4X HDMI refclk is 334400kHz (error 0.00478) +Worst dotclock for G4X SL-LVDS refclk is 95571kHz (error 0.00449) +Worst dotclock for G4X DL-LVDS refclk is 224000kHz (error 0.00510) + +Signed-off-by: Adam Jackson +Signed-off-by: Eric Anholt +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_display.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -785,8 +785,8 @@ intel_g4x_find_best_PLL(const intel_limi + intel_clock_t clock; + int max_n; + bool found; +- /* approximately equals target * 0.00488 */ +- int err_most = (target >> 8) + (target >> 10); ++ /* approximately equals target * 0.00585 */ ++ int err_most = (target >> 8) + (target >> 9); + found = false; + + if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { diff --git a/queue-2.6.32/drm-radeon-kms-add-quirk-for-asus-hd-3600-board.patch b/queue-2.6.32/drm-radeon-kms-add-quirk-for-asus-hd-3600-board.patch new file mode 100644 index 00000000000..12857271a19 --- /dev/null +++ b/queue-2.6.32/drm-radeon-kms-add-quirk-for-asus-hd-3600-board.patch @@ -0,0 +1,38 @@ +From e153b70b89770968a704eda0b55707c6066b2d44 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Tue, 20 Jul 2010 18:07:22 -0400 +Subject: drm/radeon/kms: add quirk for ASUS HD 3600 board + +From: Alex Deucher + +commit e153b70b89770968a704eda0b55707c6066b2d44 upstream. + +Connector is actually DVI rather than HDMI. + +Reported-by: trapDoor +Signed-off-by: Alex Deucher +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_atombios.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/drivers/gpu/drm/radeon/radeon_atombios.c ++++ b/drivers/gpu/drm/radeon/radeon_atombios.c +@@ -161,6 +161,15 @@ static bool radeon_atom_apply_quirks(str + } + } + ++ /* ASUS HD 3600 board lists the DVI port as HDMI */ ++ if ((dev->pdev->device == 0x9598) && ++ (dev->pdev->subsystem_vendor == 0x1043) && ++ (dev->pdev->subsystem_device == 0x01e4)) { ++ if (*connector_type == DRM_MODE_CONNECTOR_HDMIA) { ++ *connector_type = DRM_MODE_CONNECTOR_DVII; ++ } ++ } ++ + /* ASUS HD 3450 board lists the DVI port as HDMI */ + if ((dev->pdev->device == 0x95C5) && + (dev->pdev->subsystem_vendor == 0x1043) && diff --git a/queue-2.6.32/drm-radeon-kms-fix-legacy-lvds-dpms-sequence.patch b/queue-2.6.32/drm-radeon-kms-fix-legacy-lvds-dpms-sequence.patch new file mode 100644 index 00000000000..c7d7a126bdc --- /dev/null +++ b/queue-2.6.32/drm-radeon-kms-fix-legacy-lvds-dpms-sequence.patch @@ -0,0 +1,33 @@ +From 15cb02c0a0338ee724bf23e31c7c410ecbffeeba Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Wed, 21 Jul 2010 19:37:21 -0400 +Subject: drm/radeon/kms: fix legacy LVDS dpms sequence + +From: Alex Deucher + +commit 15cb02c0a0338ee724bf23e31c7c410ecbffeeba upstream. + +Add delay after turning off the LVDS encoder. + +Fixes: +https://bugzilla.kernel.org/show_bug.cgi?id=16389 + +Tested-by: Jan Kreuzer +Signed-off-by: Alex Deucher +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_legacy_encoders.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c ++++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +@@ -89,6 +89,7 @@ static void radeon_legacy_lvds_dpms(stru + udelay(panel_pwr_delay * 1000); + WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); + WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); ++ udelay(panel_pwr_delay * 1000); + break; + } + diff --git a/queue-2.6.32/drm-radeon-r200-handle-more-hw-tex-coord-types.patch b/queue-2.6.32/drm-radeon-r200-handle-more-hw-tex-coord-types.patch new file mode 100644 index 00000000000..dffd87e57cf --- /dev/null +++ b/queue-2.6.32/drm-radeon-r200-handle-more-hw-tex-coord-types.patch @@ -0,0 +1,35 @@ +From 688acaa2897462e4c5e2482496e2868db0760809 Mon Sep 17 00:00:00 2001 +From: Roland Scheidegger +Date: Sat, 12 Jun 2010 13:31:10 -0400 +Subject: drm/radeon/r200: handle more hw tex coord types + +From: Roland Scheidegger + +commit 688acaa2897462e4c5e2482496e2868db0760809 upstream. + +Code did not handle projected 2d and depth coordinates, meaning potentially +set 3d or cube special handling might stick. +(Not sure what depth coord actually does, but I guess handling it +like a normal coordinate is the right thing to do.) +Might be related to https://bugs.freedesktop.org/show_bug.cgi?id=26428 + +Signed-off-by: sroland@vmware.com +Signed-off-by: Alex Deucher +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/r200.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/gpu/drm/radeon/r200.c ++++ b/drivers/gpu/drm/radeon/r200.c +@@ -368,6 +368,8 @@ int r200_packet0_check(struct radeon_cs_ + /* 2D, 3D, CUBE */ + switch (tmp) { + case 0: ++ case 3: ++ case 4: + case 5: + case 6: + case 7: diff --git a/queue-2.6.32/dynamic-debug-move-ddebug_remove_module-down-into-free_module.patch b/queue-2.6.32/dynamic-debug-move-ddebug_remove_module-down-into-free_module.patch new file mode 100644 index 00000000000..e5c4162d4ba --- /dev/null +++ b/queue-2.6.32/dynamic-debug-move-ddebug_remove_module-down-into-free_module.patch @@ -0,0 +1,50 @@ +From b82bab4bbe9efa7bc7177fc20620fff19bd95484 Mon Sep 17 00:00:00 2001 +From: Jason Baron +Date: Tue, 27 Jul 2010 13:18:01 -0700 +Subject: dynamic debug: move ddebug_remove_module() down into free_module() + +From: Jason Baron + +commit b82bab4bbe9efa7bc7177fc20620fff19bd95484 upstream. + +The command + + echo "file ec.c +p" >/sys/kernel/debug/dynamic_debug/control + +causes an oops. + +Move the call to ddebug_remove_module() down into free_module(). In this +way it should be called from all error paths. Currently, we are missing +the remove if the module init routine fails. + +Signed-off-by: Jason Baron +Reported-by: Thomas Renninger +Tested-by: Thomas Renninger +Signed-off-by: Andrew Morton +Signed-off-by: Linus Torvalds +Signed-off-by: Greg Kroah-Hartman + +--- + kernel/module.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/kernel/module.c ++++ b/kernel/module.c +@@ -870,7 +870,6 @@ SYSCALL_DEFINE2(delete_module, const cha + mutex_lock(&module_mutex); + /* Store the name of the last unloaded module for diagnostic purposes */ + strlcpy(last_unloaded_module, mod->name, sizeof(last_unloaded_module)); +- ddebug_remove_module(mod->name); + free_module(mod); + + out: +@@ -1533,6 +1532,9 @@ static void free_module(struct module *m + remove_sect_attrs(mod); + mod_kobject_remove(mod); + ++ /* Remove dynamic debug info */ ++ ddebug_remove_module(mod->name); ++ + /* Arch-specific cleanup. */ + module_arch_cleanup(mod); + diff --git a/queue-2.6.32/i915-fix-lock-imbalance-on-error-path.patch b/queue-2.6.32/i915-fix-lock-imbalance-on-error-path.patch new file mode 100644 index 00000000000..ae548eb122c --- /dev/null +++ b/queue-2.6.32/i915-fix-lock-imbalance-on-error-path.patch @@ -0,0 +1,30 @@ +From f953c9353f5fe6e98fa7f32f51060a74d845b5f8 Mon Sep 17 00:00:00 2001 +From: Daniel J Blueman +Date: Mon, 17 May 2010 14:23:52 +0100 +Subject: i915: fix lock imbalance on error path... + +From: Daniel J Blueman + +commit f953c9353f5fe6e98fa7f32f51060a74d845b5f8 upstream. + +While investigating Intel i5 Arrandale GPU lockups with -rc4, I +noticed a lock imbalance. + +Signed-off-by: Daniel J Blueman +Signed-off-by: Eric Anholt +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/i915_drv.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/gpu/drm/i915/i915_drv.c ++++ b/drivers/gpu/drm/i915/i915_drv.c +@@ -192,6 +192,7 @@ int i965_reset(struct drm_device *dev, u + } + } else { + DRM_ERROR("Error occurred. Don't know how to reset this chip.\n"); ++ mutex_unlock(&dev->struct_mutex); + return -ENODEV; + } + diff --git a/queue-2.6.32/series b/queue-2.6.32/series index 9e5cd3c34d5..401a7e95a9a 100644 --- a/queue-2.6.32/series +++ b/queue-2.6.32/series @@ -28,3 +28,11 @@ mac80211-do-not-wip-out-old-supported-rates.patch mac80211-handle-mesh-action-frames-in-ieee80211_rx_h_action.patch btrfs-fix-checks-in-btrfs_ioc_clone_range.patch p54pci-add-symbol-ap-300-minipci-adapters-pciid.patch +dynamic-debug-move-ddebug_remove_module-down-into-free_module.patch +i915-fix-lock-imbalance-on-error-path.patch +drm-i915-define-mi_arb_state-bits.patch +drm-i915-enable-low-power-render-writes-on-gen3-hardware.patch +drm-i915-make-g4x-style-pll-search-more-permissive.patch +drm-radeon-r200-handle-more-hw-tex-coord-types.patch +drm-radeon-kms-add-quirk-for-asus-hd-3600-board.patch +drm-radeon-kms-fix-legacy-lvds-dpms-sequence.patch -- 2.47.3