From 79808be79c790a0ed0b82b9043a8c835315cccb4 Mon Sep 17 00:00:00 2001 From: Carl Love Date: Wed, 22 Apr 2015 16:17:06 +0000 Subject: [PATCH] Add support for the TEXASRU register. This register contains information on transactional memory instruction summary information. This register contains the upper 32-bits of the transaction information. Note, the valgrind implementation of transactional memory instructions is limited. Currently, the contents of the TEXASRU register will always return 0. The lower 64-bits of the trasnaction information in the TEXASR register will contain the failure information as setup by Valgrind. The vex commit 3143 contains the changes needed to support the TEXASRU register on PPC64. The support requires changing the value of MAX_REG_WRITE_SIZE in memcheck/mc_main.c from 1696 to 1712. The change is made in this valgrind commit. This patch addresses Bugzilla 346474 git-svn-id: svn://svn.valgrind.org/valgrind/trunk@15134 --- memcheck/mc_main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/memcheck/mc_main.c b/memcheck/mc_main.c index 5cd2414151..1fc156151b 100644 --- a/memcheck/mc_main.c +++ b/memcheck/mc_main.c @@ -4142,7 +4142,7 @@ static UInt mb_get_origin_for_guest_offset ( ThreadId tid, static void mc_post_reg_write ( CorePart part, ThreadId tid, PtrdiffT offset, SizeT size) { -# define MAX_REG_WRITE_SIZE 1696 +# define MAX_REG_WRITE_SIZE 1712 UChar area[MAX_REG_WRITE_SIZE]; tl_assert(size <= MAX_REG_WRITE_SIZE); VG_(memset)(area, V_BITS8_DEFINED, size); -- 2.47.3