From 82a1e739010b3134862b27123684c26cd3b471e7 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Philippe=20Mathieu-Daud=C3=A9?= Date: Wed, 8 Oct 2025 08:34:14 +0200 Subject: [PATCH] target/sh4: Convert CPUSH4State::sr register to uint32_t type MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Since its introduction in commit fdf9b3e831e the %SR register is a uint32_t type. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson Message-Id: <20251008064814.90520-2-philmd@linaro.org> --- target/sh4/cpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index c41ab70dd7..db27a693f1 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -365,14 +365,14 @@ static inline int cpu_ptel_pr (uint32_t ptel) #define PTEA_TC (1 << 3) #define cpu_ptea_tc(ptea) (((ptea) & PTEA_TC) >> 3) -static inline target_ulong cpu_read_sr(CPUSH4State *env) +static inline uint32_t cpu_read_sr(CPUSH4State *env) { return env->sr | (env->sr_m << SR_M) | (env->sr_q << SR_Q) | (env->sr_t << SR_T); } -static inline void cpu_write_sr(CPUSH4State *env, target_ulong sr) +static inline void cpu_write_sr(CPUSH4State *env, uint32_t sr) { env->sr_m = (sr >> SR_M) & 1; env->sr_q = (sr >> SR_Q) & 1; -- 2.47.3