From 94900000380300b230dc1bed489b598a2a2c55a1 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Fri, 5 Jul 2024 17:52:41 +0300 Subject: [PATCH] drm/i915/fbc: Adjust g4x+ platform checks MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Do the "is this ilk+ or g4x" checks in the customary order instead of the reverse order. Easier for the poor brain to parse this when it's always done the same way. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20240705145254.3355-8-ville.syrjala@linux.intel.com Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 779e96dd3f6ff..6853573f84864 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -1086,7 +1086,7 @@ static void intel_fbc_max_surface_size(struct intel_display *display, } else if (DISPLAY_VER(display) >= 7) { *w = 4096; *h = 4096; - } else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) { + } else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) { *w = 4096; *h = 2048; } else { @@ -1127,7 +1127,7 @@ static void intel_fbc_max_plane_size(struct intel_display *display, } else if (DISPLAY_VER(display) >= 8 || IS_HASWELL(i915)) { *w = 4096; *h = 4096; - } else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) { + } else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) { *w = 4096; *h = 2048; } else { -- 2.47.3